BSC076N04ND [INFINEON]
OptiMOS™ power transistor 40V;型号: | BSC076N04ND |
厂家: | Infineon |
描述: | OptiMOS™ power transistor 40V |
文件: | 总11页 (文件大小:1188K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
BSC076N04ND
MOSFET
OptiMOSTM-T2ꢀPowerꢀTransistor,ꢀ40ꢀV
PG-TDSON-8-4
8
4
1
7
6
5
2
Features
·ꢀDualꢀN-channel,ꢀnormalꢀlevel
·ꢀFastꢀswitchingꢀMOSFETs
·ꢀOptimizedꢀtechnologyꢀforꢀdrivesꢀapplications
·ꢀSuperiorꢀthermalꢀresistance
3
4
1
8
7
6
2
·ꢀ100%ꢀavalancheꢀtested
3
5
·ꢀPb-freeꢀplating;ꢀRoHSꢀcompliant
·ꢀHalogen-freeꢀaccordingꢀtoꢀIEC61249-2-21
ProductꢀValidation
Qualifiedꢀforꢀindustrialꢀapplicationsꢀaccordingꢀtoꢀtheꢀrelevantꢀtestsꢀof
JEDEC47/20/22
D1 D1 D2 D2
Tableꢀ1ꢀꢀꢀꢀꢀKeyꢀPerformanceꢀParameters
Parameter
Value
Unit
VDS
40
V
S1 G1 S2 G2
RDS(on),max
ID
7.6
mΩ
A
20
Typeꢀ/ꢀOrderingꢀCode
Package
SSO8 dual (TDSON-8-4)
Marking
RelatedꢀLinks
BSC076N04ND
076N04ND
-
Final Data Sheet
1
Rev.ꢀ2.0,ꢀꢀ2018-12-11
OptiMOSTM-T2ꢀPowerꢀTransistor,ꢀ40ꢀV
BSC076N04ND
TableꢀofꢀContents
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Electrical characteristics diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Disclaimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Final Data Sheet
2
Rev.ꢀ2.0,ꢀꢀ2018-12-11
OptiMOSTM-T2ꢀPowerꢀTransistor,ꢀ40ꢀV
BSC076N04ND
1ꢀꢀꢀꢀꢀMaximumꢀratings
atꢀTA=25ꢀ°C,ꢀunlessꢀotherwiseꢀspecified,ꢀoneꢀtransistorꢀactive
Tableꢀ2ꢀꢀꢀꢀꢀMaximumꢀratings
Values
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Typ.
Max.
20
Continuous drain current
Pulsed drain current1)
Avalanche energy, single pulse2)
ID
-
-
-
-
-
A
VGS=10ꢀV,ꢀTC=25ꢀ°C
TA=25ꢀ°C
ID,pulse
EAS
VGS
-
80
A
-
87
mJ
V
ID=10ꢀA,ꢀRGS=25ꢀΩ
-
Gate source voltage
-20
20
-
-
-
-
65
2.3
TC=25ꢀ°C
Power dissipation
Ptot
W
TA=25ꢀ°C,ꢀRTHJA=65ꢀ°C/W3)
IEC climatic category; DIN IEC 68-1:
55/175/56
Operating and storage temperature
Tj,ꢀTstg
-55
-
175
°C
2ꢀꢀꢀꢀꢀThermalꢀcharacteristics
Tableꢀ3ꢀꢀꢀꢀꢀThermalꢀcharacteristics
Values
Typ.
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Max.
Thermal resistance, junction - case,
bottom
RthJC
RthJA
RthJA
-
-
-
-
2.3
°C/W -
°C/W -
°C/W -
Device on PCB,
-
-
60
6 cm² cooling area3)
Device on PCB,
100
minimal footprint4)
1) See Diagram 3 for more detailed information
2) See Diagram 13 for more detailed information
3) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain connection.
PCB is vertical in still air.
4) device mounted on a minimum pad (one layer, 70 µm thick)
Final Data Sheet
3
Rev.ꢀ2.0,ꢀꢀ2018-12-11
OptiMOSTM-T2ꢀPowerꢀTransistor,ꢀ40ꢀV
BSC076N04ND
3ꢀꢀꢀꢀꢀElectricalꢀcharacteristics
atꢀTj=25ꢀ°C,ꢀunlessꢀotherwiseꢀspecified
Tableꢀ4ꢀꢀꢀꢀꢀStaticꢀcharacteristics
Values
Typ.
-
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
40
Max.
-
Drain-source breakdown voltage
Gate threshold voltage
V(BR)DSS
VGS(th)
V
V
VGS=0ꢀV,ꢀID=1ꢀmA
VDS=VGS,ꢀID=30ꢀµA
2.0
3.0
4.0
-
-
0.1
10
1
100
VDS=40ꢀV,ꢀVGS=0ꢀV,ꢀTj=25ꢀ°C
VDS=40ꢀV,ꢀVGS=0ꢀV,ꢀTj=125ꢀ°C
Zero gate voltage drain current
IDSS
µA
nA
Gate-source leakage current
IGSS
-
-
-
100
7.6
VGS=20ꢀV,ꢀVDS=0ꢀV
Drain-source on-state resistance
RDS(on)
7.0
mΩ VGS=10ꢀV,ꢀID=17ꢀA
Tableꢀ5ꢀꢀꢀꢀꢀDynamicꢀcharacteristics
Values
Typ.
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Max.
Input capacitance1)
Output capacitance1)
Reverse transfer capacitance1)
Ciss
Coss
Crss
-
-
-
2270 2950 pF
VGS=0ꢀV,ꢀVDS=20ꢀV,ꢀf=1ꢀMHz
VGS=0ꢀV,ꢀVDS=20ꢀV,ꢀf=1ꢀMHz
VGS=0ꢀV,ꢀVDS=20ꢀV,ꢀf=1ꢀMHz
670
24
870
48
pF
pF
VDD=20ꢀV,ꢀVGS=10ꢀV,ꢀID=20ꢀA,
RG,ext=11ꢀΩ
Turn-on delay time
Rise time
td(on)
tr
td(off)
tf
-
-
-
-
13
4
-
-
-
-
ns
ns
ns
ns
VDD=20ꢀV,ꢀVGS=10ꢀV,ꢀID=20ꢀA,
RG,ext=11ꢀΩ
VDD=20ꢀV,ꢀVGS=10ꢀV,ꢀID=20ꢀA,
RG,ext=11ꢀΩ
Turn-off delay time
Fall time
22
7
VDD=20ꢀV,ꢀVGS=10ꢀV,ꢀID=20ꢀA,
RG,ext=11ꢀΩ
Tableꢀ6ꢀꢀꢀꢀꢀGateꢀchargeꢀcharacteristics2)ꢀ
Values
Typ.
12
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Max.
16
7
Gate to source charge
Gate to drain charge
Gate charge total1)
Qgs
-
-
-
-
nC
nC
nC
V
VDD=20ꢀV,ꢀID=20ꢀA,ꢀVGS=0ꢀtoꢀ10ꢀV
VDD=20ꢀV,ꢀID=20ꢀA,ꢀVGS=0ꢀtoꢀ10ꢀV
VDD=20ꢀV,ꢀID=20ꢀA,ꢀVGS=0ꢀtoꢀ10ꢀV
VDD=20ꢀV,ꢀID=20ꢀA,ꢀVGS=0ꢀtoꢀ10ꢀV
Qgd
4
Qg
28
38
-
Gate plateau voltage
Vplateau
5.2
1) Defined by design. Not subject to production test.
2) See ″Gate charge waveforms″ for parameter definition
Final Data Sheet
4
Rev.ꢀ2.0,ꢀꢀ2018-12-11
OptiMOSTM-T2ꢀPowerꢀTransistor,ꢀ40ꢀV
BSC076N04ND
Tableꢀ7ꢀꢀꢀꢀꢀReverseꢀdiode
Values
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Typ.
-
Max.
20
80
1.1
-
Diode continuous forward current
Diode pulse current
IS
-
-
-
-
-
A
TC=25ꢀ°C
IS,pulse
VSD
trr
-
A
TC=25ꢀ°C
Diode forward voltage
0.9
35
35
V
VGS=0ꢀV,ꢀIF=17ꢀA,ꢀTj=25ꢀ°C
VR=15ꢀV,ꢀIF=9ꢀA,ꢀdiF/dt=100ꢀA/µs
VR=15ꢀV,ꢀIF=9ꢀA,ꢀdiF/dt=100ꢀA/µs
Reverse recovery time1)
Reverse recovery charge1)
ns
nC
Qrr
-
1) Defined by design. Not subject to production test.
Final Data Sheet
5
Rev.ꢀ2.0,ꢀꢀ2018-12-11
OptiMOSTM-T2ꢀPowerꢀTransistor,ꢀ40ꢀV
BSC076N04ND
4ꢀꢀꢀꢀꢀElectricalꢀcharacteristicsꢀdiagrams
Diagramꢀ1:ꢀPowerꢀdissipation
Diagramꢀ2:ꢀDrainꢀcurrent
70
70
silicon limit
60
50
40
30
20
10
0
60
50
40
30
20
package limit
10
0
0
25
50
75
100
125
150
175
200
0
25
50
75
100
125
150
175
200
TAꢀ[°C]
TAꢀ[°C]
Ptot=f(TA),ꢀminimalꢀfootprint
ID=f(TA);ꢀminimalꢀfootprint
Diagramꢀ3:ꢀSafeꢀoperatingꢀarea
Diagramꢀ4:ꢀMax.ꢀtransientꢀthermalꢀimpedance
102
101
1 µs
single pulse
0.01
0.02
10 µs
10 ms
100 µs
0.05
DC
0.1
0.2
0.5
101
100
10-1
10-2
1 ms
100
10-1
10-2
10-1
100
101
102
10-5
10-4
10-3
10-2
10-1
100
VDSꢀ[V]
tpꢀ[s]
ID=f(VDS);ꢀTC=25ꢀ°C;ꢀD=0;ꢀparameter:ꢀtp
ZthJC=f(tp);ꢀparameter:ꢀD=tp/T
Final Data Sheet
6
Rev.ꢀ2.0,ꢀꢀ2018-12-11
OptiMOSTM-T2ꢀPowerꢀTransistor,ꢀ40ꢀV
BSC076N04ND
Diagramꢀ5:ꢀTyp.ꢀoutputꢀcharacteristics
Diagramꢀ6:ꢀTyp.ꢀdrain-sourceꢀonꢀresistance
80
50
6.25 V
6.5 V
5 V
6 V
70
6 V
5.5 V
40
10 V
60
50
40
30
20
10
0
30
20
10
0
5.5 V
6.5 V
10 V
5 V
0.0
2.0
4.0
6.0
8.0
0
10
20
30
40
50
60
70
80
VDSꢀ[V]
IDꢀ[A]
ID=f(VDS),ꢀTj=25ꢀ°C;ꢀparameter:ꢀVGS
RDS(on)=f(ID),ꢀTj=25ꢀ°C;ꢀparameter:ꢀVGS
Diagramꢀ7:ꢀTyp.ꢀtransferꢀcharacteristics
Diagramꢀ8:ꢀTyp.ꢀdrain-sourceꢀonꢀresistance
80
24
70
60
50
40
30
20
20
16
12
8
175 °C
25 °C
4
10
175 °C
25 °C
0
0
0
1
2
3
4
5
6
7
0
2
4
6
8
10
VGSꢀ[V]
VGSꢀ[V]
ID=f(VGS),ꢀ|VDS|>2|ID|RDS(on)max;ꢀparameter:ꢀTj
RDS(on)=f(VGS),ꢀID=17ꢀA;ꢀparameter:ꢀTj
Final Data Sheet
7
Rev.ꢀ2.0,ꢀꢀ2018-12-11
OptiMOSTM-T2ꢀPowerꢀTransistor,ꢀ40ꢀV
BSC076N04ND
Diagramꢀ9:ꢀNormalizedꢀdrain-sourceꢀonꢀresistance
Diagramꢀ10:ꢀTyp.ꢀgateꢀthresholdꢀvoltage
1.8
4.0
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
300 µA
30 µA
-80
-40
0
40
80
120
160
200
-80
-40
0
40
80
120
160
200
Tjꢀ[°C]
Tjꢀ[°C]
RDS(on)=f(Tj),ꢀID=17ꢀA,ꢀVGS=10ꢀV
VGS(th=f(Tj),ꢀVGS=VDS;ꢀparameter:ꢀID
Diagramꢀ11:ꢀTyp.ꢀcapacitances
Diagramꢀ12:ꢀForwardꢀcharacteristicsꢀofꢀreverseꢀdiode
104
102
25 °C
25 °C, max
175 °C
175 °C, max
Ciss
103
102
101
100
101
Coss
100
Crss
10-1
0
5
10
15
20
25
30
35
40
0.00
0.25
0.50
0.75
1.00
1.25
1.50
VDSꢀ[V]
VSDꢀ[V]
C=f(VDS);ꢀVGS=0ꢀV;ꢀf=1ꢀMHz
IF=f(VSD);ꢀparameter:ꢀTj
Final Data Sheet
8
Rev.ꢀ2.0,ꢀꢀ2018-12-11
OptiMOSTM-T2ꢀPowerꢀTransistor,ꢀ40ꢀV
BSC076N04ND
Diagramꢀ13:ꢀAvalancheꢀcharacteristics
Diagramꢀ14:ꢀTyp.ꢀgateꢀcharge
102
10
8 V
20 V
32 V
8
6
4
2
0
101
25 °C
100 °C
150 °C
100
10-1
100
101
102
103
0
5
10
15
20
25
30
tAVꢀ[µs]
Qgateꢀ[nC]
IAS=f(tAV);ꢀRGS=25ꢀΩ;ꢀparameter:ꢀTj,start
VGS=f(Qgate),ꢀID=20ꢀAꢀpulsed,ꢀTj=25ꢀ°C;ꢀparameter:ꢀVDD
Diagramꢀ15:ꢀDrain-sourceꢀbreakdownꢀvoltage
Diagram Gate charge waveforms
44
43
42
41
40
39
38
-80
-40
0
40
80
120
160
200
Tjꢀ[°C]
VBR(DSS)=f(Tj);ꢀID=1ꢀmA
Final Data Sheet
9
Rev.ꢀ2.0,ꢀꢀ2018-12-11
OptiMOSTM-T2ꢀPowerꢀTransistor,ꢀ40ꢀV
BSC076N04ND
5ꢀꢀꢀꢀꢀPackageꢀOutlines
MILLIMETERS
DIMENSIONS
MIN.
0.90
0.15
0.34
0.02
4.95
4.20
0.50
5.95
5.70
4.075
4.035
0.15
MAX.
1.10
0.35
0.54
0.22
5.35
4.40
0.70
6.35
6.10
4.275
4.235
0.35
DOCUMENT NO.
Z8B00189767
A
A1
b
REVISION
01
b1
D
D1
D2
E
SCALE 5:1
4mm
0
1
2
3
E1
E2
E3
E4
e
EUROPEAN PROJECTION
1.27
L
0.45
0.45
8.5°
0.65
0.65
M
Θ
11.5°
ISSUE DATE
31.07.2018
aaa
ddd
0.05
0.10
Figureꢀ1ꢀꢀꢀꢀꢀOutlineꢀSSO8ꢀdualꢀ(TDSON-8-4),ꢀdimensionsꢀinꢀmm
Final Data Sheet
10
Rev.ꢀ2.0,ꢀꢀ2018-12-11
OptiMOSTM-T2ꢀPowerꢀTransistor,ꢀ40ꢀV
BSC076N04ND
RevisionꢀHistory
BSC076N04ND
Revision:ꢀ2018-12-11,ꢀRev.ꢀ2.0
Previous Revision
Revision Date
Subjects (major changes since last revision)
Release of final version
2.0
2018-12-11
Trademarks
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automotive,ꢀaviationꢀandꢀaerospaceꢀapplicationsꢀorꢀsystemsꢀonlyꢀwithꢀtheꢀexpressꢀwrittenꢀapprovalꢀofꢀInfineonꢀTechnologies,ꢀifꢀa
failureꢀofꢀsuchꢀcomponentsꢀcanꢀreasonablyꢀbeꢀexpectedꢀtoꢀcauseꢀtheꢀfailureꢀofꢀthatꢀlife-support,ꢀautomotive,ꢀaviationꢀand
aerospaceꢀdeviceꢀorꢀsystemꢀorꢀtoꢀaffectꢀtheꢀsafetyꢀorꢀeffectivenessꢀofꢀthatꢀdeviceꢀorꢀsystem.ꢀLifeꢀsupportꢀdevicesꢀorꢀsystemsꢀare
intendedꢀtoꢀbeꢀimplantedꢀinꢀtheꢀhumanꢀbodyꢀorꢀtoꢀsupportꢀand/orꢀmaintainꢀandꢀsustainꢀand/orꢀprotectꢀhumanꢀlife.ꢀIfꢀtheyꢀfail,ꢀitꢀis
reasonableꢀtoꢀassumeꢀthatꢀtheꢀhealthꢀofꢀtheꢀuserꢀorꢀotherꢀpersonsꢀmayꢀbeꢀendangered.
Final Data Sheet
11
Rev.ꢀ2.0,ꢀꢀ2018-12-11
相关型号:
SI9130DB
5- and 3.3-V Step-Down Synchronous ConvertersWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9135LG-T1
SMBus Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9135LG-T1-E3
SMBus Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9135_11
SMBus Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9136_11
Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9130CG-T1-E3
Pin-Programmable Dual Controller - Portable PCsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9130LG-T1-E3
Pin-Programmable Dual Controller - Portable PCsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9130_11
Pin-Programmable Dual Controller - Portable PCsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9137
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9137DB
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9137LG
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9122E
500-kHz Half-Bridge DC/DC Controller with Integrated Secondary Synchronous Rectification DriversWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
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