BTT6100-2ERA [INFINEON]
The BTT6100-2ERA is a 100mΩ dual channel Smart High-Side Power Switch, embedded in a PG-TDSO-14, Exposed Pad package, providing protective functions and diagnosis. The power transistor is built by a N-channel vertical power MOSFET with charge pump. The device is integrated in Smart6 HV technology. It is specially designed to drive lamps up to 1x P21W 24V or 1x R10W 12V, as well as LEDs in the harsh automotive environment. Diagnostic.;
| 型号： | BTT6100-2ERA |
| 厂家： | 
Infineon |
| 描述： | The BTT6100-2ERA is a 100mΩ dual channel Smart High-Side Power Switch, embedded in a PG-TDSO-14, Exposed Pad package, providing protective functions and diagnosis. The power transistor is built by a N-channel vertical power MOSFET with charge pump. The device is integrated in Smart6 HV technology. It is specially designed to drive lamps up to 1x P21W 24V or 1x R10W 12V, as well as LEDs in the harsh automotive environment. Diagnostic. |
| 文件： | 总47页 (文件大小：1342K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PROFET™ +24 V
BTT6100-2ERA
Smart High-Side Power Switch Dual Channel, 100 mΩ
Package PG-TDSO-14
Marking 6100-2ERA
1
Overview
Application
•
•
•
•
Suitable for resistive, inductive and capacitive loads
Replaces electromechanical relays, fuses and discrete circuits
Most suitable for loads with high inrush current, such as lamps
Suitable for 12 V and 24 V Trucks and Transportation System
VBAT
Voltage Regulator
OUT VS
T1
GND
CVDD
Z
CVS
VS
VDD
GPIO
RDEN
DEN
GPIO
RDSEL
DSEL
OUT0
Microcontroller
GPIO
OUT4
IN0
IN1
RIN
RIN
COUT
Valve
GPIO
OUT1
COUT
IS
RSENSE
ADC IN
GND
GND
Bulb
CSENSE
D
Application Diagram with BTT6100-2ERA
Datasheet
www.infineon.com
1
Rev.1.00
2019-03-09
PROFET™ +24 V
BTT6100-2ERA
Overview
Basic Features
•
•
•
•
•
•
•
•
Dual channel device
Very low stand-by current
3.3 V and 5 V compatible logic inputs
Electrostatic discharge protection (ESD)
Optimized electromagnetic compatibility
Logic ground independent of load ground
Very low power DMOS leakage current in OFF state
Green product (RoHS compliant) and AEC qualified
Description
The BTT6100-2ERA is a 100 mΩ dual channel Smart High-Side Power Switch, embedded in a PG-TDSO-14,
Exposed Pad package, providing protective functions and diagnosis. The power transistor is built by a
N-channel vertical power MOSFET with charge pump. The device is integrated in Smart6 HV technology. It is
specially designed to drive lamps up to 1x P21W 24V or 1x R10W 12V, as well as LEDs in the harsh automotive
environment.
Table 1
Product Summary
Parameter
Symbol
VS(OP)
Value
5 V ... 36 V
65 V
Operating voltage range
Maximum supply voltage
VS(LD)
Maximum ON state resistance at TJ = 150°C per channel
Nominal load current (one channel active)
Nominal load current (all channels active)
Typical current sense ratio
RDS(ON)
IL(NOM)1
IL(NOM)2
kILIS
200 mΩ
2.6 A
2.2 A
600
Minimum current limitation
IL5(SC)
20 A
Maximum standby current with load at TJ = 25°C
IS(OFF)
500 nA
Diagnostic Functions
•
•
•
•
•
•
Proportional load current sense multiplexed for the 2 channels
Open load detection in ON and OFF
Short circuit to battery and ground indication
Overtemperature switch off detection
Stable diagnostic signal during short circuit
Enhanced kILIS dependency with temperature and load current
Protection Functions
•
•
•
•
•
•
Stable behavior during undervoltage
Reverse polarity protection with external components
Secure load turn-off during logic ground disconnection with external components
Overtemperature protection with latch
Overvoltage protection with external components
Enhanced short circuit operation
Datasheet
2
Rev.1.00
2019-03-09
PROFET™ +24 V
BTT6100-2ERA
Block Diagram
2
Block Diagram
Channel 0
VS
voltage sen sor
int ern al
power
supply
over
temperatu re
T
clamp for
ind uctive load
gate control
&
charge pump
IN 0
driver
logic
over current
switch limit
DEN
ESD
protection
load current sense and
open load detection
OUT 0
IS
forward voltage drop detection
VS
Channel 1
T
IN1
Control and pro tection circuit equivalent to channel 0
DSEL
OUT 1
Block diagramD xS.vsd
GND
Figure 1
Block Diagram for the BTT6100-2ERA
Datasheet
3
Rev.1.00
2019-03-09
PROFET™ +24 V
BTT6100-2ERA
Pin Configuration
3
Pin Configuration
3.1
Pin Assignment
GND
IN0
1
2
14
13
OUT0
OUT0
DEN
IS
3
4
5
12
11
10
OUT0
NC
DSEL
OUT1
6
7
9
8
OUT1
OUT1
IN1
NC
Pinout dual SO14.vsd
Figure 2
Pin Configuration
3.2
Pin Definitions and Functions
Table 2
Pin Definitions and Functions
Pin
1
Symbol Function
GND
IN0
GrouND; Ground connection
2
INput channel 0; Input signal for channel 0 activation
3
DEN
Diagnostic ENable; Digital signal to enable/disable the diagnosis of the
device
4
IS
Sense; Sense current of the selected channel
5
DSEL
IN1
Diagnostic SELection; Digital signal to select the channel to be diagnosed
INput channel 1; Input signal for channel 1 activation
Not Connected; No internal connection to the chip
OUTput 1; Protected high side power output channel 11)
OUTput 0; Protected high side power output channel 01)
Voltage Supply; Battery voltage
6
7, 11
NC
8, 9, 10
12, 13, 14
Cooling Tab
OUT1
OUT0
VS
1) All output pins of a given channel must be connected together on the PCB. All pins of an output are internally
connected together. PCB traces have to be designed to withstand the maximum current which can flow.
Datasheet
4
Rev.1.00
2019-03-09
PROFET™ +24 V
BTT6100-2ERA
Pin Configuration
3.3
Voltage and Current Definition
Figure 3 shows all terms used in this data sheet, with associated convention for positive values.
IVS
VS
VDS0
VS
IIN0
IOUT0
IN0
IN1
OUT0
OUT1
VIN0
VDS1
VOUT0
VIN1
IDEN
DEN
DSEL
IS
IOUT1
VDEN
VDSEL
IIS
VOUT1
GND
VIS
IGND
voltage and current convention.vsd
Figure 3
Voltage and Current Definition
Datasheet
5
Rev.1.00
2019-03-09
PROFET™ +24 V
BTT6100-2ERA
General Product Characteristics
4
General Product Characteristics
4.1
Absolute Maximum Ratings
Table 3
Absolute Maximum Ratings1)
TJ = -40°C to 150°C; (unless otherwise specified)
Parameter
Symbol
Values
Typ.
Unit
Note or
Test Condition
Number
Min.
Max.
Supply Voltages
Supply voltage
VS
-0.3
0
–
–
48
28
V
V
–
P_4.1.1
P_4.1.2
Reverse polarity voltage
-VS(REV)
t < 2 min
TA = 25°C
RL ≥ 25 Ω
ZGND = Diode + 27 Ω
Supply voltage for short
circuit protection
VBAT(SC)
0
–
36
V
RSupply = 10 mΩ
LSupply = 5 µH
P_4.1.3
R
R
ECU= 20 mΩ
Cable= 16 mΩ/m
LCable= 1 µH/m,
l = 0 or 5 m
See Chapter 6 and
Figure 28
Supply voltage for Load
dump protection
VS(LD)
nRSC1
VIN
–
–
–
–
–
65
V
2)RI = 2 Ω
RL = 25 Ω
P_4.1.12
P_4.1.4
Short Circuit Capability
3)
Permanent short circuit
IN pin toggles
100
k cycles
V
_
Input Pins
Voltage at INPUT pins
-0.3
–
6
7
–
P_4.1.13
t < 2 min
Current through INPUT pins IIN
-2
–
–
2
mA
V
–
P_4.1.14
P_4.1.15
Voltage at DEN pin
VDEN
-0.3
–
6
7
–
t < 2 min
Current through DEN pin
Voltage at DSEL pin
IDEN
-2
–
–
2
mA
V
–
P_4.1.16
P_4.1.17
VDSEL
-0.3
–
6
7
–
t < 2 min
Current through DSEL pin
Sense Pin
IDSEL
-2
–
2
mA
–
P_4.1.18
Voltage at IS pin
VIS
IIS
-0.3
-25
–
–
VS
V
–
–
P_4.1.19
P_4.1.20
Current through IS pin
50
mA
Datasheet
6
Rev.1.00
2019-03-09
PROFET™ +24 V
BTT6100-2ERA
General Product Characteristics
Table 3
Absolute Maximum Ratings1)
TJ = -40°C to 150°C; (unless otherwise specified)
Parameter
Symbol
Values
Typ.
Unit
Note or
Test Condition
Number
Min.
Max.
Power Stage
Load current
| IL |
–
–
–
–
IL(LIM)
A
–
P_4.1.21
P_4.1.22
Power dissipation (DC)
PTOT
1.8
W
TA = 85°C
TJ < 150°C
Maximum energy
dissipation
Single pulse (one channel)
EAS
–
–
–
36
65
mJ
IL(0) = 1.5 A
P_4.1.23
TJ(0) = 150°C
VS = 28 V
Voltage at power transistor VDS
Currents
–
–
V
–
P_4.1.26
P_4.1.27
Current through ground pin I GND
-20
-150
20
20
mA
–
t < 2 min
Temperatures
Junction temperature
Storage temperature
ESD Susceptibility
TJ
-40
-55
–
–
150
150
°C
°C
–
–
P_4.1.28
P_4.1.30
TSTG
ESD susceptibility (all pins) VESD
-2
-4
–
–
2
4
kV
kV
4) HBM
4) HBM
P_4.1.31
P_4.1.32
ESD susceptibility OUT Pin VESD
vs. GND and VS connected
ESD susceptibility
VESD
VESD
-500
-750
–
–
500
750
V
V
5) CDM
5) CDM
P_4.1.33
P_4.1.34
ESD susceptibility pin
(corner pins)
1) Not subject to production test. Specified by design
2) VS(LD) is setup without the DUT connected to the generator per ISO 7637-1
3) Threshold limit for short circuit failures: 100 ppm. Please refer to the legal disclaimer for short-circuit capability on
the Back Cover of this document
4) ESD susceptibility, Human Body Model "HBM" according to AEC Q100-002
5) ESD susceptibility, Charged Device Model "CDM" according to AEC Q100-011
Notes
1. Stresses above the ones listed here may cause permanent damage to the device. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
2. Integrated protection functions are designed to prevent IC destruction under fault conditions described in the
data sheet. Fault conditions are considered as “outside” normal operating range. Protection functions are
not designed for continuous repetitive operation.
Datasheet
7
Rev.1.00
2019-03-09
PROFET™ +24 V
BTT6100-2ERA
General Product Characteristics
4.2
Functional Range
Table 4
Functional Range TJ = -40°C to 150°C; (unless otherwise specified)
Parameter
Symbol
Values
Typ.
28
Unit Note or
Test Condition
Number
Min.
Max.
36
Nominal operating voltage VNOM
Extended operating voltage VS(OP)
8
5
V
V
–
2)
P_4.2.1
P_4.2.2
–
48
V = 4.5 V
IN
RL = 25 Ω
VDS < 0.5 V
1)
Minimum functional supply VS(OP)_MIN
voltage
3.8
3
4.3
3.5
5
V
V
V = 4.5 V
P_4.2.3
P_4.2.4
IN
RL = 25 Ω
From IOUT = 0 A
to VDS < 0.5 V;
see Figure 15
1)
Undervoltage shutdown
VS(UV)
4.1
V = 4.5 V
IN
V
DEN = 0 V
RL = 25 Ω
From VDS < 1 V;
to IOUT = 0 A
See Chapter 9.1
and Figure 15
2)
Undervoltage shutdown
hysteresis
VS(UV)_HYS
IGND_1
–
–
850
2
–
4
mV
mA
–
P_4.2.13
P_4.2.5
Operating current
One channel active
VIN = 5.5 V
VDEN = 5.5 V
Device in RDS(ON)
VS = 36 V
See Chapter 9.1
Operating current
All channels active
IGND_2
–
–
4
6
mA
µA
VIN = 5.5 V
VDEN = 5.5 V
Device in RDS(ON)
VS = 36 V
See Chapter 9.1
P_4.2.6
P_4.2.7
Standby current for whole IS(OFF)
0.1
0.5
1) VS = 36 V
device with load (ambient)
VOUT = 0 V
VIN floating
VDEN floating
TJ ≤ 85°C
Datasheet
8
Rev.1.00
2019-03-09
PROFET™ +24 V
BTT6100-2ERA
General Product Characteristics
Table 4
Functional Range TJ = -40°C to 150°C; (unless otherwise specified)
Parameter
Symbol
Values
Typ.
–
Unit Note or
Test Condition
Number
Min.
Max.
Maximum standby current IS(OFF)_150
for whole device with load
–
10
µA
VS = 36 V
OUT = 0 V
VIN floating
DEN floating
P_4.2.10
V
V
TJ = 150°C
Standby current for whole IS(OFF_DEN)
device with load, diagnostic
active
–
0.6
–
mA
2) VS = 36 V
P_4.2.8
V
OUT = 0 V
VIN floating
DEN = 5.5 V
V
1) Test at TJ = -40°C only
2) Not subject to production test. Specified by design.
Note:
Within the functional range the IC operates as described in the circuit description. The electrical
characteristics are specified within the conditions given in the related electrical characteristics
table.
4.3
Thermal Resistance
Table 5
Thermal Resistance
Parameter
Symbol
Values
Typ.
2
Unit Note or
Test Condition
Number
Min.
Max.
1)
Junction to case
RthJC
RthJA
–
–
–
–
K/W
K/W
P_4.3.1
P_4.3.2
1)2)
Junction to ambient
All channels active
27
1) Not subject to production test. Specified by design.
2) Specified RthJA value is according to JEDEC JESD51-2,-5,-7 at natural convection on FR4 2s2p board with 1 W power
dissipation equally dissipated for both channels at TA=105°C ; The product (chip + package) was simulated on a 76.4
x 114.3 x 1.5 mm board with 2 inner copper layers (2 x 70 µm Cu, 2 x 35 µm Cu). Where applicable, a thermal via array
under the exposed pad contacts the first inner copper layer. Please refer to Figure 4.
4.3.1
PCB Set-Up
70µm
35µm
1.5mm
0.3mm
PCB 2s2p.vsd
Figure 4
2s2p PCB Cross Section
Datasheet
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Rev.1.00
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PROFET™ +24 V
BTT6100-2ERA
General Product Characteristics
PCB bottom view
PCB top view
1
2
14
13
3
4
5
6
7
12
11
10
9
COOLING
TAB
VS
8
thermique SO14.vsd
Figure 5
PC Board Top and Bottom View for Thermal Simulation with 600 mm2 Cooling Area
4.3.2
Thermal Impedance
BTT6100-2ERA
100
10
1
2s2p
1s0p - 600 mm²
1s0p - 300 mm²
1s0p - footprint
0,1
0,0001
0,001
0,01
0,1
1
10
100
1000
Time (s)
Figure 6
Typical Thermal Impedance. 2s2p PCB set-up according Figure 5
Datasheet
10
Rev.1.00
2019-03-09
PROFET™ +24 V
BTT6100-2ERA
General Product Characteristics
BTT6100-2ERA
100
90
80
70
60
50
40
30
1s0p - Tambient = 105°C
0
100
200
300
400
500
600
Cooling area (mm²)
Figure 7
Typical Thermal Resistance. PCB set-up 1s0p
Datasheet
11
Rev.1.00
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PROFET™ +24 V
BTT6100-2ERA
Power Stage
5
Power Stage
The power stages are built using an N-channel vertical power MOSFET (DMOS) with charge pump.
5.1
Output ON-State Resistance
The ON-state resistance RDS(ON) depends on the supply voltage as well as the junction temperature TJ. Figure 8
shows the dependencies in terms of temperature and supply voltage for the typical ON-state resistance. The
behavior in reverse polarity is described in Chapter 6.4.
180
160
150
160
140
140
130
120
120
110
100
100
90
80
80
60
70
60
40
-40
-20
0
20
40
60
80
100
120
140
160
0
5
10
15
20
25
30
35
Junction Temperature T [°C]
Supply Voltage V [V]
J
S
Figure 8
Typical ON-State Resistance
A high signal at the input pin (see Chapter 8) causes the power DMOS to switch ON with a dedicated slope,
which is optimized in terms of EMC emission.
5.2
Turn ON/OFF Characteristics with Resistive Load
Figure 9 shows the typical timing when switching a resistive load.
IN
VIN_H
VIN_L
t
VOUT
dV/dt ON
dV/dt OFF
tON
90% VS
tOFF_delay
70% VS
30% VS
10% VS
tON_delay
tOFF
t
Switching times.vsd
Figure 9
Switching a Resistive Load Timing
Datasheet
12
Rev.1.00
2019-03-09
PROFET™ +24 V
BTT6100-2ERA
Power Stage
5.3
Inductive Load
5.3.1
Output Clamping
When switching OFF inductive loads with high side switches, the voltage VOUT drops below ground potential,
because the inductance intends to continue driving the current. To prevent the destruction of the device by
avalanche due to high voltages, there is a voltage clamp mechanism ZDS(AZ) implemented that limits negative
output voltage to a certain level (VS - VDS(AZ)). Please refer to Figure 10 and Figure 11 for details. Nevertheless,
the maximum allowed load inductance is limited.
VS
ZDS(AZ)
VDS
IN
LOGIC
IL
VBAT
GND
ZGND
OUT
VOUT
VIN
L, RL
Ou tput_clamp.vsd
Figure 10 Output Clamp
IN
t
VOUT
VS
t
VS-VDS(AZ)
IL
t
Switching an inductance.vsd
Figure 11 Switching an Inductive Load Timing
Datasheet
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Rev.1.00
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PROFET™ +24 V
BTT6100-2ERA
Power Stage
5.3.2
Maximum Load Inductance
During demagnetization of inductive loads, energy has to be dissipated in the BTT6100-2ERA. This energy can
be calculated with following equation:
RL IL
VS – VDS(AZ)
----- ------------------------------
L
RL
⎛
⎞
⎠
------------------------------
VS – VDS(AZ)
E = VDS(AZ)
ln 1 –
+ IL
(5.1)
⎝
RL
Following equation simplifies under the assumption of RL = 0 Ω.
VS
L I2 1 –
(5.2)
1
--
⎛
⎞
⎠
------------------------------
VS – VDS(AZ)
E =
⎝
2
The energy, which is converted into heat, is limited by the thermal design of the component. See Figure 12 for
the maximum allowed energy dissipation as a function of the load current.
100
10
0.00
0.50
1.00
1.50
2.00
2.50
3.00
3.50
4.00
IL(A)
Figure 12 Maximum Energy Dissipation Single Pulse, TJ_START = 150°C; VS = 28 V
Datasheet
14
Rev.1.00
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PROFET™ +24 V
BTT6100-2ERA
Power Stage
5.4
Inverse Current Capability
In case of inverse current, meaning a voltage VINV at the OUTput higher than the supply voltage VS, a current
IINV will flow from output to VS pin via the body diode of the power transistor (please refer to Figure 13). The
output stage follows the state of the IN pin, except if the IN pin goes from OFF to ON during inverse. In that
particular case, the output stage is kept OFF until the inverse current disappears. Nevertheless, the current IINV
should not be higher than IL(INV). If the channel is OFF, the diagnostic will detect an open load at OFF. If the
affected channel is ON, the diagnostic will detect open load at ON (the overtemperature signal is inhibited). At
the appearance of VINV, a parasitic diagnostic can be observed. After, the diagnosis is valid and reflects the
output state. At VINV vanishing, the diagnosis is valid and reflects the output state. During inverse current, no
protection functions are available.
VBAT
VS
Gate
driver
Device
logic
VINV
INV
Comp.
IL(INV)
OUT
GND
ZGND
inverse current.vsd
Figure 13 Inverse Current Circuitry
Datasheet
15
Rev.1.00
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PROFET™ +24 V
BTT6100-2ERA
Power Stage
5.5
Electrical Characteristics Power Stage
Table 6
Electrical Characteristics: Power Stage
VS = 8 V to 36 V, TJ = -40°C to 150°C (unless otherwise specified).
Typical values are given at VS = 28 V , TJ = 25°C
Parameter
Symbol
Values
Typ.
180
Unit Note or
Test Condition
Number
Min.
ON-state resistance per channel RDS(ON)_150 150
Max.
200
mΩ
IL = IL4 = 2 A
VIN = 4.5 V
P_5.5.1
TJ = 150 °C
See Figure 8
ON-state resistance per channel RDS(ON)_25
–
–
100
2.6
–
–
mΩ
1) TJ = 25°C
1)TA= 85°C
TJ < 150°C
P_5.5.21
P_5.5.2
Nominal load current
One channel active
IL(NOM)1
A
Nominal load current
All channels active
IL(NOM)2
–
2.2
10
70
–
A
P_5.5.3
P_5.5.4
P_5.5.5
Output voltage drop limitation at VDS(NL)
small load currents
–
22
75
mV
V
IL = IL0 = 50 mA
See Chapter 9.3
Drain to source clamping voltage VDS(AZ)
65
IDS = 20 mA
See Figure 11
See Chapter 9.1
2)
VDS(AZ) = [VS - VOUT
]
Output leakage current per
channel TJ ≤ 85°C
IL(OFF)
–
–
0.1
1
0.5
5
µA
µA
V floating
P_5.5.6
P_5.5.8
IN
VOUT = 0 V
TJ ≤ 85°C
Output leakage current per
channel TJ = 150°C
IL(OFF)_150
VIN floating
VOUT = 0 V
TJ = 150°C
Slew rate
30% to 70% VS
dV/dtON
-dV/dtOFF
ΔdV/dt
0.3
0.8
0.8
0
1.3
V/µs RL = 25 Ω
VS = 28 V
P_5.5.11
P_5.5.12
P_5.5.13
See Figure 9
See Chapter 9.1
Slew rate
70% to 30% VS
0.3
1.3
V/µs
Slew rate matching
-0.15
0.15
V/µs
dV/dtON - dV/dtOFF
Turn-ON time to VOUT = 90% VS
Turn-OFF time to VOUT = 10% VS
tON
20
70
70
0
150
150
50
µs
µs
µs
P_5.5.14
P_5.5.15
P_5.5.16
tOFF
ΔtSW
20
Turn-ON / OFF matching
-50
tOFF - tON
Turn-ON time to VOUT = 10% VS
Turn-OFF time to VOUT = 90% VS
tON_delay
tOFF_delay
–
–
35
35
70
70
µs
µs
P_5.5.17
P_5.5.18
Datasheet
16
Rev.1.00
2019-03-09
PROFET™ +24 V
BTT6100-2ERA
Power Stage
Table 6
Electrical Characteristics: Power Stage (cont’d)
VS = 8 V to 36 V, TJ = -40°C to 150°C (unless otherwise specified).
Typical values are given at VS = 28 V , TJ = 25°C
Parameter
Symbol
Values
Typ.
320
Unit Note or
Test Condition
Number
Min.
Max.
Switch ON energy
EON
–
–
µJ
1) RL = 25 Ω
OUT = 90% VS
P_5.5.19
V
VS = 36 V
See Chapter 9.1
Switch OFF energy
EOFF
–
371
–
µJ
1) RL = 25 Ω
P_5.5.20
VOUT = 10% VS
VS = 36 V
See Chapter 9.1
1) Not subject to production test, specified by design.
2) Test at TJ = -40°C only
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BTT6100-2ERA
Protection Functions
6
Protection Functions
The device provides integrated protection functions. These functions are designed to prevent the destruction
of the IC from fault conditions described in the data sheet. Fault conditions are considered as “outside”
normal operating range. Protection functions are designed for neither continuous nor repetitive operation.
6.1
Loss of Ground Protection
In case of loss of the module ground and the load remains connected to ground, the device protects itself by
automatically turning OFF (when it was previously ON) or remains OFF, regardless of the voltage applied on IN
pins.
In case of loss of device ground, it’s recommended to use input resistors between the microcontroller and the
BTT6100-2ERA to ensure switching OFF of channels.
In case of loss of module or device ground, a current (IOUT(GND)) can flow out of the DMOS. Figure 14 sketches
the situation.
ZGND is recommended to be a resistor in series to a diode .
ZIS(AZ)
VS
ZD(AZ)
VBAT
ZDS(AZ)
IS
RSENSE
DSEL
DEN
IN0
RDSEL
RDEN
RIN
IOUT(GND)
LOGIC
IN1
RIN
OUT
GND
ZGND
ZDESD
L, RL
RIS
RIS
Loss of ground protection.vsd
Figure 14 Loss of Ground Protection with External Components
6.2
Undervoltage Protection
Between VS(UV) and VS(OP), the undervoltage mechanism is triggered. VS(OP) represents the minimum voltage
where the switching ON and OFF can takes place. VS(UV) represents the minimum voltage the switch can hold
ON. If the supply voltage is below the undervoltage mechanism VS(UV), the device is OFF (turns OFF). As soon as
the supply voltage is above the undervoltage mechanism VS(OP), then the device can be switched ON. When the
switch is ON, protection functions are operational. Nevertheless, the diagnosis is not guaranteed until VS is in
the VNOM range. Figure 15 sketches the undervoltage mechanism.
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Protection Functions
VOUT
undervoltage behavio.rvsd
VS
VS(UV)
VS(OP)
Figure 15 Undervoltage Behavior
6.3
Overvoltage Protection
There is an integrated clamp mechanism for overvoltage protection (ZD(AZ)). To guarantee this mechanism
operates properly in the application, the current in the Zener diode has to be limited by a ground resistor.
Figure 16 shows a typical application to withstand overvoltage issues. In case of supply voltage higher than
VS(AZ), the power transistor switches ON and in addition the voltage across the logic section is clamped. As a
result, the internal ground potential rises to VS - VS(AZ). Due to the ESD Zener diodes, the potential at pin INx,
DSEL, and DEN rises almost to that potential, depending on the impedance of the connected circuitry. In the
case the device was ON, prior to overvoltage, the BTT6100-2ERA remains ON. In the case the BTT6100-2ERA
was OFF, prior to overvoltage, the power transistor can be activated. In the case the supply voltage is in above
VBAT(SC) and below VDS(AZ), the output transistor is still operational and follows the input. If at least one channel
is in the ON state, parameters are no longer guaranteed and lifetime is reduced compared to the nominal
supply voltage range. This especially impacts the short circuit robustness, as well as the maximum energy EAS
capability. ZGND is recommended to be a resistor in series to a diode.
ISOV
ZIS(AZ)
VS
VBAT
IS
ZD(AZ)
ZDS(AZ)
RSENSE
DSEL
DEN
IN0
RDSEL
RDEN
RIN
LOGIC
IN1
RIN
OUT
ZDESD
GND
ZGND
L, RL
RIS
Overvoltage protection.vsd
Figure 16 Overvoltage Protection with External Components
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Protection Functions
6.4
Reverse Polarity Protection
In case of reverse polarity, the intrinsic body diodes of the power DMOS causes power dissipation. The current
in this intrinsic body diode is limited by the load itself. Additionally, the current into the ground path and the
logic pins has to be limited to the maximum current described in Chapter 4.1 with an external resistor.
Figure 17 shows a typical application. RGND resistor is used to limit the current in the Zener protection of the
device. Resistors RDSEL, RDEN, and RIN are used to limit the current in the logic of the device and in the ESD
protection stage. RSENSE is used to limit the current in the sense transistor which behaves as a diode. The
recommended value for RDEN = RDSEL = RIN = RSENSE = 10 kΩ. ZGND is recommended to be a resistor in series to a
diode.
During reverse polarity, no protection functions are available.
Microcontroller
ZIS(AZ)
VS
protection diodes
IS
ZDS(AZ)
ZD(AZ)
RSENSE
VDS(REV)
DSEL
DEN
IN0
RDSEL
RDEN
RIN
LOGIC
-VS(REV)
IN1
RIN
OUT
L, RL
ZDESD
GND
RIS
ZGND
Reverse Polarity.vsd
Figure 17 Reverse Polarity Protection with External Components
6.5
Overload Protection
In case of overload, such as high inrush of cold lamp filament, or short circuit to ground, the BTT6100-2ERA
offers several protection mechanisms.
6.5.1
Current Limitation
At first step, the instantaneous power in the switch is maintained at a safe value by limiting the current to the
maximum current allowed in the switch IL(SC). During this time, the DMOS temperature is increasing, which
affects the current flowing in the DMOS.
6.5.2
Temperature Limitation in the Power DMOS
Each channel incorporates both an absolute (TJ(SC)) and a dynamic (TJ(SW)) temperature sensor. Activation of
either sensor will cause an overheated channel to switch OFF to prevent destruction. Any protective switch
OFF latches the output until the temperature has reached an acceptable value. Figure 18 gives a sketch of the
situation.
No retry strategy is implemented such that when the DMOS temperature has cooled down enough, the switch
is switched ON again. Only the IN pin signal toggling can re-activate the power stage (latch behavior).
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Protection Functions
IN
t
IL
LOAD CURRENT BELOW
LIMITATION PHASE
LOAD CURRENT LIMITATION PHASE
IL(x)SC
IL(NOM)
t
TDMOS
TJ(SC)
Temperature
protection phase
ΔTJ(SW)
TA
tsIS(FAULT)
t
t
tsIS(OC_blank)
IIS
IIS(FAULT)
IL(NOM) / kILIS
0A
VDEN
tsIS(OF F)
0V
t
Hard start.vsd
Figure 18 Overload Protection
Note:
For better understanding, the time scale is not linear. The real timing of this drawing is application
dependant and cannot be described.
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Protection Functions
6.6
Electrical Characteristics for the Protection Functions
Table 7
Electrical Characteristics: Protection
VS = 8 V to 36 V, TJ = -40°C to 150°C (unless otherwise specified).
Typical values are given at VS = 28 V , TJ = 25°C
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
Loss of Ground
Output leakage current
while GND disconnected
IOUT(GND)
–
0.1
–
mA
mV
1)2) VS = 28 V
See Figure 14
P_6.6.1
P_6.6.2
Reverse Polarity
Drain source diode voltage VDS(REV)
200
650
700
3) IL = - 2 A
during reverse polarity
TJ = 150°C
See Figure 17
Overvoltage
Overvoltage protection
VS(AZ)
65
20
70
75
V
ISOV = 5 mA
See Figure 16
P_6.6.3
P_6.6.4
Overload Condition
4)
Load current limitation
IL5(SC)
25
80
30
–
A
K
V
= 5 V
DS
See Figure 18 and
Chapter 9.3
5) See Figure 18
Dynamic temperature
increase while switching
ΔTJ(SW)
TJ(SC)
–
P_6.6.8
Thermal shutdown
temperature
150
–
170 5) 200 5) °C
30
3) See Figure 18
P_6.6.10
P_6.6.11
2)
Thermal shutdown
hysteresis
ΔTJ(SC)
–
K
1) All pins are disconnected except VS and OUT.
2) Not Subject to production test, specified by design
3) Test at TJ = +150°C only
4) Test at TJ = -40°C only
5) Functional test only
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Diagnostic Functions
7
Diagnostic Functions
For diagnosis purposes, the BTT6100-2ERA provides a combination of digital and analog signals at pin IS.
These signals are called SENSE. In case the diagnostic is disabled via DEN, pin IS becomes high impedance. In
case DEN is activated, the sense current of the channel X is enabled/disabled via associated pin DSEL. Table 8
gives the truth table.
Table 8
Diagnostic Truth Table
DEN
DSEL
IS
0
1
1
don’t care
Z
0
1
Sense output 0 IIS(0)
Sense output 1 IIS(1)
7.1
IS Pin
The BTT6100-2ERA provides a sense signal called IIS at pin IS. As long as no “hard” failure mode occurs (short
circuit to GND / current limitation / overtemperature / excessive dynamic temperature increase or open load
at OFF) a proportional signal to the load current (ratio kILIS = IL / IIS) is provided. The complete IS pin and
diagnostic mechanism is described in Figure 19. The accuracy of the sense current depends on temperature
and load current. The sense pin multiplexes the currents IIS(0) and IIS(1) via the pin DSEL. Thanks to this
multiplexing, the matching between kILISCHANNEL0 and kILISCHANNEL1 is optimized. Due to the ESD protection, in
connection to VS, it is not recommended to share the IS pin with other devices if these devices are using
another battery feed. The consequence is that the unsupplied device would be fed via the IS pin of the
supplied device.
VS
IIS1
=
IIS0
=
IL1 / kILIS
IL0 / kILIS
IIS(FAULT)
ZIS(AZ)
0
1
FAULT
IS
DEN
0
1
DSEL
Sens es chemati c.vs d
Figure 19 Diagnostic Block Diagram
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Diagnostic Functions
7.2
SENSE Signal in Different Operating Modes
Table 9 gives a quick reference for the state of the IS pin during device operation.
Table 9
Sense Signal, Function of Operation Mode
Operation Mode
Normal operation
Short circuit to GND
Overtemperature
Short circuit to VS
Open Load
Input level Channel X DEN1)
Output Level Diagnostic Output
OFF H
Z
Z
~ GND
Z
Z
Z
VS
IIS(FAULT)
< VOL(OFF)
> VOL(OFF)
Z
2)
IIS(FAULT)
Inverse current
~ VINV
~ VS
< VS
~ GND
Z
IIS(FAULT)
IIS = IL/kILIS
IIS(FAULT)
IIS(FAULT)
IIS(FAULT)
Normal operation
Current limitation
Short circuit to GND
ON
Overtemperature TJ(SW)
event
Short circuit to VS
Open Load
VS
IIS < IL / kILIS
IIS < IIS(OL)
3)
~ VS
4)
Inverse current
Underload
~ VINV
IIS < IIS(OL)
5)
~ VS
IIS (OL)< IIS < IL / kILIS
Don’t care
Don’t care
L
Don’t care
Z
1) The table doesn’t indicate but it is assumed that the appropriate channel is selected via the DSEL pins.
2) Stable with additional pull-up resistor.
3) The output current has to be smaller than IL(OL)
4) After maximum tINV
.
.
5) The output current has to be higher than IL(OL)
.
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Diagnostic Functions
7.3
SENSE Signal in the Nominal Current Range
Figure 20 and Figure 21 show the current sense as a function of the load current in the power DMOS. Usually,
a pull-down resistor RIS is connected to the current sense IS pin. This resistor has to be higher than 560 Ω to
limit the power losses in the sense circuitry. A typical value is 1.2 kΩ. The blue curve represents the ideal sense
current, assuming an ideal kILIS factor value. The red curves shows the accuracy the device provides across full
temperature range at a defined current.
5
4.5
4
3.5
3
2.5
2
1.5
1
0.5
min/max Sense Current
typical Sense Current
0
0
0.5
1
1.5
2
2.5
I
[A]
L
BTT6100-2ERA
Figure 20 Current Sense for Nominal Load
7.3.1
SENSE Signal Variation as a Function of Temperature and Load Current
In some applications a better accuracy is required at smaller currents. To achieve this accuracy requirement,
a calibration on the application is possible. To avoid multiple calibration points at different load and
temperature conditions, the BTT6100-2ERA allows limited derating of the kILIS value, at a given point
(IL3; TJ = +25°C). This derating is described by the parameter ΔkILIS. Figure 21 shows the behavior of the sense
current, assuming one calibration point at nominal load at +25°C.
The blue line indicates the ideal kILIS ratio.
The green lines indicate the derating on the parameter across temperature and voltage, assuming one
calibration point at nominal temperature and nominal battery voltage.
The red lines indicate the kILIS accuracy without calibration.
1000
calibrated k
ILIS
min/max k
ILIS
900
800
700
600
500
400
300
typical k
ILIS
0
0.5
1
1.5
2
2.5
I
[A]
L
BTT6100-2ERA
Figure 21 Improved Current Sense Accuracy with One Calibration Point at 0.4 A
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Diagnostic Functions
7.3.2
SENSE Signal Timing
Figure 22 shows the timing during settling and disabling of the SENSE.
VINx
t
ILx
tONx
tOFFx
tONx
90% of
IL static
t
VDEN
t
IIS
tsIS(LC)
tsIS(chC)
tsIS(OFF)
tsIS(ON)
tsIS(ON_DEN)
90% of
IS static
I
t
t
VDSEL
VINy
t
ILy
tONy
t
current sense settling disabling time .vsd
Figure 22 Current Sense Settling / Disabling Timing
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Diagnostic Functions
7.3.3
SENSE Signal in Open Load
7.3.3.1 Open Load in ON Diagnostic
If the channel is ON, a leakage current can still flow through an open load, for example due to humidity. The
parameter IL(OL) gives the threshold of recognition for this leakage current. If the current IL flowing out the
power DMOS is below this value, the device recognizes a failure, if the DEN (and DSEL) is selected. In that case,
the SENSE current is below IIS(OL). Otherwise, the minimum SENSE current is given above parameter IIS(OL)
.
Figure 23 shows the SENSE current behavior in this area. The red curve shows a typical product curve. The
blue curve shows the ideal current sense.
IIS
IIS(OL)
IL
IL(OL)
Sense for OL .vsd
Figure 23 Current Sense Ratio for Low Currents
7.3.3.2 Open Load in OFF Diagnostic
For open load diagnosis in OFF-state, an external output pull-up resistor (ROL) is recommended. For the
calculation of pull-up resistor value, the leakage currents and the open load threshold voltage VOL(OFF) have to
be taken into account. Figure 24 gives a sketch of the situation. Ileakage defines the leakage current in the
complete system, including IL(OFF) (see Chapter 5.5) and external leakages, e.g, due to humidity, corrosion,
etc... in the application.
To reduce the stand-by current of the system, an open load resistor switch SOL is recommended. If the channel
x is OFF, the output is no longer pulled down by the load and VOUT voltage rises to nearly VS. This is recognized
by the device as an open load. The voltage threshold is given by VOL(OFF). In that case, the SENSE signal is
switched to the IIS(FAULT)
.
An additional RPD resistor can be used to pull VOUT to 0 V. Otherwise, the OUT pin is floating. This resistor can
be used as well for short circuit to battery detection, see Chapter 7.3.4.
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Diagnostic Functions
Vbat
SOL
VS
IIS(FAULT)
ROL
OL
comp.
OUT
IS
ILOFF
Ileakage
GND
VOL(OFF)
ZGND
Rleakage
RIS
RPD
Open Load in OFF.vsd
Figure 24 Open Load Detection in OFF Electrical Equivalent Circuit
7.3.3.3 Open Load Diagnostic Timing
Figure 25 shows the timing during either Open Load in ON or OFF condition when the DEN pin is HIGH. Please
note that a delay tsIS(FAULT_OL_OFF) has to be respected after the falling edge of the input, when applying an open
load in OFF diagnosis request, otherwise the diagnosis can be wrong.
Load is present
Open load
VIN
VOUT
t
VS-VOL(OFF)
shutdown with load
RDS(ON) x IL
t
t
IOUT
tsIS(FAULT_OL_ON_OFF)
IIS
tsIS(LC)
t
Error Settling Disabling Time.vsd
Figure 25 Sense Signal in Open Load Timing
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Diagnostic Functions
7.3.4
SENSE Signal with OUT in Short Circuit to VS
In case of a short circuit between the OUTput-pin and the VS pin, all or portion (depending on the short circuit
impedance) of the load current will flow through the short circuit. As a result, a lower current compared to the
normal operation will flow through the DMOS of the BTT6100-2ERA, which can be recognized at the current
sense signal. The open load at OFF detection circuitry can also be used to distinguish a short circuit to VS. In
that case, an external resistor to ground RSC_VS is required. Figure 26 gives a sketch of the situation.
Vbat
VS
IIS(FAULT)
VBAT
OL
Comp.
IS
OUT
VOL(OFF)
GND
RSC_VS
ZGND
RIS
Sh or t c irc uit to Vs .v sd
Figure 26 Short Circuit to Battery Detection in OFF Electrical Equivalent Circuit
7.3.5
SENSE Signal in Case of Overload
An overload condition is defined by a current flowing out of the DMOS reaching the current limitation and / or
the absolute dynamic temperature swing TJ(SW) is reached, and / or the junction temperature reaches the
thermal shutdown temperature TJ(SC). Please refer to Chapter 6.5 for details.
In that case, the SENSE signal given is by IIS(FAULT) when the diagnostic is selected.
The device has a thermal latch behavior, such that when the overtemperature or the exceed dynamic
temperature condition has disappeared, the DMOS is reactivated only when the IN is toggled LOW to HIGH. If
the DEN pin is activated, and DSEL pin is selected to the correct channel, the SENSE follows the output stage.
If no reset of the latch occurs, the device remains in the latching phase and IIS(FAULT) at the IS pin, even though
the DMOS is OFF.
7.3.6
SENSE Signal in Case of Inverse Current
In the case of inverse current, the sense signal of the affected channel will indicate open load in OFF state and
indicate open load in ON state. The unaffected channels indicate normal behavior as long as the IINV current is
not exceeding the maximum value specified in Chapter 5.4.
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Diagnostic Functions
7.4
Electrical Characteristics Diagnostic Function
Table 10 Electrical Characteristics: Diagnostics
VS = 8 V to 36 V, TJ = -40°C to 150°C (unless otherwise specified).
Typical values are given at VS = 28 V, TJ = 25°C
Parameter
Symbol
Values
Typ.
Unit Note or
Test Condition
Number
Min.
Max.
Load Condition Threshold for Diagnostic
1)
Open load detection
threshold in OFF state
VS- VOL(OFF)
4
–
–
6
V
V = 0 V
P_7.5.1
P_7.5.2
IN
VDEN = 4.5 V
See Figure 25
Open load detection
threshold in ON state
IL(OL)
5
25
mA VIN = VDEN = 4.5 V
IIS(OL) = 22.5 μA
See Figure 23
See Chapter 9.4
Sense Pin
1)
IS pin leakage current when IIS_(DIS)
sense is disabled
–
1
0.02
–
1
µA
V
V = 4.5 V
P_7.5.4
P_7.5.6
IN
VDEN = 0 V
IL = IL4 = 2 A
Sense signal saturation
voltage
VS- VIS (RANGE)
3.5
VIN = 0 V
VOUT = VS > 10 V
VDEN = 4.5 V
IIS = 6 mA
See Chapter 9.4
Sense signal maximum
current in fault condition
IIS(FAULT)
6
15
35
mA VIS = VIN = VDSEL = 0 V
OUT = VS > 10 V
P_7.5.7
P_7.5.3
V
VDEN = 4.5 V
See Figure 19
See Chapter 9.4
Sense pin maximum voltage VIS(AZ)
65
70
75
V
IIS = 5 mA
See Figure 19
Current Sense Ratio Signal in the Nominal Area, Stable Load Current Condition
Current sense ratio
IL0 = 50 mA
kILIS0
kILIS1
kILIS2
kILIS3
kILIS4
ΔkILIS
-50% 660
-40% 600
-15% 600
-11% 600
+50%
+40%
+15%
+11%
+9%
VIN = 4.5 V
VDEN = 4.5 V
See Figure 20
P_7.5.8
Current sense ratio
IL1 = 0.1 A
P_7.5.9
TJ = -40°C; 150°C
Current sense ratio
IL2 = 0.4 A
P_7.5.10
P_7.5.11
P_7.5.12
P_7.5.17
Current sense ratio
IL3 = 1 A
Current sense ratio
IL4 = 2 A
-9%
-8
600
0
2)
kILIS derating with current
+8
%
k
versus kILIS2
ILIS3
and temperature
See Figure 21
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Diagnostic Functions
Table 10 Electrical Characteristics: Diagnostics (cont’d)
VS = 8 V to 36 V, TJ = -40°C to 150°C (unless otherwise specified).
Typical values are given at VS = 28 V, TJ = 25°C
Parameter
Symbol
Values
Typ.
Unit Note or
Test Condition
Number
Min.
Max.
Diagnostic Timing in Normal Condition
2)
Current sense settling time tsIS(ON)
to kILIS function stable after
positive input slope on both
INput and DEN
–
–
–
–
150
µs
µs
µs
V
= VIN = 0 to 4.5 V P_7.5.18
DEN
VS = 28 V
RIS = 1.2 kΩ
C
IL = IL3 = 1 A
See Figure 22
1)
SENSE < 100 pF
Current sense settling time tsIS(ON_DEN)
with load current stable and
transition of the DEN
–
–
10
15
V = 4.5 V
P_7.5.19
P_7.5.20
IN
VDEN = 0 to 4.5 V
RIS = 1.2 kΩ
CSENSE < 100 pF
IL = IL3 = 1 A
See Figure 22
1)
Current sense settling time tsIS(LC)
to IIS stable after positive
input slope on current load
V = 4.5 V
IN
V
DEN = 4.5 V
RIS = 1.2 kΩ
SENSE < 100 pF
C
IL= IL2 = 0.4 A to
IL = IL3 = 1 A
See Figure 22
Diagnostic Timing in Open Load Condition
1)
Current sense settling time tsIS(FAULT_OL_
–
–
50
–
µs
µs
V = 0V
P_7.5.22
P_7.5.23
IN
to IIS stable for open load
VDEN = 0 to 4.5 V
RIS = 1.2 kΩ
C
VOUT = VS = 28 V
2)
OFF)
detection in OFF state
SENSE < 100 pF
Current sense settling time tsIS(FAULT_OL_
–
200
V = 4.5 to 0V
IN
to IIS stable for open load
VDEN = 4.5 V
ON_OFF)
detection in ON-OFF
transition
RIS = 1.2 kΩ
CSENSE < 100 pF
VOUT = VS = 28 V
See Figure 25
Diagnostic Timing in Overload Condition
1) 3) 4)
Current sense settling time tsIS(FAULT)
to IIS stable for overload
detection
–
–
150
µs
P_7.5.24
VIN = VDEN = 0 to 4.5 V
RIS = 1.2 kΩ
CSENSE < 100 pF
VDS = 5 V
See Figure 18
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Diagnostic Functions
Table 10 Electrical Characteristics: Diagnostics (cont’d)
VS = 8 V to 36 V, TJ = -40°C to 150°C (unless otherwise specified).
Typical values are given at VS = 28 V, TJ = 25°C
Parameter
Symbol
Values
Typ.
350
Unit Note or
Test Condition
Number
Min.
Max.
2)
Current sense over current tsIS(OC_blank)
–
–
µs
V = VDEN = 4.5 V
P_7.5.32
IN
blanking time
RIS = 1.2 kΩ
SENSE < 100 pF
C
VDS = 5 V to 0 V
See Figure 18
1)
Diagnostic disable time
DEN transition to
IIS < 50% IL /kILIS
tsIS(OFF)
–
–
–
–
20
20
µs
V = 4.5 V
P_7.5.25
P_7.5.26
IN
VDEN = 4.5 V to 0 V
RIS = 1.2 kΩ
CSENSE < 100 pF
IL = IL3 = 1 A
See Figure 22
Current sense settling time tsIS(ChC)
µs
VIN0 = VIN1 = 4.5 V
from one channel to another
VDEN = 4.5 V
VDSEL = 0 to 4.5 V
RIS = 1.2 kΩ
C
SENSE < 100 pF
IL(OUT0) = IL3 = 1 A
L(OUT1) = IL2 = 0.4 A
See Figure 22
I
1) DSEL pin select channel 0 only.
2) Not subject to production test, specified by design
3) Functional Test only
4) Test at TJ = -40°C only
Datasheet
32
Rev.1.00
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PROFET™ +24 V
BTT6100-2ERA
Input Pins
8
Input Pins
8.1
Input Circuitry
The input circuitry is compatible with 3.3 and 5 V microcontrollers. The concept of the input pin is to react to
voltage thresholds. An implemented Schmitt trigger avoids any undefined state if the voltage on the input pin
is slowly increasing or decreasing. The output is either OFF or ON but cannot be in a linear or undefined state.
The input circuitry is compatible with PWM applications. Figure 27 shows the electrical equivalent input
circuitry. In case the pin is not needed, it must be left opened, or must be connected to device ground (and not
module ground) via a 10 kΩ input resistor.
IN
GND
Input circuitry .vsd
Figure 27 Input Pin Circuitry
8.2
DEN / DSEL Pin
The DEN and DSEL pins enable and disable the diagnostic functionality of the device. The pins have the same
structure as the INput pins, please refer to Figure 27.
8.3
Input Pin Voltage
The IN, DSEL and DEN use a comparator with hysteresis. The switching ON / OFF takes place in a defined
region, set by the thresholds VIN(L) Max. and VIN(H) Min. The exact value where the ON and OFF take place are
unknown and depends on the process, as well as the temperature. To avoid cross talk and parasitic turn ON
and OFF, a hysteresis is implemented. This ensures a certain immunity to noise.
Datasheet
33
Rev.1.00
2019-03-09
PROFET™ +24 V
BTT6100-2ERA
Input Pins
8.4
Electrical Characteristics
Table 11 Electrical Characteristics: Input Pins
VS = 8 V to 36 V, TJ = -40°C to 150°C (unless otherwise specified).
Typical values are given at VS = 28 V, TJ = 25°C
Parameter
Symbol
Values
Typ.
Unit Note or
Test Condition
Number
Min.
Max.
INput Pins Characteristics
Low level input voltage range VIN(L)
High level input voltage range VIN(H)
-0.3
2
–
0.8
6
V
See Chapter 9.5 P_8.4.1
See Chapter 9.5 P_8.4.2
1) See Chapter 9.5 P_8.4.3
–
V
Input voltage hysteresis
Low level input current
High level input current
VIN(HYS)
IIN(L)
IIN(H)
–
250
10
10
–
mV
µA
µA
1
25
25
VIN = 0.8 V
P_8.4.4
P_8.4.5
2
VIN = 5.5 V
See Chapter 9.5
DEN Pin
Low level input voltage range VDEN(L)
High level input voltage range VDEN(H)
-0.3
2
–
0.8
6
V
–
P_8.4.6
P_8.4.7
P_8.4.8
P_8.4.9
P_8.4.10
–
V
–
1)
Input voltage hysteresis
Low level input current
High level input current
DSEL Pin
VDEN(HYS)
IDEN(L)
–
250
10
10
–
mV
µA
µA
1
25
25
VDEN = 0.8 V
VDEN = 5.5 V
IDEN(H)
2
Low level input voltage range VDSEL(L)
High level input voltage range VDSEL(H)
-0.3
2
–
0.8
6
V
–
P_8.4.11
P_8.4.12
P_8.4.13
P_8.4.14
P_8.4.15
–
V
–
1)
Input voltage hysteresis
Low level input current
High level input current
VDSEL(HYS)
IDSEL(L)
–
250
10
10
–
mV
µA
µA
1
25
25
VDSEL = 0.8 V
VDSEL = 5.5 V
IDSEL(H)
2
1) Not subject to production test, specified by design
Datasheet
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Rev.1.00
2019-03-09
PROFET™ +24 V
BTT6100-2ERA
Characterization Results
9
Characterization Results
The characterization has been performed on 3 lots, with 3 devices each. Characterization has been performed
at 8 V, 28 V and 36 V over temperature range.
9.1
General Product Characteristics
P_4.2.3
P_4.2.4
5.000
4.800
4.600
4.400
4.200
4.000
3.800
3.600
3.400
3.200
5.000
4.500
4.000
3.500
3.000
2.500
8V
28V
36V
8V
28V
36V
2.000
-50
3.000
-50
-25
0
25
50
75
100
125
150
-25
0
25
50
75
100
125
150
Temperature [°C]
Temperature [°C]
Minimum Functional Supply Voltage
S(OP)_MIN = f(TJ)
Undervoltage Threshold VS(UV) = f(TJ)
V
P_4.2.6
P_4.2.7, P_4.2.10
4.500
4.000
3.500
3.000
2.500
2.000
1.500
1.000
0.500
3.000
2.500
2.000
1.500
1.000
0.500
0.000
8V
28V
36V
8V
28V
36V
0.000
-50
-25
0
25
50
75
100
125
150
-50
-25
0
25
50
75
100
125
150
Temperature [°C]
Temperature [°C]
Current Consumption for Whole Device with
Standby Current for Whole Device with
Load Channels Active IGND_2 = f(TJ;VS)
Load IS(OFF)= f(TJ;VS)
Datasheet
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Rev.1.00
2019-03-09
PROFET™ +24 V
BTT6100-2ERA
Characterization Results
9.2
Power Stage
P_5.5.4
P_5.5.5
20.000
18.000
16.000
14.000
12.000
10.000
8.000
75.000
74.000
73.000
72.000
71.000
70.000
69.000
68.000
67.000
66.000
6.000
4.000
8V
8V
28V
36V
28V
36V
2.000
0.000
65.000
-50
-50
-25
0
25
50
75
100
125
150
-25
0
25
50
75
100
125
150
Temperature [°C]
Temperature [°C]
Output Voltage Drop Limitation at Low
Drain to Source Clamp Voltage VDS(AZ) = f(TJ)
Load Current VDS(NL) = f(TJ)
P_5.5.11
P_5.5.12
2.000
1.800
1.600
1.400
1.200
1.000
0.800
0.600
0.400
0.200
0.000
2.000
1.800
1.600
1.400
1.200
1.000
0.800
0.600
0.400
0.200
0.000
8V
8V
28V
36V
28V
36V
-50
-25
0
25
50
75
100
125
150
-50
-25
0
25
50
75
100
125
150
Temperature [°C]
Temperature [°C]
Slew Rate at Turn ON
dV/dtON = f(TJ;VS), RL = 25 Ω
Slew Rate at Turn OFF
-dV/dtOFF = f(TJ;VS), RL = 25 Ω
Datasheet
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PROFET™ +24 V
BTT6100-2ERA
Characterization Results
P_5.5.14
P_5.5.15
80.000
70.000
60.000
50.000
40.000
30.000
20.000
10.000
0.000
90.000
80.000
70.000
60.000
50.000
40.000
30.000
20.000
10.000
8V
8V
28V
36V
28V
36V
0.000
-50
-50
-25
0
25
50
75
100
125
150
-25
0
25
50
75
100
125
150
Temperature [°C]
Temperature [°C]
Turn ON tON = f(TJ;VS), RL = 25 Ω
Turn OFF tOFF = f(TJ;VS), RL = 25 Ω
P_5.5.19
P_5.5.20
450.000
400.000
350.000
300.000
250.000
200.000
150.000
100.000
50.000
500
450
400
350
300
250
200
150
100
50
8V
8V
28V
36V
28V
36V
0.000
0
-50
-25
0
25
50
75
100
125
150
-50
-25
0
25
50
75
100
125
150
Temperature [°C]
Temperature [°C]
Switch ON Energy EON = f(TJ;VS), RL = 25 Ω
Switch OFF Energy EOFF = f(TJ;VS), RL = 25 Ω
Datasheet
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Rev.1.00
2019-03-09
PROFET™ +24 V
BTT6100-2ERA
Characterization Results
9.3
Protection Functions
P_6.6.4
25.000
20.000
15.000
10.000
5.000
8V
28V
36V
0.000
-50
-25
0
25
50
75
100
125
150
Temperature [°C]
Overload Condition in the Low Voltage Area
L5(SC) = f(TJ)
I
Datasheet
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Rev.1.00
2019-03-09
PROFET™ +24 V
BTT6100-2ERA
Characterization Results
9.4
Diagnostic Mechanism
P_7.5.2
1.400
16.000
1.200
1.000
0.800
0.600
0.400
0.200
0.000
15.000
14.000
13.000
12.000
11.000
8V
8V
28V
36V
28V
36V
10.000
-50
-50
-25
0
25
50
75
100
125
150
-25
0
25
50
75
100
125
150
Temperature [°C]
Temperature [°C]
Current Sense at no Load
Open Load Detection ON State Threshold
IIS = f(TJ;VS), IL = 0 A
IL(OL)= f(TJ)
P_7.5.3
P_7.5.7
75.000
74.000
73.000
72.000
71.000
70.000
69.000
68.000
67.000
66.000
65.000
20.000
18.000
16.000
14.000
12.000
10.000
8.000
6.000
4.000
8V
8V
28V
36V
28V
36V
2.000
0.000
-50
-25
0
25
50
75
100
125
150
-50
-25
0
25
50
75
100
125
150
Temperature [°C]
Temperature [°C]
Sense Signal Maximum Voltage
IS(AZ) = f(TJ)
Sense Signal Maximum Current in Fault
Condition IIS(FAULT)= f(TJ; VS)
V
Datasheet
39
Rev.1.00
2019-03-09
PROFET™ +24 V
BTT6100-2ERA
Characterization Results
9.5
Input Pins
P_8.4.1
P_8.4.2
1.500
1.450
1.400
1.350
1.300
1.250
1.200
1.150
1.100
1.050
1.800
1.750
1.700
1.650
1.600
1.550
1.500
1.450
8V
8V
28V
36V
28V
36V
1.000
-50
1.400
-50
-25
0
25
50
75
100
125
150
-25
0
25
50
75
100
125
150
Temperature [°C]
Temperature [°C]
Input Voltage Threshold
IN(L)= f(TJ;VS)
Input Voltage Threshold
VIN(H)= f(TJ;VS)
V
P_8.4.3
P_8.4.5
500.000
450.000
400.000
350.000
300.000
250.000
200.000
150.000
100.000
50.000
16.000
14.000
12.000
10.000
8.000
6.000
4.000
2.000
0.000
8V
8V
28V
36V
28V
36V
0.000
-50
-25
0
25
50
75
100
125
150
-50
-25
0
25
50
75
100
125
150
Temperature [°C]
Temperature [°C]
Input Voltage Hysteresis
IN(HYS)= f(TJ;VS)
Input Current High Level
IIN(H)= f(TJ)
V
Datasheet
40
Rev.1.00
2019-03-09
PROFET™ +24 V
BTT6100-2ERA
Application Information
10
Application Information
Note:
The following information is given as a hint for the implementation of the device only and shall not
be regarded as a description or warranty of a certain functionality, condition or quality of the device.
VBAT
Voltage Regulator
OUT VS
T1
GND
CVDD
Z
CVS
VS
VDD
GPIO
RDEN
DEN
GPIO
RDSEL
DSEL
OUT0
Microcontroller
GPIO
OUT4
IN0
IN1
RIN
RIN
COUT
Valve
GPIO
OUT1
COUT
IS
RSENSE
ADC IN
GND
GND
Bulb
CSENSE
D
Figure 28 Application Diagram with BTT6100-2ERA
Note:
This is a very simplified example of an application circuit. The function must be verified in the real
application.
Table 12 Bill of Material
Reference Value
Purpose
RIN
10 kΩ
Protection of the microcontroller during overvoltage, reverse polarity
Guarantee BTT6100-2ERA channels OFF during loss of ground
RDEN
RDSEL
RPD
10 kΩ
10 kΩ
47 kΩ
Protection of the microcontroller during overvoltage, reverse polarity
Protection of the microcontroller during overvoltage, reverse polarity
Polarization of the output for short circuit to VS detection
Improve BTT6100-2ERA immunity to electromagnetic noise
Datasheet
41
Rev.1.00
2019-03-09
PROFET™ +24 V
BTT6100-2ERA
Application Information
Table 12 Bill of Material (cont’d)
Reference Value
Purpose
ROL
1.5 kΩ
Ensures polarization of the BTT6100-2ERA output during open load in OFF
diagnostic
RIS
1.2 kΩ
4.7 kΩ
Sense resistor
RSENSE
Overvoltage, reverse polarity, loss of ground. Value to be tuned with micro
controller specification.
CSENSE
COUT
T1
100 pF
Sense signal filtering.
10 nF
Protection of the device during ESD and BCI
Switch the battery voltage for open load in OFF diagnostic
Protection of the BTT6100-2ERA during overvoltage
Protection of the BTT6100-2ERA during reverse polarity
Dual NPN/PNP
27 Ω
RGND
D
BAS21
Z
58 V Zener diode Protection of the device during overvoltage
100 nF Filtering of voltage spikes at the battery line
CVS
10.1
Further Application Information
•
•
•
Please contact us to get the pin FMEA
Existing App. Notes
For further information you may visit www.infineon.com
Datasheet
42
Rev.1.00
2019-03-09
PROFET™ +24 V
BTT6100-2ERA
Package Outlines
11
Package Outlines
1)
3.9 0.1
1)
8.65 0.1
14x
SEATING COPLANARITY
PLANE
0.67 0.25
6 0.2
2)
0.4 0.05
14x
BOTTOM VIEW
14
8
8
7
14
1
7
1
INDEX
MARKING
6.4 0.1
1.27
All dimensions are in units mm
The drawing is in compliance with ISO 128-30, Projection Method 1[
]
1)
2)
Does not Include plastic or metal protrusion of 0.15 max. per side
Dambar protrusion shall be maximum 0.1mm total in excess of width lead width
Figure 29 PG-TDSO-14 (Plastic Dual Small Outline Package) (RoHS-Compliant)
Green Product (RoHS compliant)
To meet the world-wide customer requirements for environmentally friendly products and to be compliant
with government regulations the device is available as a green product. Green products are RoHS-Compliant
(i.e Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020).
Datasheet
43
Rev.1.00
2019-03-09
PROFET™ +24 V
BTT6100-2ERA
Revision History
12
Revision History
Version
Date
Changes
1.00
2019-03-09
Creation of the datasheet
Datasheet
44
Rev.1.00
2019-03-09
PROFET™ +24 V
BTT6100-2ERA
Table of Contents
1
2
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
3
Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Pin Assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Pin Definitions and Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Voltage and Current Definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3.1
3.2
3.3
4
4.1
4.2
4.3
4.3.1
4.3.2
General Product Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Functional Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Thermal Resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
PCB Set-Up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Thermal Impedance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
5
Power Stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Output ON-State Resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Turn ON/OFF Characteristics with Resistive Load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Inductive Load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Output Clamping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Maximum Load Inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Inverse Current Capability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Electrical Characteristics Power Stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
5.1
5.2
5.3
5.3.1
5.3.2
5.4
5.5
6
Protection Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Loss of Ground Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Undervoltage Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Overvoltage Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Reverse Polarity Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Overload Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Current Limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Temperature Limitation in the Power DMOS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Electrical Characteristics for the Protection Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
6.1
6.2
6.3
6.4
6.5
6.5.1
6.5.2
6.6
7
7.1
7.2
7.3
Diagnostic Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
IS Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
SENSE Signal in Different Operating Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
SENSE Signal in the Nominal Current Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
SENSE Signal Variation as a Function of Temperature and Load Current . . . . . . . . . . . . . . . . . . . . . . . 25
SENSE Signal Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
SENSE Signal in Open Load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Open Load in ON Diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Open Load in OFF Diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Open Load Diagnostic Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
SENSE Signal with OUT in Short Circuit to VS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
SENSE Signal in Case of Overload . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
SENSE Signal in Case of Inverse Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Electrical Characteristics Diagnostic Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
7.3.1
7.3.2
7.3.3
7.3.3.1
7.3.3.2
7.3.3.3
7.3.4
7.3.5
7.3.6
7.4
8
Input Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
8.1
Input Circuitry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Datasheet
45
Rev.1.00
2019-03-09
PROFET™ +24 V
BTT6100-2ERA
8.2
8.3
8.4
DEN / DSEL Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Input Pin Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
9
Characterization Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
General Product Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Power Stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Protection Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Diagnostic Mechanism . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Input Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
9.1
9.2
9.3
9.4
9.5
10
Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
10.1
Further Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
11
12
Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
Table of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
Datasheet
46
Rev.1.00
2019-03-09
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Document reference
BTT6100-2ERA
相关型号：
BTT6200-1ENA
The power transistor is built by an N-channel vertical power MOSFET with charge pump. The device is integrated in Smart6 HV technology. It is especially designed to drive lamps up to 1 x R10W 24 V or 1 x R5W 12 V, as well as LEDs in the harsh automotive environment.
INFINEON
BTT6200-4ESA
The power transistor is built by an N-channel vertical power MOSFET with charge pump. The device is integrated in Smart6 HV technology. It is specially designed to drive lamps up to R10 W 24 V or R5 W 12 V, as well as LEDs in the harsh automotive environment.
INFINEON
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