CHL8318 [INFINEON]
DIGITAL MULTI-PHASE BUCK CONTROLLER;
| 型号： | CHL8318 |
| 厂家： | 
Infineon |
| 描述： | DIGITAL MULTI-PHASE BUCK CONTROLLER |
| 文件： | 总4页 (文件大小：194K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PRODUCT BRIEF
CHL8318
DIGITAL MULTI-PHASE BUCK CONTROLLER
FEATURES
DESCRIPTION
The CHL8318 is a 8-phase digital synchronous buck
controller for core regulation of high-performance INTEL®
VR11.1 and VR11.0 platforms. The CHL8318 is fully
compliant with VR11.1 including Power Status Indicator
(PSI) and for improved light load efficiency and accurate
current output (IMON).
Intel VR11.x compliant Digital PWM Controller
Programmable 1-phase to 8-phase operation
Configurable switching frequency from 200 kHz to
1MHz per phase with accuracy better than 2%
Customized Digital Over-Clocking Features
o
o
Easy-to-use SMBus Gamer command
The CHiL CHL8318 includes a customized set of digital
over-clocking features which require no external
components. Gaming applications can use the SMBus
interface to place the VRD into “Gamer Mode”. Gamer Mode
features include Extended Gamer VID up to 2.3V with 6.25
mV resolution, Gamer Vmax, CPU VID Override or Track,
Digital Load-Line adjust, Gamer OC/OVP and Gamer OFF
pin.
Gamer VID control up to 2.3V, Gamer Vmax,
VID Override or Track, Digital Load-Line Adjust,
Gamer OC/OVP, Gamer OFF pin, Gamer OTP
CHiL Efficiency Shaping Features
o
o
Variable Gate Drive
Dynamic Phase Control
1-phase to 4-phase PSI for Light Loads
The CHL8318 deploys a number of efficiency shaping
features. The CHL8318 can be configured to optimize
MOSFET gate drive versus load current, PSI can be
programmed to be up to four phases for optimum light-load
efficiency, and the controller can autonomously add/drop
phases in low-current and mid-current regions to deliver
90+% efficiency across the entire load range.
Adaptive Transient Algorithm minimizes output bulk
capacitors
Designed for use with coupled inductors
Enables Thermal Phase Balancing
SMBus Fault Indicators: OVP, UVP, OCP, OTP
SMBus interface for configuring and monitoring; SMBus
commands include monitoring input current and power
CHiL’s unique Adaptive Transient Algorithm, based on non-
linear digital PWM algorithms, minimizes output bulk
capacitors. Coupled inductor mode of operation allows two
phase PSI and add/drop of phases which are 180°out of
phase for further improvement in transient response and
form factor.
Compatible with CHiL ATL Drivers and tri-state Drivers
Nine bytes of NVM storage available for customer use
+3.3V supply voltage; 0ºC to 85ºC Ambient operation
RoHS Compliant, MSL level 1 package
CHL8318 supports three NTC temperature sensors to report
temperature and trigger VR HOT and OTP faults. Digital
thermal balancing allows proportional current imbalance
between phases.
48
56 55 54 53 52 51 50 49
47 46 45 44 43
RCSP
RCSM
VCC
1
42
41
40
39
38
37
IRTN8
ISEN8
The CHL8318 provides extensive OVP, UVP, OCP and OTP
fault protection. Device and fault configuration parameters
are easily defined using the CHiL Intuitive Power Designer
(IPD) GUI and stored in on-chip non-volatile memory (NVM).
2
3
VCC
VCPU
4
PWM8
CHiL
CHL8318
56 Pin
8mmx8mm
QFN
TOP VIEW
VRTN
SADDR/
GAMER_OFF
5
PWM7
PWM6
PWM5
PWM4
6
The 3-pin SMBus interface can be used to monitor a variety
of operating parameters on up to seven CHL8318 based
VRs. The controller includes a unique sensorless and
lossless input current monitoring capability.
7
36
35
IMON
RRES
8
9
VINSEN
TSEN1
34
33
32
31
PWM3
PWM2
PWM1
10
11
12
13
14
GND
TSEN2
TSEN3
EN
The CHL8318 truly simplifies VRD design and enables
fastest time-to-market with its “set-and-forget” methodology.
NC
30
29
VCC
V18A
VAR_GATE
15 16 17 18 19 20 21 22 23 24 25 26 27 28
APPLICATIONS
Intel® VR11.x CPU VRD and VRM; DDR Memory
High Performance Desktops and Servers
Over-clocking and High-Efficiency Applications
Figure 1. CHL8318 56 Pin QFN Package
Trademarks and registered trademarks are the property of the respective
owners.
One Highwood Drive, Tewksbury, MA 01876
Tel: +1(978)-640-0011
www.chilsemi.com
© 2009 CHiL Semiconductor Corp. All rights reserved
Page 1 of 4
PB0006 Rev. 1.00, October 26, 2009
CHL8318
PRODUCT BRIEF
DIGITAL MULTI-PHASE BUCK CONTROLLER
FUNCTIONAL BLOCK DIAGRAM
RRES
V18A
3.3V
LDO
VID0
VID1
1.8V
Reference
Vref
VID2
VID3
VID4
VID5
VID6
VID7
VID decode
and DAC
Digital Processor
PID +
Controller
OVP
PWM1
PWM2
PWM3
PWM4
PWM5
Voltage
Error
ADC
VCPU
VRTN
Σ
Transient
Controller
PWM
Generator
ISEN1
IRTN1
ISEN2
IRTN2
ISEN3
IRTN3
ISEN4
IRTN4
ISEN5
IRTN5
ISEN6
IRTN6
ISEN7
IRTN7
ISEN8
IRTN8
PWM6
PWM7
PWM8
Channel Current Sense
Current
Balance
RCSP
RCSM
Monitor
ADC
TSEN1
TSEN2
TSEN3
VINSEN
EN
VAR_GATE
IMON
OVP
Oscillator, NVM
State Control, and
Monitoring
Current
Monitor
SADDR/
GAMER_OFF
PSI
SDA
SCL
SMBus
Interface
VR_Ready
GND
SALERT
VRHOT
Figure 2. Functional Block Diagram
Page 2 of 4
PB0006
Rev. 1.00, October 26, 2009
CHL8318
PRODUCT BRIEF
DIGITAL MULTI-PHASE BUCK CONTROLLER
TYPICAL APPLICATIONS
12V
BOOT
1
HI_GATE
V_CPU
Vcc
RCSP
RCSM
Rseries
HVCC SWITCH
LVCC
PWM
MODE
V_VGD
CCS
L
RTh
RCS
LO_GATE
GND
O
A
D
32
55
56
Rseries
PWM1
ISEN1
IRTN1
2
CHL8510
+3.3V
3
30
40
12V
BOOT
Vcc
HVCC SWITCH
LVCC
PWM
VCC
HI_GATE
V_VGD
4
5
6
VCPU
VRTN
LO_GATE
33
53
54
MODE
GND
PWM 2
SADDR/
GAMER_OFF
CHL8510
ISEN2
IRTN2
12V
7
To
CPU
IMON
BOOT
Vcc
C_IMON
R_IMON
HI_GATE
HVCC SWITCH
LVCC
V_VGD
CHL8318
LO_GATE
PWM
VRTN
34
51
52
MODE
GND
PWM3
ISEN3
IRTN3
CHL8510
8
RRES
+12V
12V
RVIN_1
9
VINSEN
TSEN1
BOOT
Vcc
HVCC
LVCC
HI_GATE
SWITCH
RVIN_2
10
V_VGD
RTh
LO_GATE
GND
PWM
MODE
35
49
50
PWM4
ISEN4
IRTN4
11
12
CHL8510
TSEN2
TSEN3
RTh
12V
BOOT
Vcc
RTh
HI_GATE
HVCC SWITCH
LVCC
V_VGD
LO_GATE
PWM
MODE
36
47
48
GND
PWM5
ISEN5
IRTN5
From
System
13
14
EN
CHL8510
V18A
12V
BOOT
Vcc
HI_GATE
+3.3V
HVCC SWITCH
LVCC
V_VGD
LO_GATE
PWM
MODE
37
45
46
15
16
17
GND
SALERT#
SDA
PWM6
ISEN6
IRTN6
CHL8510
SCL
12V
18
19
PSI#
VID7
VID6
VID5
VID4
VID3
VID2
VID1
VID0
BOOT
Vcc
HVCC SWITCH
LVCC
PWM
HI_GATE
V_VGD
20
21
22
23
LO_GATE
MODE
38
43
44
GND
PWM7
ISEN7
IRTN7
CHL8510
12V
BOOT
Vcc
HVCC SWITCH
LVCC
PWM
MODE
24
25
26
HI_GATE
V_VGD
LO_GATE
GND
39
41
42
PWM8
ISEN8
IRTN8
CHL8510
27
28
VR_READY
VR_HOT
To
CPU
12V
BOOT
Vcc
HI_GATE
31
29
NC
HVCC SWITCH
LVCC
LO_GATE
PWM
V_VGD
MODE
GND
VAR_GATE
CHL8510
Optional Variable
Gate Drive Circuit
GND
Figure 3. 8-phase VRD using CHL8318 Controller and CHL8510 MOSFET drivers
Page 3 of 4
PB0006
Rev. 1.00, October 26, 2009
CHL8318
PRODUCT BRIEF
DIGITAL MULTI-PHASE BUCK CONTROLLER
ORDERING INFORMATION
CHL8318
Package
QFN
Tape & Reel Qty
Part Number
CHL8318CRT
3000
T: Tape & Reel
Package type
R : QFN
Operating Temperature Range
C: Commercial Standard
PACKAGE INFORMATION
Page 4 of 4
PB0006
Rev. 1.00, October 26, 2009
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