ESD113-B1-02ELS [INFINEON]
Pb-free and halogen-free package;
| 型号： | ESD113-B1-02ELS |
| 厂家： | 
Infineon |
| 描述： | Pb-free and halogen-free package |
| 文件： | 总16页 (文件大小：740K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Protection Device
TVS (Transient Voltage Suppressor)
ESD113-B1 Series
Bi-directional, 3.6 V, 0.2 pF, 0201, 0402, RoHS and Halogen Free compliant
ESD113-B1-02ELS
ESD113-B1-02EL
Data Sheet
Revision 1.2, 2014-05-14
Final
Power Management & Multimarket
Edition 2014-05-14
Published by
Infineon Technologies AG
81726 Munich, Germany
© 2014 Infineon Technologies AG
All Rights Reserved.
Information
For further information on technology, delivery terms and conditions and prices, please contact the nearest
Infineon Technologies Office (www.infineon.com)
Warnings
Due to technical requirements, components may contain dangerous substances. For information on the types in
question, please contact the nearest Infineon Technologies Office.
Infineon Technologies components may be used in life-support devices or systems only with the express written
approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure
of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support
devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain
and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may
be endangered.
ESD113-B1 Series
Product Overview
1
Product Overview
1.1
Features
•
ESD / transient protection of high speed data lines according to:
– IEC61000-4-2 (ESD): ±20 kV (air / contact)
– IEC61000-4-4 (EFT): ±2.5 kV / ±50 A (5/50 ns)
– IEC61000-4-5 (surge): ±3 A (8/20 μs)
•
•
•
•
•
•
Bi-directional, working voltage up to: VRWM = ±3.6 V
Ultra low capacitance CL = 0.20 pF (typical) at f = 1 GHz
Very low clamping voltage: VCL = 14 V (typical) at ITLP = 16 A
Very low reverse current. IR < 1 nA (typical)
Very low dynamic resistance: RDYN = 0.45 Ω (typical)
Pb-free and halogen-free package (RoHS compliant)
1.2
Application Examples
•
•
USB 3.0, Firewire, DVI, HDMI, S-ATA, DisplayPort, Thunderbolt
Mobile HDMI Link, MDDI, MIPI, SWP / NFC
1.3
Product Description
Pin 1 marking
(lasered)
Pin 1
Pin 1
Pin 2
Pin 2
PinConf_and_SchematicDiag.vsd
Figure 1-1 Pin Configuration and Schematic Diagram
Table 1-1 Part Information
Type
Package
Configuration
Marking code
ESD113-B1-02ELS
ESD113-B1-02EL
TSSLP-2-4
TSLP-2-20
1 line, bi-directional
1 line, bi-directional
2
CC
Final Data Sheet
3
Revision 1.2, 2014-05-14
ESD113-B1 Series
Maximum Ratings
2
Maximum Ratings
Table 2-1 Maximum Rating at TA = 25 °C, unless otherwise specified1)
Parameter
Symbol
Values
Unit
ESD air discharge2)
VESD
±20
±20
36
kV
ESD contact discharge2)
Peak pulse power
Peak pulse current3)
PPK
IPP
W
A
±3
Operating temperature
TOP
Tstg
-55 to 125
-65 to 150
°C
°C
Storage temperature
1) Device is electrically symmetrical
2) VESD according to IEC61000-4-2
3) Non-repetitive current pulse 8/20 µs exponential decay waveform according to IEC61000-4-5
Attention: Stresses above the max. values listed here may cause permanent damage to the device.
Exposure to absolute maximum rating conditions for extended periods may affect device
reliability. Maximum ratings are absolute ratings; exceeding only one of these values may
cause irreversible damage to the component.
3
Electrical Characteristics at TA = 25 °C, unless otherwise specified
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Figure 3-1 Definitions of electrical characteristics
Final Data Sheet
4
Revision 1.2, 2014-05-14
ESD113-B1 Series
Electrical Characteristics at TA = 25 °C, unless otherwise specified
1)
Table 3-1 DC Characteristics at TA = 25 °C, unless otherwise specified
Parameter Symbol Values
Typ.
Unit
Note / Test Condition
Min.
-3.6
4
Max.
3.6
–
Reverse working voltage VRWM
–
V
Trigger voltage
Holding voltage
Vt1
Vh
–
4
4.6
<1
5.5
20
IT = 10 mA
VR = 3.3 V
Reverse leakage current IR
–
nA
1) Device is electrically symmetrical
Table 3-2 AC Characteristics at TA = 25 °C, unless otherwise specified
Parameter
Symbol
Values
Typ.
Unit
pF
Note / Test Condition
Min.
Max.
0.35
–
Line capacitance
Series inductance
CL
–
–
0.2
0.2
VR = 0 V, f = 1 MHz
VR = 0 V, f = 1 GHz
LS
–
–
0.2
0.4
–
–
nH
ESD113-B1-02ELS
ESD113-B1-02EL
1)
Table 3-3 ESD and Surge Characteristics at TA = 25 °C, unless otherwise specified
Parameter
Symbol
Values
Typ.
Unit
Note / Test Condition
Min.
Max.
Clamping voltage2)
Clamping voltage3)
Dynamic resistance2)
VCL
–
–
–
–
–
14
20
6
–
–
–
–
–
V
I
I
I
I
TLP = 16 A, tp = 100 ns
TLP = 30 A, tp = 100 ns
PP = 1 A, tp = 8/20 μs
PP = 3 A, tp = 8/20 μs
8
RDYN
0.45
Ω
tp = 100 ns
1) Device is electrically symmetrical
2) Please refer to Application Note AN210[1].TLP parameter: Z0 = 50 Ω , tp = 100ns, tr = 300ps.
3) Non-repetitive current pulse 8/20µs exponential decay waveform according to IEC61000-4-5
Final Data Sheet
5
Revision 1.2, 2014-05-14
ESD113-B1 Series
Typical Characteristics Diagrams
4
Typical Characteristics Diagrams
Typical characteristics diagrams at TA=25°C, unless otherwise specified
-6
10
-7
10
-8
10
-9
10
-10
10
-11
10
-12
10
-4
-3
-2
-1
0
1
2
3
4
V [V]
R
Figure 4-1 Reverse leakage current IR = f(VR)
0.6
0.5
0.4
0.3
0.2
0.1
0
1 MHz
1 GHz
-4
-3
-2
-1
0
1
2
3
4
V [V]
R
Figure 4-2 Line capacitance CL = f(VR)
Final Data Sheet
6
Revision 1.2, 2014-05-14
ESD113-B1 Series
Typical Characteristics Diagrams
0.5
0.4
0.3
0.2
0.1
0
V = 0 V
R
0
1
2
3
4
5
6
7
8
9
10
f [GHz]
Figure 4-3 Line capacitance: CL = f(f), VR = 0 V
0
-0.1
-0.2
-0.3
-0.4
-0.5
-0.6
-0.7
-0.8
-0.9
-1
V = 0 V
R
0
1
2
3
4
5
6
7
8
9
10
f [GHz]
Figure 4-4 Insertion loss vs. frequency in a 50 ꢀ system
Final Data Sheet
7
Revision 1.2, 2014-05-14
ESD113-B1 Series
Typical Characteristics Diagrams
200
175
150
125
100
75
Scope: 6 GHz, 20 GS/s
V
= 134 V
= 12 V
CL-max-peak
V
CL-30ns-peak
50
25
0
-25
-50
0
100
200
300
400
t [ns]
p
Figure 4-5 Clamping voltage (ESD): VCL = f(t), 8 kV positiv pulse from pin 1 to pin 2
50
Scope: 6 GHz, 20 GS/s
25
0
-25
-50
-75
-100
-125
-150
-175
-200
V
= -134 V
= -12 V
CL-max-peak
V
CL-30ns-peak
0
100
200
300
400
t [ns]
p
Figure 4-6 Clamping voltage (ESD): VCL = f(t), 8 kV negativ pulse from pin 1 to pin 2
Final Data Sheet
8
Revision 1.2, 2014-05-14
ESD113-B1 Series
Typical Characteristics Diagrams
200
175
150
125
100
75
Scope: 6 GHz, 20 GS/s
V
= 182 V
= 18 V
CL-max-peak
V
CL-30ns-peak
50
25
0
-25
-50
0
100
200
300
400
t [ns]
p
Figure 4-7 Clamping voltage (ESD): VCL = f(t), 15 kV positiv pulse from pin 1 to pin 2
50
Scope: 6 GHz, 20 GS/s
25
0
-25
-50
-75
-100
-125
-150
-175
-200
V
= -179 V
= -18 V
CL-max-peak
V
CL-30ns-peak
0
100
200
300
400
t [ns]
p
Figure 4-8 Clamping voltage (ESD): VCL = f(t), 15 kV negativ pulse from pin 1 to pin 2
Final Data Sheet
9
Revision 1.2, 2014-05-14
ESD113-B1 Series
Typical Characteristics Diagrams
ESD113-B1 Series
R
DYN
40
30
20
15
10
5
R
= 0.45 Ω
DYN
20
10
0
0
-10
-20
-30
-40
-5
-10
-15
-20
R
= 0.45 Ω
DYN
-40
-30
-20
-10
0
10
20
30
40
V
[V]
TLP
Figure 4-9 Clamping voltage (TLP): ITLP = f(VTLP) [1], pin 1 to pin 2
Final Data Sheet
10
Revision 1.2, 2014-05-14
ESD113-B1 Series
Typical Characteristics Diagrams
4
3
2
1
0
-1
-2
-3
-4
-10 -9 -8 -7 -6 -5 -4 -3 -2 -1 0
1
2
3
4
5
6
7
8
9 10
V
[V]
CL
Figure 4-10 Clamping voltage (Surge): IPP = f(VCL) [1], pin 1 to pin 2
Final Data Sheet
11
Revision 1.2, 2014-05-14
ESD113-B1 Series
Package Information
5
Package Information
5.1
TSSLP-2-4
Top view
Bottom view
+0ꢀ01
-0ꢀ02
0ꢀ31
0ꢀ0ꢁ
0ꢀ32
2
1
1)
0ꢀ0ꢁ MAXꢀ
0ꢀ03ꢁ
0ꢀ26
Pin 1
marking
1) Dimension applies to plated terminals
TSSLP-2-3, -4-PO V01
Figure 5-1 TSSLP-2-4 Package outline (dimension in mm)
0ꢀ32
0ꢀ27
Copper
Solder mask
Stencil apertures
TSSLP-2-3, -4-FP V02
Figure 5-2 TSSLP-2-4 Footprint (dimension in mm)
0ꢀ3ꢁ
4
Tape type
Punched Tape
Ex Ey
0ꢀ43 0ꢀ73
Embossed Tape 0ꢀ37 0ꢀ67
Deliveries can be both tape types (no selection possible)ꢀ
Specification allows identical processing (pick & place) by usersꢀ
Pin 1
marking
Ex
TSSLP-2-3, -4-TP V03
Figure 5-3 TSSLP-2-4 Packing (dimension in mm)
Type code
Pin 1 marking
TSSLP-2-3, -4-MK V01
Figure 5-4 TSSLP-2-4 Marking example Table 1-1 “Part Information” on Page 3
Final Data Sheet
12
Revision 1.2, 2014-05-14
ESD113-B1 Series
Package Information
5.2
TSLP-2-20
Top view
Bottom view
+±0±1
-±0±2
±0ꢁ1
±±0±ꢀ
±06
±0±ꢀ MAX0
2
1
1)
±±0±ꢁꢀ
±0ꢀ
Pin 1
marking
1) Dimension applies to plated terminals
Figure 5-5 TSLP-2-20 Package outline (dimension in mm)
0.6
0.45
Copper
Solder mask
Stencil apertures
TSLP-2-19, -20-FP V01
Figure 5-6 TSLP-2-20 Footprint (dimension in mm)
±04
4
Pin 1
marking
±076
TSLP-2-19, -2±-TP V±2
Figure 5-7 TSLP-2-20 Packing (dimension in mm)
Type code
12
Pin 1 marking
TSLP-2-19, -2±-MK V±1
Figure 5-8 TSSLP-2-4 Marking example Table 1-1 “Part Information” on Page 3
Final Data Sheet
13
Revision 1.2, 2014-05-14
ESD113-B1 Series
References
References
[1] Infineon AG - Application Note AN210: Effective ESD Protection Design at System Level Using VF-TLP
Characterization Methodology
[2] Infineon AG - Recommendations for PCB Assembly of Infineon TSLP and TSSLP Package
Final Data Sheet
14
Revision 1.2, 2014-05-14
ESD113-B1 Series
Revision History: Rev.1.1, 2013-02-06
Page or Item
Subjects (major changes since previous revision)
Revision 1.2, 2014-05-14
All
New type ESD113-B1-02EL inserted
Trademarks of Infineon Technologies AG
AURIX™, BlueMoon™, C166™, CanPAK™, CIPOS™, CIPURSE™, COMNEON™, EconoPACK™, CoolMOS™,
CoolSET™, CORECONTROL™, CROSSAVE™, DAVE™, EasyPIM™, EconoBRIDGE™, EconoDUAL™,
EconoPIM™, EiceDRIVER™, eupec™, FCOS™, HITFET™, HybridPACK™, I²RF™, ISOFACE™, IsoPACK™,
MIPAQ™, ModSTACK™, my-d™, NovalithIC™, OmniTune™, OptiMOS™, ORIGA™, PRIMARION™,
PrimePACK™, PrimeSTACK™, PRO-SIL™, PROFET™, RASIC™, ReverSave™, SatRIC™, SIEGET™,
SINDRION™, SIPMOS™, SMARTi™, SmartLEWIS™, SOLID FLASH™, TEMPFET™, thinQ!™,
TRENCHSTOP™, TriCore™, X-GOLD™, X-PMU™, XMM™, XPOSYS™.
Other Trademarks
Advance Design System™ (ADS) of Agilent Technologies, AMBA™, ARM™, MULTI-ICE™, KEIL™,
PRIMECELL™, REALVIEW™, THUMB™, µVision™ of ARM Limited, UK. AUTOSAR™ is licensed by AUTOSAR
development partnership. Bluetooth™ of Bluetooth SIG Inc. CAT-iq™ of DECT Forum. COLOSSUS™,
FirstGPS™ of Trimble Navigation Ltd. EMV™ of EMVCo, LLC (Visa Holdings Inc.). EPCOS™ of Epcos AG.
FLEXGO™ of Microsoft Corporation. FlexRay™ is licensed by FlexRay Consortium. HYPERTERMINAL™ of
Hilgraeve Incorporated. IEC™ of Commission Electrotechnique Internationale. IrDA™ of Infrared Data
Association Corporation. ISO™ of INTERNATIONAL ORGANIZATION FOR STANDARDIZATION. MATLAB™ of
MathWorks, Inc. MAXIM™ of Maxim Integrated Products, Inc. MICROTEC™, NUCLEUS™ of Mentor Graphics
Corporation. Mifare™ of NXP. MIPI™ of MIPI Alliance, Inc. MIPS™ of MIPS Technologies, Inc., USA. muRata™
of MURATA MANUFACTURING CO., MICROWAVE OFFICE™ (MWO) of Applied Wave Research Inc.,
OmniVision™ of OmniVision Technologies, Inc. Openwave™ Openwave Systems Inc. RED HAT™ Red Hat, Inc.
RFMD™ RF Micro Devices, Inc. SIRIUS™ of Sirius Satellite Radio Inc. SOLARIS™ of Sun Microsystems, Inc.
SPANSION™ of Spansion LLC Ltd. Symbian™ of Symbian Software Limited. TAIYO YUDEN™ of Taiyo Yuden
Co. TEAKLITE™ of CEVA, Inc. TEKTRONIX™ of Tektronix Inc. TOKO™ of TOKO KABUSHIKI KAISHA TA.
UNIX™ of X/Open Company Limited. VERILOG™, PALLADIUM™ of Cadence Design Systems, Inc. VLYNQ™
of Texas Instruments Incorporated. VXWORKS™, WIND RIVER™ of WIND RIVER SYSTEMS, INC. ZETEX™ of
Diodes Zetex Limited.
Last Trademarks Update 2010-10-26
Final Data Sheet
15
Revision 1.2, 2014-05-14
w w w . i n f i n e o n . c o m
Published by Infineon Technologies AG
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