FA38SA50LC [INFINEON]
HEXFET Power MOSFET; HEXFET功率MOSFET
| 型号： | FA38SA50LC |
| 厂家： | 
Infineon |
| 描述： | HEXFET Power MOSFET |
| 文件： | 总8页 (文件大小：173K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PD - 91615B
FA38SA50LC
HEXFET® Power MOSFET
l Fully Isolated Package
l Easy to Use and Parallel
D
VDSS = 500V
RDS(on) = 0.13Ω
ID = 38A
l
Low On-Resistance
l Dynamic dv/dt Rating
l Fully Avalanche Rated
l Simple Drive Requirements
l Low Drain to Case Capacitance
l Low Internal Inductance
G
S
Description
Third Generation HEXFETs from International Rectifier
provide the designer with the best combination of fast
switching, ruggedized device design, low on-resistance
and cost-effectiveness.
The SOT-227 package is universally preferred for all
commercial-industrial applications at power dissipation
levels to approximately 500 watts. The low thermal
resistance of theSOT-227contributetoitswideacceptance
throughout the industry.
SOT-227
Absolute Maximum Ratings
Parameter
Max.
Units
ID @ TC = 25°C
ID @ TC = 100°C
IDM
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
38
24
A
150
PD @TC = 25°C
Power Dissipation
500
W
W/°C
V
Linear Derating Factor
4.0
VGS
EAS
IAR
Gate-to-Source Voltage
± 20
Single Pulse Avalanche Energy
Avalanche Current
580
mJ
A
38
EAR
dv/dt
TJ
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Operating Junction and
50
16
mJ
V/ns
°C
-55 to + 150
TSTG
VISO
Storage Temperature Range
Insulation Withstand Voltage (AC-RMS)
Mounting torque, M4 srew
2.5
kV
(1.3N•M)
Thermal Resistance
Parameter
Junction-to-Case
Typ.
–––
Max.
0.25
–––
Units
RθJC
RθCS
Case-to-Sink, Flat, Greased Surface
0.05
°C/W
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1
2/2/99
FA38SA50LC
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter
Min. Typ. Max. Units
500 ––– –––
Conditions
VGS = 0V, ID = 1.0mA
V(BR)DSS
Drain-to-Source Breakdown Voltage
V
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient ––– 0.66 ––– V/°C Reference to 25°C, ID = 1mA
RDS(on)
VGS(th)
gfs
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
––– ––– 0.13
Ω
V
S
VGS = 10V, ID = 23A
VDS = VGS, ID = 250µA
VDS = 25V, ID = 23A
VDS = 500V, VGS = 0V
VDS = 400V, VGS = 0V, TJ = 125°C
VGS = 20V
2.0
22
––– 4.0
––– –––
Forward Transconductance
––– ––– 50
––– ––– 500
––– ––– 200
––– ––– -200
––– 280 420
IDSS
Drain-to-Source Leakage Current
µA
nA
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
IGSS
VGS = -20V
Qg
ID = 38A
Qgs
Qgd
td(on)
tr
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
–––
––– 150 220
––– 42 –––
37
55
nC VDS = 400V
VGS = 10V, See Fig. 6 and 13
VDD = 250V
Rise Time
––– 340 –––
––– 200 –––
––– 330 –––
ID = 38A
ns
td(off)
tf
Turn-Off Delay Time
RG = 10Ω (Internal)
RD = 8Ω, See Fig. 10
Fall Time
Ls
Internal Source Inductance
–––
5.0 –––
nH Between lead,
and center of die contact
Ciss
Coss
Crss
Input Capacitance
––– 6900 –––
––– 1600 –––
––– 580 –––
VGS = 0V
Output Capacitance
pF
VDS = 25V
Reverse Transfer Capacitance
ƒ = 1.0MHz, See Fig. 5
Source-Drain Ratings and Characteristics
Parameter
Continuous Source Current
(Body Diode)
Min. Typ. Max. Units
Conditions
MOSFET symbol
IS
38
––– –––
––– –––
showing the
A
ISM
Pulsed Source Current
(Body Diode)
integral reverse
150
p-n junction diode.
TJ = 25°C, IS = 38A, VGS = 0V
TJ = 25°C, IF = 38A
VSD
trr
Diode Forward Voltage
Reverse Recovery Time
Reverse RecoveryCharge
Forward Turn-On Time
––– ––– 1.3
––– 830 1300
V
ns
Qrr
ton
––– 15
22
µC di/dt = 100A/µs
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
Repetitive rating; pulse width limited by
ISD ≤ 38A, di/dt ≤ 410A/µs, VDD ≤ V(BR)DSS
,
max. junction temperature. ( See fig. 11 )
TJ ≤ 150°C
Starting TJ = 25°C, L = 0.80mH
RG = 25Ω, IAS = 38A. (See Figure 12)
Pulse width ≤ 300µs; duty cycle ≤ 2%.
2
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FA38SA50LC
1 0 0 0
1 0 0
1 0
1000
100
10
VGS
15V
VGS
15V
TOP
TOP
10V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM4.5V
BOTTOM 4.5V
4.5V
4.5V
10
20µs PULSE WIDTH
20µs PULS E W IDTH
= 25°C
°
T = 150
J
C
T
C
1
A
1
100
1
1 0
1 0 0
V
, Drain-to-Source Voltage (V)
DS
V
, Drain-to-Source Voltage (V)
DS
Fig 2. Typical Output Characteristics
Fig 1. Typical Output Characteristics
1000
3.0
2.5
2.0
1.5
1.0
0.5
0.0
38A
=
I
D
100
10
1
°
T = 150 C
J
°
T = 25 C
J
V
= 50V
DS
V
= 10V
GS
20µs PULSE WIDTH
-60 -40 -20
0
20 40 60 80 100 120 140 160
°
4
5
6
7 8
T , Junction Temperature ( C)
J
V
, Gate-to-Source Voltage (V)
GS
Fig 4. Normalized On-Resistance
Fig 3. Typical Transfer Characteristics
Vs. Temperature
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3
FA38SA50LC
16000
20
16
12
8
V
= 0V,
f = 1MHz
C
I
D
= 38A
GS
C
= C + C
SHORTED
ds
iss
gs
gd ,
gd
V
V
V
= 400V
= 250V
= 100V
DS
DS
DS
14000
12000
10000
8000
6000
4000
2000
0
C
= C
gd
rss
C
= C + C
ds
oss
C
iss
C
oss
C
4
rss
FOR TEST CIRCUIT
SEE FIGURE 13
0
0
80
160
240
320
400
1
10
100
Q , Total Gate Charge (nC)
V
, Drain-to-Source Voltage (V)
G
DS
Fig 6. Typical Gate Charge Vs.
Fig 5. Typical Capacitance Vs.
Gate-to-Source Voltage
Drain-to-Source Voltage
1000
100
10
1000
100
10
OPERATION IN THIS AREA LIMITED
BY R
DS(on)
10us
°
T = 150 C
J
100us
1ms
°
T = 25 C
J
1
°
T = 25 C
C
°
T = 150 C
Single Pulse
J
10ms
1000
V
= 0 V
GS
0.1
0.2
1
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1
10
100
10000
V
,Source-to-Drain Voltage (V)
V
, Drain-to-Source Voltage (V)
DS
SD
Fig 7. Typical Source-Drain Diode
Fig 8. Maximum Safe Operating Area
Forward Voltage
4
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FA38SA50LC
RD
VDS
Q
G
10V
VGS
D.U.T.
Q
Q
GD
GS
RG
+ VDD
-
V
G
10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Charge
Fig 9a. Basic Gate Charge Waveform
Fig 10a. Switching Time Test Circuit
Current Regulator
Same Type as D.U.T.
V
DS
50KΩ
90%
.2µF
12V
.3µF
+
V
DS
D.U.T.
-
10%
V
GS
V
GS
t
t
r
t
t
f
3mA
d(on)
d(off)
I
I
D
G
Current Sampling Resistors
Fig 9b. Gate Charge Test Circuit
Fig 10b. Switching Time Waveforms
1
0.50
0.1
0.20
0.10
0.05
P
DM
0.02
0.01
SINGLE PULSE
(THERMAL RESPONSE)
0.01
t
1
t
2
Notes:
1. Duty factor D =
t / t
1 2
2. Peak T = P
x Z
+ T
C
J
DM
thJC
0.001
0.00001
0.0001
0.001
0.01
0.1
1
t , Rectangular Pulse Duration (sec)
1
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
FA38SA50LC
1200
1000
800
600
400
200
0
I
D
1 5V
TOP
17A
24A
38A
BOTTOM
D RIVER
L
V
G
DS
D.U.T
R
+
V
D D
-
I
A
AS
20V
0.01
Ω
t
p
Fig 12a. Unclamped Inductive Test Circuit
V
(BR)DSS
t
p
25
50
75
100
125
150
°
Starting T , Junction Temperature ( C)
J
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
I
AS
Fig 12b. Unclamped Inductive Waveforms
6
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FA38SA50LC
Peak Diode Recovery dv/dt Test Circuit
+
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
D.U.T
-
+
-
-
+
RG
• dv/dt controlled by RG
+
-
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
VDD
Driver Gate Drive
P.W.
P.W.
Period
Period
D =
V
=10V
*
GS
D.U.T. I Waveform
SD
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. V Waveform
DS
Diode Recovery
dv/dt
V
DD
Re-Applied
Voltage
Body Diode
Forward Drop
Inductor Curent
I
SD
Ripple ≤ 5%
* VGS = 5V for Logic Level Devices
Fig 13. For N-Channel HEXFETS
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7
FA38SA50LC
SOT-227 Package Details
38.30 ( 1.508 )
37.80 ( 1.488 )
C HAM FER
2.00 ( .079 ) X 45 7
LEAD ASS IG M ENTS
4.40 (.173 )
4.20 (.165 )
S
D
G
-A-
4
1
3
2
4
1
3
2
S
25.70 ( 1.012 )
25.20 ( .992 )
6.25 ( .246 )
HEXFET
12.50 ( .492 )
-B-
R FULL
15.00 ( .590 )
7.50 ( .295 )
30.20 ( 1.189 )
29.80 ( 1.173 )
8.10 ( .319 )
7.70 ( .303 )
0.25 ( .010 )
M
C
A
M
B
M
4X
2.10 ( .082 )
1.90 ( .075 )
2.10 ( .082 )
1.90 ( .075 )
12.30 ( .4 84 )
11.80 ( .4 64 )
-C-
0.12 ( .005 )
Tube
QUANTITY PER TUBE IS 10
M4 SREW AND WASHER INCLUDED
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http://www.irf.com/
Data and specifications subject to change without notice. 2/99
8
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