FSL23A0D1 [INFINEON]

Power Field-Effect Transistor, 6A I(D), 200V, 0.35ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-205AF, HERMETIC SEALED, METAL CAN-3;
FSL23A0D1
型号: FSL23A0D1
厂家: Infineon    Infineon
描述:

Power Field-Effect Transistor, 6A I(D), 200V, 0.35ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-205AF, HERMETIC SEALED, METAL CAN-3

开关 脉冲 晶体管
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中文:  中文翻译
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FSL23A0D, FSL23A0R  
Data Sheet  
December 2001  
6A, 200V, 0.350 Ohm, Radiation Hardened,  
SEGR Resistant, N-Channel Power  
MOSFETs  
Features  
• 6A, 200V, r  
Total Dose  
= 0.350Ω  
DS(ON)  
The Discrete Products Operation of Fairchild Corporation  
has developed a series of Radiation Hardened MOSFETs  
specifically designed for commercial and military space  
applications. Enhanced Power MOSFET immunity to Single  
Event Effects (SEE), Single Event Gate Rupture (SEGR) in  
particular, is combined with 100K RADS of total dose  
hardness to provide devices which are ideally suited to harsh  
space environments. The dose rate and neutron tolerance  
necessary for military applications have not been sacrificed.  
- Meets Pre-RAD Specifications to 100K RAD (Si)  
• Single Event  
- Safe Operating Area Curve for Single Event Effects  
2
- SEE Immunity for LET of 36MeV/mg/cm with  
V
V
up to 80% of Rated Breakdown and  
of 10V Off-Bias  
DS  
GS  
• Dose Rate  
- Typically Survives 3E9 RAD (Si)/s at 80% BV  
DSS  
- Typically Survives 2E12 if Current Limited to I  
The Fairchild portfolio of SEGR resistant radiation hardened  
MOSFETs includes N-Channel and P-Channel devices in a  
variety of voltage, current and on-resistance ratings.  
Numerous packaging options are also available.  
DM  
• Photo Current  
- 3.0nA Per-RAD(Si)/s Typically  
• Neutron  
This MOSFET is an enhancement-mode silicon-gate power  
field-effect transistor of the vertical DMOS (VDMOS)  
structure. It is specially designed and processed to be  
radiation tolerant. The MOSFET is well suited for  
- Maintain Pre-RAD Specifications  
for 1E13 Neutrons/cm  
2
2
- Usable to 1E14 Neutrons/cm  
applications exposed to radiation environments such as  
switching regulation, switching converters, motor drives,  
relay drivers and drivers for high-power bipolar switching  
transistors requiring high speed and low gate drive power.  
This type can be operated directly from integrated circuits.  
Symbol  
D
G
Reliability screening is available as either commercial, TXV  
equivalent of MIL-S-19500, or Space equivalent of  
MIL-S-19500. Contact Fairchild for any desired deviations  
from the data sheet.  
S
Ordering Information  
Package  
TO-205AF  
RAD LEVEL SCREENING LEVEL PART NUMBER/BRAND  
10K  
Commercial  
TXV  
FSL23A0D1  
FSL23A0D3  
FSL23A0R1  
FSL23A0R3  
FSL23A0R4  
10K  
100K  
100K  
100K  
Commercial  
TXV  
Space  
G
D
S
Formerly available as type TA17697.  
©2001 Fairchild Semiconductor Corporation  
FSL23A0D, FSL23A0R Rev. B  
FSL23A0D, FSL23A0R  
o
Absolute Maximum Ratings T = 25 C, Unless Otherwise Specified  
C
FSL23A0D, FSL23A0R  
UNITS  
Drain to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V  
200  
200  
V
V
DS  
Drain to Gate Voltage (R  
= 20k) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V  
DGR  
GS  
Continuous Drain Current  
o
T
T
= 25 C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .I  
6
4
A
A
A
V
C
D
D
o
= 100 C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .I  
C
Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I  
18  
20  
DM  
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V  
GS  
Maximum Power Dissipation  
o
T
T
= 25 C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P  
25  
10  
W
W
C
T
o
= 100 C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P  
C
T
o
Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  
Single Pulsed Avalanche Current, L = 100µH, (See Test Figure) . . . . . . . . . . . . . . . . . . . . . . . . . .I  
Continuous Source Current (Body Diode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I  
0.20  
18  
W/ C  
A
A
A
AS  
6
S
SM  
Pulsed Source Current (Body Diode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I  
18  
o
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T , T  
-55 to 150  
300  
C
J
STG  
o
Lead Temperature (During Soldering) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T  
(Distance >0.063in (1.6mm) from Case, 10s Max)  
C
L
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the  
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.  
o
Electrical Specifications  
T
= 25 C, Unless Otherwise Specified  
C
PARAMETER  
Drain to Source Breakdown Voltage  
Gate Threshold Voltage  
SYMBOL  
BV  
TEST CONDITIONS  
= 1mA, V = 0V  
MIN  
TYP  
MAX  
-
UNITS  
V
I
200  
-
DSS  
D
GS  
o
V
V
I
= V  
,
T
T
T
T
T
T
T
= -55 C  
-
-
5.0  
4.0  
-
V
GS(TH)  
GS  
= 1mA  
DS  
C
C
C
C
C
C
C
o
D
= 25 C  
1.5  
-
V
o
= 125 C  
0.5  
-
-
V
o
Zero Gate Voltage Drain Current  
Gate to Source Leakage Current  
I
V
V
= 160V,  
= 0V  
= 25 C  
-
25  
µA  
µA  
nA  
nA  
V
DSS  
DS  
GS  
o
= 125 C  
-
-
250  
100  
200  
2.21  
0.350  
0.637  
20  
o
I
V
=
20V  
= 25 C  
-
-
GSS  
GS  
o
= 125 C  
-
-
Drain to Source On-State Voltage  
Drain to Source On Resistance  
V
V
= 12V, I = 6A  
-
-
DS(ON)  
GS  
D
o
r
I
= 4A,  
T
T
= 25 C  
-
0.280  
DS(ON)12  
D
C
V
= 12V  
o
GS  
= 125 C  
-
-
-
C
Turn-On Delay Time  
Rise Time  
t
V
= 100V, I = 6A,  
-
ns  
ns  
ns  
ns  
nC  
nC  
nC  
nC  
nC  
V
d(ON)  
DD  
D
R = 16.7, V  
= 12V,  
L
GS  
t
-
-
30  
r
R
= 7.5Ω  
GS  
Turn-Off Delay Time  
Fall Time  
t
-
-
55  
d(OFF)  
t
-
-
15  
f
Total Gate Charge  
Gate Charge at 12V  
Threshold Gate Charge  
Gate Charge Source  
Gate Charge Drain  
Plateau Voltage  
Q
V
V
V
= 0V to 20V  
= 0V to 12V  
= 0V to 2V  
V
= 100V,  
-
-
57  
g(TOT)  
GS  
GS  
GS  
DD  
= 6A  
I
D
Q
-
34  
-
38  
g(12)  
g(TH)  
Q
-
1.9  
6.8  
20  
Q
-
6.0  
18  
7
gs  
gd  
Q
-
V
I
= 6A, V  
= 15V  
-
-
(PLATEAU)  
D
DS  
Input Capacitance  
Output Capacitance  
Reverse Transfer Capacitance  
C
V
= 25V, V = 0V,  
GS  
-
750  
180  
50  
-
-
pF  
pF  
pF  
ISS  
DS  
f = 1MHz  
C
C
-
-
OSS  
-
-
RSS  
o
Thermal Resistance Junction to Case  
R
-
5.0  
175  
C/W  
JC  
θ
o
Thermal Resistance Junction to Ambient  
R
-
-
C/W  
JA  
θ
©2001 Fairchild Semiconductor Corporation  
FSL23A0D, FSL23A0R Rev. B  
FSL23A0D, FSL23A0R  
Source to Drain Diode Specifications  
PARAMETER  
Forward Voltage  
Reverse Recovery Time  
SYMBOL  
TEST CONDITIONS  
MIN  
0.6  
-
TYP  
MAX  
1.8  
UNITS  
V
V
I
I
= 6A  
-
-
SD  
SD  
t
= 6A, dI /dt = 100A/µs  
290  
ns  
rr  
SD  
SD  
o
Electrical Specifications up to 100K RAD T = 25 C, Unless Otherwise Specified  
C
PARAMETER  
Drain to Source Breakdown Volts  
Gate to Source Threshold Volts  
Gate to Body Leakage  
SYMBOL  
BV  
TEST CONDITIONS  
= 0, I = 1mA  
MIN  
MAX  
-
UNITS  
(Note 3)  
V
V
V
V
V
V
200  
V
V
DSS  
GS  
GS  
GS  
GS  
GS  
GS  
D
(Note 3)  
V
= V , I = 1mA  
DS  
1.5  
4.0  
GS(TH)  
D
(Notes 2, 3)  
(Note 3)  
I
=
20V, V  
= 0V  
= 160V  
-
-
-
-
100  
25  
nA  
µA  
V
GSS  
DS  
Zero Gate Leakage  
I
= 0, V  
DS  
DSS  
Drain to Source On-State Volts  
Drain to Source On Resistance  
NOTES:  
(Notes 1, 3)  
(Notes 1, 3)  
V
= 12V, I = 6A  
2.21  
0.350  
DS(ON)  
D
r
= 12V, I = 4A  
DS(ON)12  
D
1. Pulse test, 300µs Max.  
2. Absolute value.  
3. Insitu Gamma bias must be sampled for both V  
= 12V, V  
= 0V and V  
= 0V, V  
= 80% BV  
.
DSS  
GS  
DS  
GS  
DS  
Single Event Effects (SEB, SEGR) (Note 4)  
ENVIRONMENT (NOTE 5)  
APPLIED  
(NOTE 6)  
ION  
SPECIES  
TYPICAL LET  
(MeV/mg/cm)  
TYPICAL  
RANGE (µ)  
V
BIAS  
MAXIMUM  
GS  
(V)  
TEST  
SYMBOL  
V
BIAS (V)  
DS  
Single Event Effects Safe Operating Area  
SEESOA  
Ni  
Br  
Br  
Br  
Br  
26  
37  
37  
37  
37  
43  
36  
36  
36  
36  
-20  
-5  
200  
200  
-10  
-15  
-20  
160  
100  
40  
NOTES:  
4. Testing conducted at Brookhaven National Labs; sponsored by Naval Surface Warfare Center (NSWC), Crane, IN.  
2
o
5. Fluence = 1E5 ions/cm (typical), T = 25 C.  
6. Does not exhibit Single Event Burnout (SEB) or Single Event Gate Rupture (SEGR).  
Typical Performance Curves Unless Otherwise Specified  
2
2
LET = 26MeV/mg/cm , RANGE = 43µ  
LET = 37MeV/mg/cm , RANGE = 36µ  
1E-3  
2
FLUENCE = 1E5 IONS/cm (TYPICAL)  
200  
1E-4  
ILM = 10A  
30A  
160  
1E-5  
120  
100A  
300A  
80  
1E-6  
40  
o
TEMP = 25 C  
1E-7  
0
10  
30  
100  
DRAIN SUPPLY (V)  
300  
1000  
0
-5  
-10  
-15  
-20  
-25  
V
(V)  
GS  
FIGURE 1. SINGLE EVENT EFFECTS SAFE OPERATING AREA  
FIGURE 2. DRAIN INDUCTANCE REQUIREDTO LIMIT  
GAMMA DOT CURRENT TO I  
AS  
©2001 Fairchild Semiconductor Corporation  
FSL23A0D, FSL23A0R Rev. B  
FSL23A0D, FSL23A0R  
Typical Performance Curves Unless Otherwise Specified (Continued)  
8
100  
o
T
= 25 C  
C
6
10  
4
100µs  
1ms  
1
2
10ms  
OPERATION IN THIS  
AREA MAY BE  
LIMITED BY r  
DS(ON)  
100ms  
0
0.1  
-50  
0
T
50  
100  
o
150  
1
10  
100  
1000  
, CASE TEMPERATURE ( C)  
V
, DRAIN TO SOURCE VOLTAGE (V)  
C
DS  
FIGURE 3. MAXIMUM CONTINUOUS DRAIN CURRENT vs  
TEMPERATURE  
FIGURE 4. FORWARD BIAS SAFE OPERATING AREA  
2.5  
PULSE DURATION = 250ms, V  
GS  
= 12V, I = 4A  
D
2.0  
1.5  
1.0  
0.5  
0.0  
12V  
Q
G
Q
Q
GD  
GS  
V
G
-80  
-40  
0
40  
80  
120  
160  
o
T , JUNCTION TEMPERATURE ( C)  
CHARGE  
J
FIGURE 5. BASIC GATE CHARGE WAVEFORM  
10  
FIGURE 6. NORMALIZED r  
vs JUNCTIONTEMPERATURE  
DS(ON)  
1
0.5  
0.2  
0.1  
0.1  
0.05  
0.02  
0.01  
SINGLE PULSE  
P
DM  
0.01  
NOTES:  
DUTY FACTOR: D = t /t  
t
1
1
2
t
2
PEAK T = P  
x Z  
+ T  
J
DM  
θJC  
C
0.001  
-5  
-4  
10  
-3  
10  
-2  
10  
-1  
10  
0
1
10  
10  
10  
t, RECTANGULAR PULSE DURATION (s)  
FIGURE 7. NORMALIZED MAXIMUM TRANSIENT THERMAL RESPONSE  
©2001 Fairchild Semiconductor Corporation  
FSL23A0D, FSL23A0R Rev. B  
FSL23A0D, FSL23A0R  
Typical Performance Curves Unless Otherwise Specified (Continued)  
30  
o
STARTING T = 25 C  
J
10  
o
STARTING T = 150 C  
J
IF R = 0  
AV  
IF R 0  
t
= (L) (I ) / (1.3 RATED BV  
- V  
DD  
)
AS DSS  
t
= (L/R) ln [(I *R) / (1.3 RATED BV  
AS  
- V ) + 1]  
DD  
AV  
DSS  
1
0.01  
0.1  
1
10  
t
,TIME IN AVALANCHE (ms)  
AV  
FIGURE 8. UNCLAMPED INDUCTIVE SWITCHING  
Test Circuits and Waveforms  
ELECTRONIC SWITCH OPENS  
WHEN I IS REACHED  
AS  
V
DS  
L
BV  
DSS  
+
CURRENT  
TRANSFORMER  
I
AS  
t
P
-
V
DS  
I
AS  
V
VARY t TO OBTAIN  
DD  
P
+
50Ω  
REQUIRED PEAK I  
AS  
V
DD  
V
20V  
GS  
-
50V-150V  
DUT  
50Ω  
t
P
0V  
t
AV  
FIGURE 9. UNCLAMPED ENERGY TEST CIRCUIT  
FIGURE 10. UNCLAMPED ENERGY WAVEFORMS  
t
t
ON  
OFF  
t
d(OFF)  
V
DD  
t
d(ON)  
t
t
f
r
R
L
V
DS  
90%  
90%  
V
DS  
V
= 12V  
GS  
10%  
10%  
DUT  
0V  
90%  
50%  
R
GS  
50%  
V
GS  
10%  
PULSE WIDTH  
FIGURE 11. RESISTIVE SWITCHING TEST CIRCUIT  
FIGURE 12. RESISTIVE SWITCHING WAVEFORMS  
©2001 Fairchild Semiconductor Corporation  
FSL23A0D, FSL23A0R Rev. B  
FSL23A0D, FSL23A0R  
Screening Information  
Screening is performed in accordance with the latest revision in effect of MIL-S-19500, (Screening Information Table).  
o
Delta Tests and Limits (JANTXV Equivalent, JANS Equivalent) T = 25 C, Unless Otherwise Specified  
C
PARAMETER  
Gate to Source Leakage Current  
Zero Gate Voltage Drain Current  
Drain to Source On Resistance  
Gate Threshold Voltage  
NOTES:  
SYMBOL  
TEST CONDITIONS  
20V  
MAX  
UNITS  
nA  
I
V
V
=
20 (Note 7)  
25 (Note 7)  
20% (Note 8)  
20% (Note 8)  
GSS  
GS  
DS  
I
= 80% Rated Value  
o
µA  
DSS  
r
T
= 25 C at Rated I  
D
DS(ON)  
C
V
I
= 1.0mA  
V
GS(TH)  
D
7. Or 100% of Initial Reading (whichever is greater).  
8. Of Initial Reading.  
Screening Information  
TEST  
JANTXV EQUIVALENT  
= 30V, t = 250µs  
JANS EQUIVALENT  
Gate Stress  
V
V
= 30V, t = 250µs  
GS  
Optional  
MIL-S-19500 Group A,  
GS  
Required  
MIL-S-19500 Group A,  
Pind  
Pre Burn-In Tests (Note 9)  
o
o
Subgroup 2 (All Static Tests at 25 C)  
Subgroup 2 (All Static Tests at 25 C)  
Steady State Gate  
Bias (Gate Stress)  
MIL-STD-750, Method 1042, Condition B  
MIL-STD-750, Method 1042, Condition B  
V
= 80% of Rated Value,  
V
= 80% of Rated Value,  
GS  
= 150 C, Time = 48 hours  
GS  
T = 150 C, Time = 48 hours  
A
o
o
T
A
Interim Electrical Tests (Note 9)  
All Delta Parameters Listed in the Delta Tests  
and Limits Table  
All Delta Parameters Listed in the Delta Tests  
and Limits Table  
Steady State Reverse  
Bias (Drain Stress)  
MIL-STD-750, Method 1042, Condition A  
MIL-STD-750, Method 1042, Condition A  
V
= 80% of Rated Value,  
V
= 80% of Rated Value,  
DS  
= 150 C, Time = 160 hours  
DS  
T = 150 C, Time = 240 hours  
A
o
o
T
A
PDA  
10%  
5%  
Final Electrical Tests (Note 9)  
MIL-S-19500, Group A, Subgroup 2  
MIL-S-19500, Group A,  
Subgroups 2 and 3  
NOTE:  
9. Test limits are identical pre and post burn-in.  
Additional Screening Tests  
PARAMETER  
Safe Operating Area  
SYMBOL  
TEST CONDITIONS  
= 160V, t = 10ms  
MAX  
0.46  
18  
UNITS  
A
SOA  
V
V
DS  
Unclamped Inductive Switching  
Thermal Response  
I
= 15V, L = 0.1mH  
A
AS  
GS(PEAK)  
V  
V  
t
t
= 10ms; V = 25V; I = 1A  
60  
mV  
mV  
SD  
SD  
H
H
H
H
Thermal Impedance  
= 500ms; V = 25V; I = 1A  
230  
H
H
©2001 Fairchild Semiconductor Corporation  
FSL23A0D, FSL23A0R Rev. B  
FSL23A0D, FSL23A0R  
Rad Hard Data Packages - Fairchild Power Transistors  
TXV Equivalent  
Class S - Equivalents  
1. RAD HARD TXV EQUIVALENT - STANDARD DATA  
PACKAGE  
1. RAD HARD “S” EQUIVALENT - STANDARD DATA  
PACKAGE  
A. Certificate of Compliance  
A. Certificate of Compliance  
B. Serialization Records  
C. Assembly Flow Chart  
D. SEM Photos and Report  
B. Assembly Flow Chart  
C. Preconditioning - Attributes Data Sheet  
D. Group A  
E. Group B  
F. Group C  
G. Group D  
- Attributes Data Sheet  
- Attributes Data Sheet  
- Attributes Data Sheet  
- Attributes Data Sheet  
E. Preconditioning - Attributes Data Sheet  
- Hi-Rel Lot Traveler  
- HTRB - Hi Temp Gate Stress Post  
Reverse Bias Data and Delta Data  
- HTRB - Hi Temp Drain Stress Post  
Reverse Bias Delta Data  
2. RAD HARD TXV EQUIVALENT - OPTIONAL DATA  
PACKAGE  
F. Group A  
G. Group B  
H. Group C  
I. Group D  
- Attributes Data Sheet  
- Attributes Data Sheet  
- Attributes Data Sheet  
- Attributes Data Sheet  
A. Certificate of Compliance  
B. Assembly Flow Chart  
C. Preconditioning - Attributes Data Sheet  
- Precondition Lot Traveler  
- Pre and Post Burn-In Read and Record  
Data  
2. RAD HARD MAX. “S” EQUIVALENT - OPTIONAL  
DATA PACKAGE  
D. Group A  
- Attributes Data Sheet  
- Group A Lot Traveler  
A. Certificate of Compliance  
B. Serialization Records  
C. Assembly Flow Chart  
D. SEM Photos and Report  
E. Group B  
- Attributes Data Sheet  
- Group B Lot Traveler  
- Pre and Post Read and Record Data for  
Intermittent Operating Life (Subgroup B3)  
- Bond Strength Data (Subgroup B3)  
- Pre and Post High Temperature Operating  
Life Read and Record Data (Subgroup B6)  
E. Preconditioning - Attributes Data Sheet  
- Hi-Rel Lot Traveler  
- HTRB - Hi Temp Gate Stress Post  
Reverse Bias Data and Delta Data  
- HTRB - Hi Temp Drain Stress Post  
Reverse Bias Delta Data  
F. Group C  
G. Group D  
- Attributes Data Sheet  
- Group C Lot Traveler  
- Pre and Post Read and Record Data for  
Intermittent Operating Life (Subgroup C6)  
- Bond Strength Data (Subgroup C6)  
- X-Ray and X-Ray Report  
F. Group A  
G. Group B  
H. Group C  
I. Group D  
- Attributes Data Sheet  
- Hi-Rel Lot Traveler  
- Subgroups A2, A3, A4, A5 and A7 Data  
- Attributes Data Sheet  
- Group D Lot Traveler  
- Pre and Post RAD Read and Record Data  
- Attributes Data Sheet  
- Hi-Rel Lot Traveler  
- Subgroups B1, B3, B4, B5 and B6 Data  
- Attributes Data Sheet  
- Hi-Rel Lot Traveler  
- Subgroups C1, C2, C3 and C6 Data  
- Attributes Data Sheet  
- Hi-Rel Lot Traveler  
- Pre and Post Radiation Data  
©2001 Fairchild Semiconductor Corporation  
FSL23A0D, FSL23A0R Rev. B  
TRADEMARKS  
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is  
not intended to be an exhaustive list of all such trademarks.  
â
SMART START™  
STAR*POWER™  
Stealth™  
VCX™  
FAST  
ACEx™  
Bottomless™  
CoolFET™  
OPTOLOGIC™  
OPTOPLANAR™  
PACMAN™  
FASTr™  
FRFET™  
SuperSOT™-3  
SuperSOT™-6  
SuperSOT™-8  
SyncFET™  
GlobalOptoisolator™  
GTO™  
HiSeC™  
ISOPLANAR™  
LittleFET™  
MicroFET™  
MicroPak™  
MICROWIRE™  
CROSSVOLT™  
DenseTrench™  
DOME™  
POP™  
Power247™  
PowerTrenchâ  
QFET™  
EcoSPARK™  
E2CMOSTM  
TinyLogic™  
QS™  
EnSignaTM  
TruTranslation™  
UHC™  
QT Optoelectronics™  
Quiet Series™  
SILENTSWITCHERâ  
FACT™  
FACT Quiet Series™  
UltraFETâ  
STAR*POWER is used under license  
DISCLAIMER  
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER  
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD  
DOES NOT ASSUME ANY LIABILITYARISING OUT OF THE APPLICATION OR USE OFANY PRODUCT  
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT  
RIGHTS, NOR THE RIGHTS OF OTHERS.  
LIFE SUPPORT POLICY  
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT  
DEVICESORSYSTEMSWITHOUTTHEEXPRESSWRITTENAPPROVALOFFAIRCHILDSEMICONDUCTORCORPORATION.  
As used herein:  
1. Life support devices or systems are devices or  
systems which, (a) are intended for surgical implant into  
the body, or (b) support or sustain life, or (c) whose  
failure to perform when properly used in accordance  
with instructions for use provided in the labeling, can be  
reasonably expected to result in significant injury to the  
user.  
2. A critical component is any component of a life  
support device or system whose failure to perform can  
be reasonably expected to cause the failure of the life  
support device or system, or to affect its safety or  
effectiveness.  
PRODUCT STATUS DEFINITIONS  
Definition of Terms  
Datasheet Identification  
Product Status  
Definition  
Advance Information  
Formative or  
In Design  
This datasheet contains the design specifications for  
product development. Specifications may change in  
any manner without notice.  
Preliminary  
First Production  
This datasheet contains preliminary data, and  
supplementary data will be published at a later date.  
Fairchild Semiconductor reserves the right to make  
changes at any time without notice in order to improve  
design.  
No Identification Needed  
Obsolete  
Full Production  
This datasheet contains final specifications. Fairchild  
Semiconductor reserves the right to make changes at  
any time without notice in order to improve design.  
Not In Production  
This datasheet contains specifications on a product  
that has been discontinued by Fairchild semiconductor.  
The datasheet is printed for reference information only.  
Rev. H4  

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