IAUC120N04S6N009 [INFINEON]

车规级MOSFET;
IAUC120N04S6N009
型号: IAUC120N04S6N009
厂家: Infineon    Infineon
描述:

车规级MOSFET

文件: 总9页 (文件大小:240K)
中文:  中文翻译
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IAUC120N04S6N009  
OptiMOS- 6 Power-Transistor  
Product Summary  
VDS  
40  
0.9  
120  
V
RDS(on),max  
ID  
m  
A
Features  
PG-TDSON-8  
• OptiMOS™ - power MOSFET for automotive applications  
• N-channel - Enhancement mode - Normal Level  
• AEC Q101 qualified  
• MSL1 up to 260°C peak reflow  
• 175°C operating temperature  
• Green Product (RoHS compliant)  
• 100% Avalanche tested  
Type  
Package  
Marking  
IAUC120N04S6N009  
PG-TDSON-8  
6N04N009  
Maximum ratings, at T j=25 °C, unless otherwise specified  
Value  
Parameter  
Symbol  
Conditions  
Unit  
Continuous drain current1)  
I D  
T C=25°C, VGS=10V  
120  
A
T C=100°C, VGS=10V2)  
120  
Pulsed drain current2)  
I D,pulse  
EAS  
T C=25°C  
480  
400  
Avalanche energy, single pulse2)  
Avalanche current, single pulse  
Gate source voltage  
I D=60A, R G,min=25  
mJ  
A
I AS  
R G,min=25  
60  
VGS  
-
±20  
V
Ptot  
T C=25°C  
Power dissipation  
150  
W
°C  
T j, T stg  
Operating and storage temperature  
-
-55 ... +175  
Rev. 1.0  
page 1  
2018-09-27  
IAUC120N04S6N009  
Values  
typ.  
Parameter  
Symbol  
Conditions  
Unit  
min.  
max.  
Thermal characteristics2)  
R thJC  
Thermal resistance, junction - case  
-
-
-
-
-
1.0  
50  
K/W  
Thermal resistance, junction -  
ambient  
6 cm2 cooling area3)  
R thJA  
Electrical characteristics, at T j=25 °C, unless otherwise specified  
Static characteristics  
V(BR)DSS VGS=0V, I D= 1mA  
VGS(th) VDS=VGS, I D=90µA  
Drain-source breakdown voltage  
Gate threshold voltage  
40  
-
-
V
2.2  
2.8  
3.4  
VDS=40V, VGS=0V,  
T j=25°C  
I DSS  
Zero gate voltage drain current  
-
-
-
-
1
µA  
V
DS=40V, VGS=0V,  
100  
T j=125°C2)  
I GSS  
VGS=20V, VDS=0V  
Gate-source leakage current  
-
-
-
-
-
100 nA  
R DS(on) VGS=7V, I D=60A  
Drain-source on-state resistance  
0.95  
0.75  
0.9  
1.1  
0.9  
-
m  
V
GS=10V, I D=60A  
Gate resistance2)  
R G  
Rev. 1.0  
page 2  
2018-09-27  
IAUC120N04S6N009  
Values  
typ.  
Parameter  
Symbol  
Conditions  
Unit  
min.  
max.  
Dynamic characteristics2)  
Input capacitance  
Output capacitance  
Reverse transfer capacitance  
Turn-on delay time  
Rise time  
C iss  
C oss  
Crss  
t d(on)  
t r  
-
-
-
-
-
-
-
5530  
1550  
108  
10  
7360 pF  
2070  
V
GS=0V, VDS=25V,  
f =1MHz  
125  
-
-
-
-
ns  
6
V
DD=20V, VGS=10V,  
I D=120A, R G=3.5  
t d(off)  
t f  
Turn-off delay time  
Fall time  
22  
11  
Gate Charge Characteristics2)  
Gate to source charge  
Gate to drain charge  
Gate charge total  
Q gs  
-
-
-
-
25  
15  
76  
4.5  
33  
28  
115  
-
nC  
Q gd  
VDD=32V, I D=120A,  
GS=0 to 10V  
V
Q g  
Vplateau  
Gate plateau voltage  
V
A
Reverse Diode  
Diode continous forward current2)  
Diode pulse current2)  
I S  
-
-
-
-
120  
480  
T C=25°C  
I S,pulse  
VGS=0V, I F=60A,  
T j=25°C  
VSD  
Diode forward voltage  
-
-
-
0.8  
60  
73  
1.1  
V
VR=20V, I F=120A,  
diF/dt =100A/µs  
Reverse recovery time2)  
Reverse recovery charge2)  
t rr  
-
-
ns  
nC  
Q rr  
1) Current is limited by package; with an R thJC = 1K/W the chip is able to carry 300A at 25°C.  
2) The parameter is not subject to production test- verified by design/characterization.  
3) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain  
connection. PCB is vertical in still air.  
Rev. 1.0  
page 3  
2018-09-27  
IAUC120N04S6N009  
1 Power dissipation  
2 Drain current  
P
tot = f(T C); VGS = 10 V  
I D = f(T C); VGS = 10 V  
140  
120  
100  
80  
150  
100  
50  
60  
40  
20  
0
0
0
50  
100  
150  
200  
0
50  
100  
150  
200  
TC [°C]  
TC [°C]  
3 Safe operating area  
4 Max. transient thermal impedance  
Z thJC = f(t p)  
I D = f(VDS); T C = 25 °C; D = 0  
parameter: t p  
parameter: D =t p/T  
101  
1000  
100  
10  
1 µs  
10 µs  
100  
100 µs  
0.5  
150 µs  
0.1  
10-1  
0.05  
0.01  
10-2  
single pulse  
10-3  
1
0.1  
1
10  
100  
10-6  
10-5  
10-4  
10-3  
10-2  
10-1  
100  
VDS [V]  
tp [s]  
Rev. 1.0  
page 4  
2018-09-27  
IAUC120N04S6N009  
5 Typ. output characteristics  
I D = f(VDS); T j = 25 °C  
parameter: VGS  
6 Typ. drain-source on-state resistance  
R DS(on) = f(I D); T j = 25 °C  
parameter: VGS  
400  
12  
10 V  
5.5 V  
360  
7 V  
10  
5 V  
320  
280  
240  
200  
160  
120  
80  
4.5 V  
8
6
4
2
0
5 V  
4.5 V  
5.5 V  
40  
7 V  
10 V  
0
0
1
2
3
0
50 100 150 200 250 300 350 400  
VDS [V]  
ID [A]  
7 Typ. transfer characteristics  
I D = f(VGS); VDS = 6V  
parameter: T j  
8 Typ. drain-source on-state resistance  
R DS(on) = f(T j); I D = 60 A; VGS = 10 V  
500  
400  
300  
1.6  
1.4  
1.2  
1
200  
175°C  
0.8  
0.6  
0.4  
100  
25°C  
-55°C  
0
3
3.5  
4
4.5  
5
5.5  
6
-60  
-20  
20  
60  
100  
140  
180  
VGS [V]  
Tj [°C]  
Rev. 1.0  
page 5  
2018-09-27  
IAUC120N04S6N009  
9 Typ. gate threshold voltage  
GS(th) = f(T j); VGS = VDS  
10 Typ. capacitances  
V
C = f(VDS); VGS = 0 V; f = 1 MHz  
parameter: I D  
104  
4
Ciss  
3.5  
3
Coss  
900 µA  
103  
102  
101  
2.5  
2
90 µA  
Crss  
1.5  
1
0.5  
-60  
0
10  
20  
30  
-20  
20  
60  
Tj [°C]  
100  
140  
180  
VDS [V]  
11 Typical forward diode characteristics  
12 Avalanche characteristics  
I A S= f(t AV  
IF = f(VSD)  
)
parameter: T j  
parameter: Tj(start)  
103  
100  
25 °C  
100 °C  
150 °C  
102  
10  
25 °C  
175 °C  
101  
100  
1
1
0
0.2  
0.4  
0.6  
0.8  
1
1.2  
1.4  
10  
100  
1000  
VSD [V]  
tAV [µs]  
Rev. 1.0  
page 6  
2018-09-27  
IAUC120N04S6N009  
13 Avalanche energy  
14 Drain-source breakdown voltage  
E
AS = f(T j)  
VBR(DSS) = f(T j); I D = 1 mA  
46  
1800  
1700  
1600  
1500  
1400  
1300  
1200  
1100  
1000  
900  
44  
42  
40  
38  
36  
15 A  
800  
30 A  
700  
600  
500  
400  
60 A  
300  
200  
100  
0
-60  
-20  
20  
60  
100  
140  
180  
25  
75  
125  
175  
Tj [°C]  
Tj [°C]  
15 Typ. gate charge  
GS = f(Q gate); I D = 40 A pulsed  
16 Gate charge waveforms  
V
parameter: VDD  
10  
9
8
7
6
5
4
3
2
1
V GS  
8 V  
Q g  
32 V  
V gs(th)  
Q g(th)  
Q sw  
Q gd  
Q gate  
Q gs  
0
0
20  
40  
60  
80  
Qgate [nC]  
Rev. 1.0  
page 7  
2018-09-27  
IAUC120N04S6N009  
Published by  
Infineon Technologies AG  
81726 Munich, Germany  
©
Infineon Technologies AG 2018  
All Rights Reserved.  
Legal Disclaimer  
The information given in this document shall in no event be regarded as a guarantee of conditions  
or characteristics. With respect to any examples or hints given herein, any typical values stated  
herein and/or any information regarding the application of the device, Infineon Technologies hereby  
disclaims any and all warranties and liabilities of any kind, including without limitation, warranties  
of non-infringement of intellectual property rights of any third party.  
Information  
For further information on technology, delivery terms and conditions and prices, please contact  
the nearest Infineon Technologies Office (www.infineon.com).  
Warnings  
Due to technical requirements, components may contain dangerous substances.  
For information on the types in question, please contact the nearest Infineon Technologies Office.  
Infineon Technologies components may be used in life-support devices or systems only with the  
express written approval of Infineon Technologies, if a failure of such components can reasonably be  
expected to cause the failure of that life-support device or system or to affect the safety or  
effectiveness of that device or system. Life support devices or systems are intended to be implanted  
in the human body or to support and/or maintain and sustain and/or protect human life.  
If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.  
Rev. 1.0  
page 8  
2018-09-27  
IAUC120N04S6N009  
Revision History  
Version  
Date  
Changes  
Final Data Sheet  
Revision 1.0  
2018-09-27  
Rev. 1.0  
page 9  
2018-09-27  

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