ICE5QR0680BG_技术文档

ICE5QRxx80BG

Quasi-Resonant 800 V CoolSET™ - in DSO-12 Package

Product Highlights



Integrated 800 V avalanche rugged CoolMOS™

Novel Quasi-Resonant operation and proprietary implementation for low EMI

Enhanced Active Burst Mode with selectable entry and exit standby power

Active Burst Mode to reach the lowest standby power <100 mW

Fast startup achieved with cascode configuration

PG-DSO-12

Digital frequency reduction for better overall system efficiency

Robust line protection with input OVP and brownout

Comprehensive protection

Pb-free lead plating, halogen free mold compound, RoHS compliant

Features

Applications



Integrated 800 V avalanche rugged CoolMOS™



Auxiliary power supply for Home Appliances/white Goods, TV,

PC & Server

Minimum switching frequency difference between low & high

line for higher efficiency & better EMI



Blu-ray player, Set-top box & LCD/LED Monitor



Enhanced Active Burst Mode with selectable entry and exit

standby power

Description



Active Burst Mode to reach the lowest standby power <100 mW

Fast startup achieved with cascode configuration

Digital frequency reduction up to 10 zero crossings

Built-in digital soft start

The Quasi-Resonant CoolSET™- (ICE5QRxx80BG) is the 5^th

generation of Quasi-Resonant integrated power IC optimized for

off-line switch power supply in cascode configuration. It is housed

in single package with 2 separate chips; one is controller chip and

other is HV MOSFET chips. The IC can achieve lower EMI and

higher efficiency with improved digital frequency reduction

through the proprietary novel Quasi-Resonant operation. The

enhanced Active Burst Mode enables flexibility in standby power

range selection. The product has a wide operation range (10 ~

25.5 V) of IC power supply and lower power consumption. The

numerous protection functions including the robust line

protection (both input OVP and brownout) to support the

protections of the power supply system in failure situations. All of

these make the CoolSET™ (ICE5QRxx80BG) series an outstanding

integrated power device in Quasi-Resonant flyback converter in

the market.

Cycle-by-cycle peak current limitation

Maximum on/off time limitation to avoid audible noise during

start up and power down



Robust line protection with input OVP and brownout

Auto restart mode protection for VCC Over Voltage, VCC Under

Voltage, Over load/Open Loop, Line/Output Over Voltage, Over

Temperature



Limited charging current for VCC short to GND

Pb-free lead plating, halogen free mold compound, RoHS

compliant

Figure 1

Typical application

Datasheet

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Please read the Important Notice and Warnings at the end of this document

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Quasi-Resonant 800 V CoolSET™ - in DSO-12 Package

Output Power of 5th generation Quasi-Resonant CoolSET™

Table 1

Output Power of 5^thgeneration Quasi-Resonant CoolSET™

1

2

V_DS

Package

Marking

R_DSon

220V_AC±20%²

28 W

85-300 V_AC

15 W

Type

ICE5QR4780BG

ICE5QR2280BG

ICE5QR1680BG

ICE5QR0680BG

PG-DSO-12

5QR4780BG

5QR2280BG

5QR1680BG

5QR0680BG

800 V

4.13 Ω

2.13 Ω

1.53 Ω

0.71 Ω

42 W

23 W

50 W

27 W

77 W

42 W

¹Typ. at T_J=25°C (inclusive of low side MOSFET)

²Calculated maximum output power rating in an open frame design at T_a=50°C, T_J=125°C (integrated high voltage MOSFET) and using

minimum drain pin copper area in a 2 oz copper single sided PCB. The output power figure is for selection purpose only. The actual

power can vary depending on particular designs. Please contact to a technical expert from Infineon for more information.

Datasheet

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Quasi-Resonant 800 V CoolSET™ - in DSO-12 Package

Table of Contents

Product Highlights.......................................................................................................................... 1

Features ........................................................................................................................................ 1

Applications................................................................................................................................... 1

Description .................................................................................................................................... 1

Output Power of 5th generation Quasi-Resonant CoolSET™ ................................................................ 2

Table of Contents ........................................................................................................................... 3

1

2

Pin Configuration and Functionality......................................................................................... 5

Representative Block Diagram................................................................................................. 6

3

Functional Description............................................................................................................ 7

V_CCPre-Charging and Typical V_CCVoltage during Start-up.....................................................................7

Soft-start..................................................................................................................................................7

Normal Operation ...................................................................................................................................8

Digital Frequency Reduction .............................................................................................................8

3.1

3.2

3.3

3.3.1

3.3.1.1

3.3.1.2

3.3.1.3

3.3.2

3.3.2.1

3.3.3

3.3.4

3.4

Minimum ZC Count Determination ..............................................................................................8

Up/down counter..........................................................................................................................8

Zero crossing (ZC counter) ...........................................................................................................9

Ringing suppression time ................................................................................................................10

Switch on determination............................................................................................................10

Switch off determination.................................................................................................................10

Modulated gate drive .......................................................................................................................11

Current limitation..................................................................................................................................11

Active Burst Mode with selectable power level....................................................................................12

Entering Active Burst Mode Operation............................................................................................13

During Active Burst Mode Operation...............................................................................................13

Leaving Active Burst Mode Operation .............................................................................................13

Protection Functions.............................................................................................................................14

Line Over Voltage .............................................................................................................................15

Brownout..........................................................................................................................................15

V_CCOver Voltage or Under Voltage...................................................................................................15

Over Load .........................................................................................................................................15

Output Over Voltage ........................................................................................................................15

Over Temperature............................................................................................................................15

3.5

3.5.1

3.5.2

3.5.3

3.6

3.6.1

3.6.2

3.6.3

3.6.4

3.6.5

3.6.6

4

Electrical Characteristics .......................................................................................................18

Absolute Maximum Ratings ..................................................................................................................18

Operating Range....................................................................................................................................19

Operating Conditions............................................................................................................................19

Internal Voltage Reference....................................................................................................................20

PWM Section..........................................................................................................................................20

Current Sense ........................................................................................................................................20

Soft Start................................................................................................................................................21

Digital Zero Crossing .............................................................................................................................21

Active Burst Mode..................................................................................................................................22

Line Over Voltage Protection ................................................................................................................22

Brownout Protection.............................................................................................................................22

V_CCOver Voltage Protection ..................................................................................................................22

Over Load Protection ............................................................................................................................23

4.1

4.2

4.3

4.4

4.5

4.6

4.7

4.8

4.9

4.10

4.11

4.12

4.13

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Table of Contents

4.14

4.15

4.16

Output Over Voltage Protection ...........................................................................................................23

Thermal Protection ...............................................................................................................................23

CoolMOS™ Section ................................................................................................................................24

5

6

7

8

CoolMOS™ Performance Characteristics ..................................................................................25

Output Power Curve ..............................................................................................................32

Outline Dimension.................................................................................................................36

Marking................................................................................................................................37

Revision history.............................................................................................................................38

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Pin Configuration and Functionality

1

Pin Configuration and Functionality

The pin configuration is shown in Figure 2 and the functions are described in Table 2.

12

1

11

2

10

3

9

4

8

5

7

6

Figure 2

Pin Configuration

Table 2

Pin Definitions and Functions

Symbol

Function

Feedback & Burst entry/exit control

1

FB

FB pin combines the functions of feedback control, selectable burst entry/exit

control and overload/open loop protection.

Input Line OVP & Brownout

2

VIN

VIN pin is connected to the bus via resistor divider (see Figure 1) to sense the

line voltage. This pin combines the functions of input Line OVP, Brownout and

minimum ZC count setting for low and high line.

Current Sense

3

4

CS

The CS pin is connected to the shunt resistor for the primary current sensing

externally and to the PWM signal generator block for switch-off determination

(together with the feedback voltage) internally.

Zero Crossing Detection

ZCD

ZCD pin combines the functions of start up, zero crossing detection and output

over voltage protection. During the start up, it is used to provide a voltage level

to the gate of power switch CoolMOS™ to charge V_CCcapacitor.

Drain

5, 6, 7, 8

11

DRAIN

VCC

The DRAIN pin is connected to the drain of the integrated CoolMOS™.

VCC(Positive Voltage Supply)

The VCC pin is the positive voltage supply to the IC. The operating range is

between V_{VCC_OFF}and V_{VCC_OVP}

.

Ground

12

GND

NC

The GND pin is the common ground of the CoolSET™.

Not connected.

9, 10

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Representative Block Diagram

2

Representative Block Diagram

VCC

ZCD

LOVP

Brown In / Out

Thermal Protection

250 µs

Blanking

time

50 µs

Blanking

time

V_{VIN_LOVP}

250 µs

Blanking

time

V_{VIN_BO}

OTP

Mode

C16a

C16b

T_j> T_{jcon_OTP}*

Brown

Out

S

R

Q

C7a

Input

OVP

S

R

Q

S

R

Q

Mode

VIN

Mode

Autorestart

Protect

T_j< T_{jcon_OTP}-T_{jHYS_OTP}

V_{VIN_BI}

Autorestart

Protect

Autorestart

Protect

Power Management

Zero Crossing

ZC counter

V_{ZCD_CT}

Internal

Bias

Undervoltage Lockout

16V

clk

C2

DRAIN

Voltage

R_ZCD

Reference

10V

D1

&

G1

Protection

Comparator

S

R

Q

C12

50us

1

V_{VCC_OVP}

Up/down counter

G7

Autorestart

Protect

t_{VIN_REF}

C8

V_{VIN_REF}

S

Q

PWM Control

Counter

t_COUNT

Soft-start

1

R

G2

C6

Autorestart

Protect

Counter

P_{ZCD_OVP_B}

D3

V_{ZCD_OVP}

C1

Ringing

Suppression

V_{ZCD_RS}

T_OffMax

&

V_REF

Gate

Drive

G9

&

1

C12

C5

t_{FB_OLP_B}

V_{FB_OLP}

V_{FB_LB}

/

G5

G4

S

R

R_FB

G8

Q

&

G6

1

V_{FB_R}

G3

T_OnMax

Burst

Mode

detect

Gate

Drive

f_SB

^enOSC

C3

Gate Driver

V_{FB_HLC}

V_{CS_N}

V_{CS_BL1}

V_{CS_BL2}

C4

FB

C13

C15

V_{FB_LHC}

Regulation

Peak

Burst Mode

Level Select

Current

Limit

V_{CS_FB}

Leading

Edge

Blanking

t_{CS_LEB}

V_{FB_EBL1}

V_{FB_EBL2}

10kΩ

CS

V_PWM

V₁

C9

t_{FB_BEB}

Active

Burst Mode

D2

1pF

G_PWM

2pF

C20

PWM

Comparator

PWM OP

C10

V_{FB_BOn}

Current Mode

Delay

t_{CS_STG_SAM}

GND

C17

C11

V_{FB_BOff}

V_{CS_STG}

Active Burst Block

Current Limiting/ Current Sense short to Gnd Protection

Figure 3

Representative Block Diagram

Junction temperature of the controller chip is sensed for over temperature protection. The

Note:

CoolMOS™ is a separated chip from the controller chip in the same package. Please refer to the

design guide and/or consult a technical expert from Infineon for the proper thermal design.

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Functional Description

3

Functional Description

3.1

V_CCPre-Charging and Typical V_CCVoltage during Start-up

As shown in Figure 1, once the line input voltage is applied, a rectified voltage appears across the capacitor

C_BUS.The pull up resistor R_STARTUPprovides a current to charge the C_iss(input capacitance) of CoolMOS™ and

gradually generate one voltage level. If the voltage over C_issis high enough, CoolMOS™ on and V_CCcapacitor will

be charged through primary inductance of transformer L_P,CoolMOS™ and internal diode D₃with two steps

1

constant current source I_{VCC_ Charge1}¹and I_{VCC_ Charge3}

.

A very small constant current source (I_{VCC_Charge1}) is charged to the V_CCcapacitor till V_CCreach V_{CC_SCP}to protect the

controller from V_CCpin short to ground during the start up. After this, the second step constant current source

(I_{VCC_Charge3}) is provided to charge the V_CCcapacitor further, until the V_CCvoltage exceeds the turned-on threshold

V_{VCC_ON}. As shown in the time phase I in Figure 4, the V_CCvoltage increase almost linearly with two steps.

V_VCC

I

II

III

(V_{VCC_ON})16V

(V_{VCC_OFF}) 10V

t_A

t_B

(V_{VCC_SCP}) 1.1V

I_VCC

t

(I_{VCC_Normal}) 0.9mA

0

(I_{VCC_Charge1}) -0.2mA

t₁

t₂

I_{VCC_Charge2/3}) -3/-3.2mA

-I_VCC

Figure 4

VCC voltage and current at start up

The time taking for the V_CCpre-charging can then be approximately calculated as:

푉_{ꢀ퐶퐶_푆퐶푃}∙ ꢁ_ꢀ퐶퐶(푉_{ꢀ퐶퐶_푂푁}− 푉_{ꢀ퐶퐶_푆퐶푃}) ∙ ꢁ_ꢀ퐶퐶

(1)

푡₁= 푡_A+ 푡_B=

+

퐼_{ꢀ퐶퐶_퐶ℎ푎푟ꢂ푒1}

퐼_{ꢀ퐶퐶_퐶ℎ푎푟ꢂ푒3}

When the V_CCvoltage exceeds the V_CCturned on threshold V_{VCC_ON}at time t₁, the IC begins to operate with soft

start. Due to power consumption of the IC and the fact that there is still no energy from the auxiliary winding to

charge the V_CCcapacitor before the output voltage is built up, the V_CCvoltage drops (Phase II). Once the output

voltage is high enough, the V_CCcapacitor receives the energy from the auxiliary winding from the time t₂onward

and delivering the I_{VCC_ Normal}²to the CoolSET™. The V_CCthen will reach a constant value depending on output

load.

3.2

Soft-start

As shown in Figure 5, at the time t_on, the IC begins to operate with a soft-start. By this soft-start the switching

stresses for the MOSFET, diode and transformer are minimized. The soft-start implemented in ICE5QRxx80BG is

a digital time-based function. The preset soft-start time is t_SS(12 ms) with 4 steps. If not limited by other

functions, the peak voltage on CS pin will increase step by step from 0.3 V to 1 V finally. During the first 3 ms of

soft start, the ringing suppression time is set to 25 µsto avoid irregular switching due to switch off oscillation

noise.

¹I_{VCC_ Charge1/2/3}is charging current from the controller to V_CCcapacitor during start up

²I_{VCC_ Normal}is supply current from V_CCcapacitor or auxiliary winding to the CoolSET™ during normal operation

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Functional Description

Vcs (V)

V_{CS_Peak}

0.75

0.60

0.45

0.30

t_on

3

6

9

12

Time(ms)

Figure 5

Maximum current sense voltage during soft start

3.3

Normal Operation

During normal operation, the ICE5QRxx80BG works with a digital signal processing circuit composing an

up/down counter, a zero-crossing counter (ZC counter) and a comparator, and an analog circuit composing a

current measurement unit and a comparator. The switch-on and -off time points are each determined by the

digital circuit and the analog circuit, respectively. The input information of the zero-crossing signal and the

value of the up/down counter are needed to determine the switch-on while the feedback signal V_FBand the

current sensing signal V_CSare necessary for the switch-off determination. Details about the full operation of the

CoolSET™ in normal operation are illustrated in the following paragraphs.

3.3.1

Digital Frequency Reduction

As mentioned above, the digital signal processing circuit consists of an up/down counter, a ZC counter and a

comparator. These three parts are key to implement digital frequency reduction with decreasing load. In

addition, a ringing suppression time controller is implemented to avoid mis-triggering by the high frequency

oscillation when the output voltage is very low under conditions such as soft start period or output short

circuit. Functionality of these parts is described as in the following.

3.3.1.1

Minimum ZC Count Determination

To reduce the switching frequency difference between low and high line, minimum ZC count determination is

implemented. Minimum ZC count is set to 1 if VIN less than V_{VIN_REF}which represents for low line. For high line,

minimum ZC count is set to 3 after VIN higher than V_{VIN_REF}. There is also a hysteresis V_{VIN_REF}with certain blanking

time t_{VIN_REF}for stable AC line selection between low and high line.

3.3.1.2

Up/down counter

The up/down counter stores the number of the zero crossing which determines valley numbers to switch-on

the main MOSFET after demagnetization of the transformer. This value is fixed according to the feedback

voltage, V_FB, which contains information about the output power. Indeed, in a typical peak current mode

control, a high output power results in a high feedback voltage, and a low output power leads to a low

feedback voltage. Hence, according to V_FB, the value in the up/down counter is changed to vary the power

MOSFET off-time according to the output power. In the following, the variation of the up/down counter value

according to the feedback voltage is explained.

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Functional Description

The feedback voltage V_FBis internally compared with three threshold voltages V_{FB_LHC}, V_{FB_HLC}and V_{FB_R}at each

clock period of 48 ms. The up/down counter counts then upward, keep unchanged or count downward, as

shown in Table 3.

Table 3

V_FB

Operation of up/down counter

up/down counter action

Always lower than V_{FB_LHC}

Count upwards till n=8/10¹

Stop counting, no value changing

Count downwards till n=1/3²

Set up/down counter to n=1/3²

Once higher than V_{F_LHC}, but always lower than V_{FB_HLC}

Once higher than V_{FB_HLC}, but always lower than V_{FB_R}

Once higher than V_{FB_R}

The number of zero crossing is limited and therefore, the counter varies among 1 to 8 (for low line) or 3 to 10

(for high line) and any attempt beyond this range is ignored. When V_FBexceeds V_{FB_R}voltage, the up/down

counter is reset to 1 (low line) and 3 (high line) in order to allow the system to react rapidly to a sudden load

increase. The up/down counter value is also reset to 1 (low line) and 3 (high line) at the start-up time, to ensure

an efficient maximum load start up. Figure 6 shows some examples on how up/down counter is changed

according to the feedback voltage over time.

The use of two different thresholds V_{FB_LHC}and V_{FB_HLC}to count upward or downward is to prevent frequency

jittering when the feedback voltage is close to the threshold point.

clock

T=48ms

clock

T=48ms

t

V_FB

V_FB,R1

V_FB

V_FB,R3

V_FB,HLC

V_FB,LHC

V_FB,HLC

V_FB,LHC

Up/down

counter

1

3

Case 1

Case 2

Case 3

5

2

8

6

3

8

7

4

8

5

8

5

8

5

8

7

6

3

6

5

2

5

Case 1

Case 2

6

4

7

5

8

6

9

7

9

7

9

8

7

5

8

6

4

7

4

7

6

9

Case 3 10 10 10 10 10 10

Low line

Up/down counter operation

High line

Figure 6

3.3.1.3

Zero crossing (ZC counter)

In the system, the voltage from the auxiliary winding is applied to the ZCD pin through a RC network, which

provides a time delay to the voltage from the auxiliary winding. Internally this pin is connected to a negative

clamping network, a zero-crossing detector, an output overvoltage detector and a ringing suppression time

controller.

During on-state of the power switch, a positive gate drive voltage is applied to the ZCD pin due to R_ZCDresistor,

hence external diode D_ZC(see Figure 1) is added to block the negative voltage from the auxiliary winding.

The ZC counter has a minimum value of 1 (for low line) or 3 (for high line) and maximum value of 8 (for low line)

or 10 (for high line). After the internal high voltage CoolMOS™ is turned off, every time when the falling voltage

¹n=8 (for low line) and n=10 (for high line)

²n=1 (for low line) and n=3 (for high line)

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Functional Description

ramp of on ZCD pin crosses the V_{ZCD_CT}threshold, a zero crossing is detected and ZC counter will increase by 1. It

is reset every time after the DRIVER output is changed to high.

To achieve the switch on at voltage valley, the voltage from the auxiliary winding is fed to a time delay network

(the RC network consists of R_ZCand C_ZCas shown in Figure 1) before it is applied to the zero-crossing detector

through the ZCD pin. The needed time delay to the main oscillation signal Δt should be approximately one

fourth of the oscillation period, T_OSC(by transformer primary inductor and drain-source capacitor) minus the

propagation delay from the detected zero-crossing to the switch-on of the main switch t_delay, theoretically:

푇_푂푆퐶

(2)

Δt =

− 푡_{푑푒푙푎푦}

4

This time delay should be matched by adjusting the time constant of the RC network which is calculated as:

푅_푍퐶∙푅_푍퐶퐷

휏_ꢃd= ꢁ_푍퐶.

(3)

푅_푍퐶+푅_푍퐶퐷

3.3.2

Ringing suppression time

After CoolMOS™ is turned off, there will be some oscillation on V_DS, which will also appear on V_ZCD. To avoid mis-

triggering by such oscillations to turn on the CoolMOS™, a ringing suppression timer is implemented. This

suppression time is depended on the voltage V_ZCD. If the voltage V_ZCDis lower than the threshold V_{ZCD_RS}, a longer

preset time t_{ZCD_RS2}is applied. However, if the voltage V_ZCDis higher than the threshold, a shorter time t_{ZCD_RS1}is

set.

3.3.2.1

Switch on determination

After the gate drive goes to low, it cannot be changed to high during ring suppression time.

After ring suppression time, the gate drive can be turned on when the ZC counter value is equal to up/down

counter value.

However, it is also possible that the oscillation between primary inductor and drain-source capacitor damps

very fast and IC cannot detect zero crossings event. In this case, a maximum off time is implemented. After gate

drive has been remained off for the period of T_OffMax, the gate drive will be turned on again regardless of the ZC

counter values and V_ZCD. This function can effectively prevent the switching frequency from going lower than 20

kHz. Otherwise it will cause audible noise.

3.3.3

Switch off determination

In the converter system, the primary current is sensed by an external shunt resistor, which is connected

between the internal low side MOSFET and the common ground. The sensed voltage across the shunt resistor

V_CSis applied to an internal current measurement unit, and its output voltage V₁is compared with the feedback

voltage V_FB. Once the voltage V₁exceeds the voltage V_FB, the output flip-flop is reset. As a result, the main power

switch is switched off. The relationship between the V₁and the V_CSis described by (see Figure 3):

푉_CS= 퐼_D× 푅_CS

(4)

푉 = 퐺_푃푊푀∙ 푉_퐶푆+ 푉_푃푊푀

1

where, V_CS

: CS pin voltage

I_D

: power MOSFET current

R_CS

V₁

: resistance of the current sense resistor

: voltage level compared to V_FB

G_PWM: PWM-OP gain

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Functional Description

To avoid mis-triggering caused by the voltage spike across the shunt resistor at the turn on of the main power

switch, a leading edge blanking time, t_LEB, is applied to the output of the comparator. In other words, once the

gate drive is turned on, the minimum on time of the gate drive is the leading edge blanking time.

In addition, there is a maximum on time, t_OnMax, limitation implemented in the IC. Once the gate drive has been

in high state longer than the maximum on time, it will be turned off to prevent the switching frequency from

going too low because of long on time.

Also, if the voltage at the current sense pin is lower than the preset threshold V_{CS_STG}after the time t_{CS_STG_SAM}for

three consecutive pulses during on-time of the power switch, this abnormal V_CSwill trigger IC into auto restart

mode.

3.3.4

Modulated gate drive

The drive-stage is optimized for EMI consideration. The switch on speed is slowed down before it reaches the

CoolMOS™ turn on threshold. That is a slope control of the rising edge at the output of driver (see Figure 7). Thus

the leading switch spike during turn on is minimized.

V_GATE(V)

V_{GATE_HIGH}

typ. t = 117ns

5V

t (ns)

Figure 7

Gate rising waveform

3.4

Current limitation

There is a cycle by cycle current limitation realized by the current limit comparator to provide over-current

detection. The source current of the CoolMOS™ is sensed via a sense resistor R_CS. By means of R_CSthe source

current is transformed to a sense voltage V_CSwhich is fed into the pin CS. If the voltage V_CSexceeds an internal

voltage limit, adjusted according to the Line voltage, the comparator immediately turns off the gate drive.

When the main bus voltage increases, the switch on time becomes shorter and therefore the operating

frequency is also increased. As a result, for a constant primary current limit, the maximum possible output

power is increased which is beyond the converter design limit.

To compensate such effect, both the internal peak current limit circuit (V_CS) and the ZC count varies with the

bus voltage according to Figure.

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Quasi-Resonant 800 V CoolSET™ - in DSO-12 Package

Functional Description

V_CS(V)

V_{CS_N}, 1

0.9

Starting ZC = 1

Starting ZC = 3

V_VIN(V)

0.83 1.29 V_{VIN_REF}

Figure 8

Variation of the V_CSlimit voltage according to the V_INvoltage

3.5

Active Burst Mode with selectable power level

At light load condition, the IC enters Active Burst Mode operation to minimize the power consumption. Details

about Active Burst Mode operation are explained in the following paragraphs.

The burst mode entry level can be selected by changing the different resistor R_Selat FB pin. There are 2 levels to

be selected with different resistor which are targeted for low range of Active Burst Mode power (Level 1) and

high range of Active Burst Mode power (Level 2). The following table shows the control logic for the entry and

exit level with the FB voltage.

Table 4

Two levels entry and exit Active Burst Mode power

Level V_FB

V_CS

Entry level

V_{FB_EBLX}

Exit level

V_{FB_LB}

1

2

V_FB> V_{REF_B}

V_FB< V_{REF_B}

V_{CS_BL1}= 0.31 V

V_{CS_BL2}= 0.35 V

0.90 V

2.75 V

1.05 V

2.75 V

During IC first startup, the internal Ref_GOODsignal is logic low when V_CC< 4 V. It will reset the Burst Mode level

Detection latch. When the Burst Mode Level Detection latch is low and IC is in OFF state, the IC internal R_FB

resistor is disconnected from the FB pin and a current source I_selis turned on instead.

From V_CC=4 V to V_CCon threshold, the FB pin will start to charge to a voltage level associated with R_Selresistor.

When V_CCreaches V_CCon threshold, the FB voltage is sensed. The burst mode thresholds are then chosen

according to the FB voltage level. The Burst Mode Level Detection latch is then set to high. Once the detection

latch is set high, any change of the FB level will not change the threshold selection. The current source I_selis

turned off in 2 μs after V_CCreaches V_CCon threshold and the R_FBresistor is re-connected to FB pin (see Figure 9).

Datasheet

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Functional Description

V_dd

I_sel

S₂

UVLO

S

2μs

delay

R

R_FB

Ref_good

S₁

FB

Burst mode

detection latch

V_{CS_BLx}

Selection

Logic

Compare

logic

V_{REF_B}

V_{FB _EBL x}

Control unit

Figure 9

Burst mode detect and adjust

3.5.1

Entering Active Burst Mode Operation

For determination of entering Active Burst Mode operation, three conditions apply:



the feedback voltage is lower than the threshold of V_{FB_EBLX}

the up/down counter is 8 for low line or 10 for high line and

the above two conditions remain after a certain blanking time t_{FB_BEB}(20 ms)

Once all of these conditions are fulfilled, the Active Burst Mode flip-flop is set and the controller enters Active

Burst Mode operation. This multi-condition determination for entering Active Burst Mode operation prevents

mis-triggering of entering Active Burst Mode operation, so that the controller enters Active Burst Mode

operation only when the output power is really low during the preset blanking time.

3.5.2

During Active Burst Mode Operation

After entering the Active Burst Mode the feedback voltage rises as V_Ostarts to decrease due to the inactive PWM

section. One comparator observes the feedback signal if the voltage level V_{FB_BOn}is exceeded. In that case the

internal circuit is power up to restrart with switching.

Turn-on of the power MOSFET is triggered by ZC counter with a fixed value of 8 ZC for low line and 10 ZC for

high line. Turn-off is resulted if the voltage across the shunt resistor at CS pin hits the threshold V_{CS_BLX}

.

If the output load is still low, the feedback signal decreases as the PWM section is operating. When feedback

signal reaches the low threshold V_{FB_BOff}, the internal circuit is reset again and the PWM section is disabled until

next time V_FBsignal increases beyond the V_{FB_BOn}threshold. In Active Burst Mode, the feedback signal is changing

like a saw tooth between V_{FB_BOff}and V_{FB_BOn}(see Figure 10).

3.5.3

Leaving Active Burst Mode Operation

The feedback voltage immediately increases if there is a high load jump. This is observed by a comparator with

threshold of V_{FB_LB}. As the current limit is V_{CS_BLX}(31% or 35%) during Active Burst Mode, a certain load is needed

so that feedback voltage can exceed V_{FB_LB}. After leaving Active Burst Mode, Gate will only turn on if zero

crossing is detected (V_ZCD<V_{ZCD_LB}) to ensure full transformer demagnetization. This eases synchronous

rectification implementation by ensuring DCM operation upon exit of burst mode. Then, normal peak current

control through V_FBis re-activated. In addition, the up/down counter will be set to 1 (low line) or 3 (high line)

immediately after leaving Active Burst Mode. This is helpful to minimize the output voltage undershoot.

Datasheet

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Quasi-Resonant 800 V CoolSET™ - in DSO-12 Package

Functional Description

V_FB

Entering Active Leaving Active

Burst Mode

V_{FB_LB}

V_{FB_BOn}

V_{FB_BOff}

V_{FB_EBx}

Time to 8^th/10^thZC and

t

Blanking time (t_{FB_BEB}

)

V_CS

Current limit level during

Active Burst Mode

V_{CS_N}

V_{CS_BLx}

t

V_VCC

V_{VCC_OFF}

t

V_O

Max. Ripple < 1%

Figure 10

Signals in Active Burst Mode

3.6

Protection Functions

The ICE5QRxx80BG provides numerous protection functions which considerably improve the power supply

system robustness, safety and reliability. The following table summarizes these protection functions. There are

3 different kinds of protection mode; non switch auto restart, auto restart and odd skip auto restart. The details

can refer to the Figure 11, Figure 12 and Figure 13.

Table 5

Protection functions

Protection Functions

Normal Mode

Burst Mode

Protection Mode

Burst ON

Burst OFF

√

Line Over Voltage

Brownout

Non switch Auto Restart

√

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Quasi-Resonant 800 V CoolSET™ - in DSO-12 Package

Functional Description

Protection Functions

Normal Mode

Burst Mode

Protection Mode

Burst ON

Burst OFF

V_CCOver Voltage

V_CCUnder Voltage

Over Load

Odd skip Auto Restart

Auto Restart

√

NA¹

√

NA¹

√

NA¹

√

Odd skip Auto Restart

Non switch Auto Restart

Output Over Voltage

Over Temperature

√

3.6.1

Line Over Voltage

The AC Line Over Voltage Protection is detected by sensing bus capacitor voltage through VIN pin via 2 potential

divider resistors, R_l1and R_l2(see Figure 1). Once V_VINvoltage is higher than the line over voltage threshold V_{VIN_LOVP}, the

controller enters Line Over Voltage Protection and it releases the protection mode after V_VINis lower than V_{VIN_LOVP}

.

3.6.2

Brownout

The Brownout protection is observed by VIN pin similar to line over voltage Protection method with a different

voltage threshold level. When V_VINvoltage is lower than the brownout threshold (V_{VIN_BO}), the controller enters

Brownout Protection and it releases the protection mode after V_VINhigher than brownin threshold (V_{VIN_BI}).

3.6.3

V_CCOver Voltage or Under Voltage

During operation, the V_CCvoltage is continuously monitored. In case of a V_CCOver Voltage or Under Voltage,

the IC is reset and the main power switch is then kept off. After the V_CCvoltage falls below the threshold V_{VCC_OFF}

the new start up sequence is activated. The V_CCcapacitor is then charged up. Once the voltage exceeds the

threshold V_{VCC_ON}, the IC begins to operate with a new soft-start.

,

3.6.4

Over Load

In case of open control loop or output Over Load, the feedback voltage will be pulled up and exceed V_{FB_OLP}

.

After a blanking time of t_{FB_OLP_B}, the IC enters auto restart mode. The blanking time here enables the converter

to operate for a certain time during a sudden load jump.

3.6.5

Output Over Voltage

During off-time of the power MOSFET, the voltage at the ZCD pin is monitored for Output Over Voltage

detection. If the voltage is higher than the preset threshold V_{ZCD_OVP}for 10 consecutive pulses, the IC enters

Output Over Voltage Protection.

3.6.6

Over Temperature

If the junction temperature of controller chip exceeds T_{jcon_OTP}, the IC enters into Over Temperature protection

(OTP) auto restart mode. The controller implements with a 40 ^°C hysteresis. In another word, the controller/IC can

°

only resume from OTP if its junction temperature drops 40 C from OTP trigger point. Please be noted that the

separated CoolMOS™ chip may have different temperature (mostly higher) from the controller chip.

¹Not Applicable

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Functional Description

Fault

Fault released

detected

Switching start at the

following restart cycle

Start up and detect at

every charging cycle

V_VCC

V_{CC_ON}

V_{CC_OFF}

t

V_CS

No switching

Figure 11

Non switch Auto Restart Mode

Fault

Fault released

detected

Start up and detect at every

charging cycle

Switching start at the

following restart cycle

t

V_VCC

V_{CC_ON}

V_{CC_OFF}

t

V_CS

Figure 12

Auto Restart Mode

Datasheet

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Quasi-Resonant 800 V CoolSET™ - in DSO-12 Package

Functional Description

Fault

Fault released

detected

Start up and detect at

every even charging

cycle

Switching start at the

following even restart

t

V_VCC

No detect

cycle

V_{CC_ON}

V_{CC_OFF}

t

V_CS

Figure 13

Odd skip Auto Restart Mode

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Electrical Characteristics

4

Electrical Characteristics

Attention:

All voltages are measured with respect to ground (Pin12). The voltage levels are valid if other

ratings are not violated.

4.1

Absolute Maximum Ratings

Attention:

Stresses above the maximum values listed here may cause permanent damage to the device.

Exposure to absolute maximum rating conditions for extended periods may affect device

reliability. Maximum ratings are absolute ratings; exceeding only one of these values may

cause irreversible damage to the integrated circuit. System design needs to ensure not to

exceed the maximum limit. Ta=25°C unless otherwise specified.

Table 6

Absolute Maximum Ratings

Parameter

Symbol

Limit Values

Unit

Note / Test Condition

Min.

Max.

Drain Source Voltage (CoolMOS™)

ICE5QRxx80BG

V_DS

V

A

T_j= 25 °C

-

800

Pulse drain current

ICE5QR4780BG¹

I_{D_Pulse}

-

2.6

5.8

ICE5QR2280BG²

ICE5QR1680BG²

ICE5QR0680BG²

Avalanche energy, repetitive,

E_AR

mJ

t_ARlimited by max. T_J=150°C with

T_J,Start=25°C

ICE5QR4780BG

ICE5QR2280BG

ICE5QR1680BG

ICE5QR0680BG

-

0.02

0.05

0.07

0.22

I_D=0.2 A, V_DD=50 V

I_D=0.4 A, V_DD=50 V

I_D=0.6 A, V_DD=50 V

I_D=1.8 A, V_DD=50 V

Avalanche current, repetitive,

I_AR

A

t_ARlimited by max. T_J=150°C with

T_J,Start=25°C

ICE5QR4780BG

ICE5QR2280BG

ICE5QR1680BG

ICE5QR0680BG

-

0.2

0.4

0.6

1.8

27.0

VCC Supply Voltage

FB Voltage

V_CC

V_FB

-0.3

V

-0.3

3.6

27

ZCD Voltage

CS Voltage

V_ZCD

V_CS

3.6

¹Pulse width t_Plimited by T_j,Max

²Pulse width t_P=20 µs and limited by T_j,Max

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Electrical Characteristics

VIN Voltage

V_IN

-0.3

3.6

V

Maximum DC current on any pin

except DRAIN & CS pins

-10.0

10.0

mA

ESD robustness HBM

ESD robustness CDM

V_{ESD_HBM}

V_{ESD_CDM}

T_J

-

2000

500

150

V

According to EIA/JESD22

Controller & CoolMOS

-

V

Junction temperature range

Storage Temperature

-40

-55

°C

T_STORE

R_thJA

Thermal Resistance (Junction-

Ambient)

K/W Setup according to the

JESD51 standard and

using minimum drain pin

copper area in a 2 oz

copper single sided PCB

ICE5QR4780BG

ICE5QR2280BG

ICE5QR1680BG

ICE5QR0680BG

-

105

98

95

94

4.2

Operating Range

Note:

Within the operating range the IC operates as described in the functional description.

Table 7

Operating Range

Parameter

Symbol

Limit Values

Unit

Remark

Min.

Max.

VCC Supply Voltage

V_VCC

V_{VCC_OFF}

V_{VCC_OVP}

T_{jCon_OTP}

150

Max value limited due

to OTP of controller

chip

Junction Temperature of controller T_{jCon_op}

Junction Temperature of CoolMOS T_{jCoolMOS_op}

-40

˚C

4.3

Operating Conditions

Note:

The electrical characteristics involve the spread of values within the specified supply voltage and

junction temperature range T_Jfrom – 40 ^°C to 125 ^°C. Typical values represent the median values,

which are related to 25°C. If not otherwise stated, a supply voltage of V_CC= 18 V is assumed.

Table 8

Operating Conditions

Parameter

Symbol

Limit Values

Unit

Note / Test Condition

Min.

Typ. Max.

VCC Charge Current

V_VCC=0V, R_StartUp=50MΩ

and V_DRAIN=90V

I_{VCC_Charge1}

I_{VCC_Charge2}

I_{VCC_Charge3}

I_{VCC_Startup}

-0.35 -0.2

-0.09

mA

V_VCC=3V, R_StartUp=50MΩ

and V_DRAIN=90V

-

-3.2

-3

-

V_VCC=15V, R_StartUp=50MΩ

and V_DRAIN=90V

-5

-

-1

-

Current Consumption, Startup

Current

V_VCC=15V

0.19

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Electrical Characteristics

I_FB=0A (No gate

switching)

Current Consumption, Normal

I_{VCC_Normal}

-

0.9

-

mA

Current Consumption, Auto Restart I_{VCC_AR}

-

320

0.5

16

-

µA

mA

V

Current Consumption, Burst Mode I_{VCC_Burst Mode}

-

V_FB=1.8V

VCC Turn-on Threshold Voltage

VCC Turn-off Threshold Voltage

VCC Short Circuit Protection

V_{VCC_ON}

V_{VCC_OFF}

V_{VCC_SCP}

15.3

9.5

-

16.5

10.5

1.9

10

V

1.1

V

VCC Turn-off blanking

t_{VCC_OFF_B}

-

50

-

µs

4.4

Internal Voltage Reference

Table 9

Internal Voltage Reference

Symbol

Parameter

Limit Values

Unit

Note / Test Condition

Min.

Typ. Max.

Measured at pin FB

I_FB=0

Internal Reference Voltage

V_REF

3.2

3.3 3.39

V

4.5

PWM Section

Table 10

PWM Section

Parameter

Symbol

Limit Values

Unit

Note / Test Condition

Min.

Typ.

Max.

Feedback Pull-Up Resistor

PWM-OP Gain

R_FB

11

15

20

kΩ

-

G_PWM

V_PWM

1.95

0.42

20

2.05

0.5

2.15

0.58

60

Offset for Voltage Ramp

V

Maximum on time in normal operation t_OnMax

Maximumoff time in normaloperation t_OffMax

35

µs

24

42.5

71

4.6

Current Sense

Table 11

Current Sense

Parameter

Symbol

Limit Values

Unit

Note / Test Condition

Min.

Typ.

Max.

Peak current limitation in normal

operation

V_{CS_N}

0.94

1.00

1.06

V

Leading Edge Blanking time

t_{CS_LEB}

V_{CS_BL1}

118

220

0.31

462

ns

V

Peak Current Limitation in Active

0.26

0.36

Burst Mode – Level 1

Peak Current Limitation in Active

Burst Mode – Level 2

V_{CS_BL2}

V_{CS_STG}

0.3

0.35

0.10

0.4

V

0.06

0.15

Abnormal CS voltage threshold

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Electrical Characteristics

P_{CS_STG}

-

3

5

-

cycle

µs

Abnormal CS voltage Consecutive

Trigger

Abnormal CS voltage Sample period t_{CS_STG_SAM}2.3

4.7

Soft Start

Table 12

Soft Start

Parameter

Symbol

Limit Values

Unit

Note / Test Condition

Min.

8.5

-

Typ.

12

Max.

Soft-Start time

t_SS

t_{SS_S}

-

ms

V

1

Soft-start time step

3

1

Internal regulation voltage at first

V_SS1

0.30

CS peak voltage

step

1

Internal regulation voltage step at

soft start

V_{SS_S}

-

0.15

-

V

4.8

Digital Zero Crossing

Table 13

Digital Zero Crossing

Parameter

Symbol

Limit Values

Unit

Note / Test Condition

Min.

60

-

Typ.

100

0.45

Max.

150

-

Zero crossing threshold voltage

Zero crossing Ringing suppression

threshold

V_{ZCD_CT}

V_{ZCD_RS}

mV

V

Minimum ringing suppression time t_{ZCD_RS1}

1.5

-

2.5

4.1

-

µs

V_ZCD> V_ZCD,RS

V_ZCD< V_ZCD,RS

Maximum ringing suppression time t_{ZCD_RS2}

25.00

Threshold to reset Up/Down

Counter

V_{FB_R}

-

2.80

-

V

Threshold for downward counting

V_{FB_HLC}

-

2.05

-

V

Threshold for upward counting

Counter Time

V_{FB_LHC}

t_COUNT

R_ZCD

-

1.55

48

-

V

-

ms

kΩ

ZCD resistance

2.5

3.0

3.5

Internal resistor at

ZCD pin

VIN voltage threshold for line

selection

Blanking time for VIN voltage

threshold for line selection

V_{VIN_REF}

t_{VIN_REF}

1.48

-

1.52

1.58

-

V

16.00

ms

¹The parameter is not subjected to production test - verified by design/characterization

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Electrical Characteristics

4.9

Active Burst Mode

Table 14

Active Burst Mode

Parameter

Symbol

Limit Values

Unit

µA

V

Note / Test Condition

Min.

Typ.

Max.

3.9

I_sel

2.1

3

Charging current to select burst

mode

V_{REF_B}

V_{FB_EBL1}

V_{FB_EBL2}

t_{FB_BEB}

2.65

0.86

1.0

2.75

0.90

1.05

2.85

0.94

1.1

Burst mode selection reference

voltage

V

Feedback voltage for entering

Active Burst Mode for level 1

Feedback voltage for entering

Active Burst Mode for level 2

V

Blanking time for entering Active

Burst Mode

Feedback voltage for leaving Active V_{FB_LB}

Burst Mode

ZCD voltage threshold for first pulse V_{ZCD_LB}

after leaving Active Burst Mode

-

20

-

ms

V

2.65

60

2.75

100

2.85

150

mV

Feedback voltage for burst-on

V_{FB_BOn}

2.3

1.9

2.40

2.00

2.5

2.1

V

Feedback voltage for burst-off

V_{FB_BOff}

4.10

Line Over Voltage Protection

Table 15

Line OVP

Parameter

Symbol

Limit Values

Unit

Note / Test Condition

Min.

2.8

-

Typ.

2.9

Max.

3.0

-

Line Over Voltage threshold

Line Over Voltage Blanking

V_{VIN_LOVP}

V

t_{VIN_LOVP_B}

250

µs

4.11

Brownout Protection

Table 16

Brownout Protection

Parameter

Symbol

Limit Values

Unit

Note / Test Condition

Min.

0.63

-

0.37

-

Typ.

0.66

250

0.40

250

Max.

0.69

-

0.43

-

BrownIn threshold

BrownIn Blanking

BrownOut threshold

BrownOut Blanking

V_{VIN_BI}

V

µs

V

t_{VIN_BI_B}

V_{VIN_BO}

t_{VIN_BO_B}

µs

4.12

V_CCOver Voltage Protection

Table 17

V_CCOver Voltage Protection

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Electrical Characteristics

Parameter

Symbol

Limit Values

Unit

Note / Test Condition

Min.

24

-

Typ.

25.50

50.00

Max.

27

VCC Over Voltage threshold

VCC Over Voltage blanking

V_{VCC_OVP}

V

t_{VCC_OVP_B}

-

µs

4.13

Over Load Protection

Table 18

Overload Protection

Parameter

Symbol

V_{FB_OLP}

Limit Values

Unit

V

Note / Test Condition

Min.

Typ.

Max.

2.85

Over Load Detection threshold for

OLP protection at FB pin

2.65

2.75

Over Load Protection Blanking

Time

t_{FB_OLP_B}

-

30

-

ms

4.14

Output Over Voltage Protection

Table 19

Output OVP

Parameter

Symbol

Limit Values

Unit

Note / Test Condition

Min.

1.9

-

Typ.

2.0

Max.

2.1

-

Output Over Voltage threshold

V_{ZCD_OVP}

V

Output Over Voltage Blanking

Pulse

P_{ZCD_OVP_B}

10

pulse

Consecutive Pulse

4.15

Thermal Protection

Table 20

Thermal Protection

Parameter

Symbol

Limit Values

Unit

Note / Test Condition

Min.

129

-

Typ.

Max.

150

-

Over temperature protection¹

Over temperature Hysteresis

Over temperature Blanking Time

T_{jcon_OTP}

T_{jHYS_OTP}

t_{jcon_OTP_B}

140

°C

µs

Junction temperature

of the controller chip

(not the CoolMOS™

chip)

40

50

-

¹The parameter is not subjected to production test - verified by design/characterization

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Electrical Characteristics

4.16

CoolMOS™ Section

Table 21

ICE5QRxx80BG

Parameter

Symbol

Limit Values

Unit

Note / Test Condition

Min.

Typ.

Max.

V_(BR)DSS

R_DSon

Drain Source Breakdown Voltage

ICE5QRxx80BG

Drain to CS On-Resistance (inclusive

of low side MOSFET)

V

T_j= 25°C

800

-

Ω

ICE5QR4780BG

ICE5QR2280BG

ICE5QR1680BG

ICE5QR0680BG

-

4.13

8.69¹

2.13

4.31¹

1.53

3.01¹

0.71

1.27¹

4.85

-

2.35

-

1.75

-

0.80

-

Tj = 25°C

Tj=125°C, I_D=0.4A

Tj = 25°C

Tj=125°C, I_D=1A

Tj = 25°C

Tj=125°C, I_D=1.4A

Tj = 25°C

Tj=125°C, I_D=2A

V_GS=0V, V_DS=0~500V

C_o(er)

Effective output capacitance, energy

related¹

pF

ICE5QR4780BG

ICE5QR2280BG

ICE5QR1680BG

ICE5QR0680BG

-

3

7

8

24

30

-

Rise Time²

ns

t_rise

t_fall

Fall Time²

-

30

-

¹The parameter is not subjected to production test - verified by design/characterization

²Measured in a Typical Flyback Converter Application

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CoolMOS™ Performance Characteristics

5

CoolMOS™ Performance Characteristics

Figure 14

Safe Operating Area (SOA) curve for ICE5QR4780BG

Figure 15

Safe Operating Area (SOA) curve for ICE5QR2280BG

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CoolMOS™ Performance Characteristics

Figure 16

Safe Operating Area (SOA) curve for ICE5QR1680BG

Figure 17

Safe Operating Area (SOA) curve for ICE5QR0680BG

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CoolMOS™ Performance Characteristics

Figure 18

Power dissipation of ICE5QR4780BG, DSO-12 package; P_tot=f(T_a), (Maximum ratings as

given in section 4.1 must not be exceeded)

Figure 19

Power dissipation of ICE5QR2280BG, DSO-12 package; P_tot=f(T_a), (Maximum ratings as

given in section 4.1 must not be exceeded)

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CoolMOS™ Performance Characteristics

Figure 20

Power dissipation of ICE5QR1680BG, DSO-12 package; P_tot=f(T_a), (Maximum ratings as

given in section 4.1 must not be exceeded)

Figure 21

Power dissipation of ICE5QR0680BG, DSO-12 package; P_tot=f(T_a), (Maximum ratings as

given in section 4.1 must not be exceeded)

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CoolMOS™ Performance Characteristics

Figure 22

Drain-source breakdown voltage ICE5QRxx80BG; V_BR(DSS)=f(T_J), I_D=1 mA

Figure 23

Typical CoolMOS™ capacitances of ICE5QR4780BG (C=f(V_DS);V_GS=0 V; f=250 kHz)

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CoolMOS™ Performance Characteristics

Figure 24

Typical CoolMOS™ capacitances of ICE5QR2280BG (C=f(V_DS);V_GS=0 V; f=250 kHz)

Figure 25

Typical CoolMOS™ capacitances of ICE5QR1680BG (C=f(V_DS);V_GS=0 V; f=250 kHz)

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CoolMOS™ Performance Characteristics

Figure 26

Typical CoolMOS™ capacitances of ICE5QR0680BG (C=f(V_DS);V_GS=0 V; f=250 kHz)

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Output Power Curve

6

Output Power Curve

The calculated output power curves giving the typical output power versus ambient temperature are shown

below. The curves are derived based on a typical discontinuous mode flyback in an open frame design at

T_a=50°C, T_J=125°C (integrated high voltage MOSFET), using minimum drain pin copper area in a 2 oz copper

single sided PCB and steady state operation only (no design margins for abnormal operation modes are

included). The output power figure is for selection purpose only. The actual power can vary depending on

particular designs. In a power supply system, appropriate thermal design margins must be applied to make

sure that the maximum ratings given in section 4.1 are respected at all times.

Figure 27

Output power curve of ICE5QR4780BG, V_IN=85~300 V_AC; P_Out=f(T_a)

Figure 28

Output power curve of ICE5QR4780BG, V_IN=220 V_AC; P_Out=f(T_a)

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Output Power Curve

Figure 29

Output power curve of ICE5QR2280BG, V_IN=85~300 V_AC; P_Out=f(T_a)

Figure 30

Output power curve of ICE5QR2280BG, V_IN=220 V_AC; P_Out=f(T_a)

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Output Power Curve

Figure 31

Output power curve of ICE5QR1680BG, V_IN=85~300 V_AC; P_Out=f(T_a)

Figure 32

Output power curve of ICE5QR1680BG, V_IN=220 V_AC; P_Out=f(T_a)

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Output Power Curve

Figure 33

Output power curve of ICE5QR0680BG, V_IN=85~300 V_AC; P_Out=f(T_a)

Figure 34

Output power curve of ICE5QR0680BG, V_IN=220 V_AC; P_Out=f(T_a)

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Outline Dimension

7

Outline Dimension

Figure 35

PG-DSO-12

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Marking

8

Marking

Figure 36

Marking of DSO-12

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Revision history

Document

version

Date of release

Description of changes

V 2.0

V 2.1

30 Aug 2019

21 Jan 2020

First release



Change the name of datasheet from ICE5QR0680BG to

ICE5QRxx80BG to include 3 new variants (ICE5QR4780BG,

ICE5QR2280BG and ICE5QR1680BG)



Update of CS pin function and description (refer to errata sheet

ES_2001_PL83_2002_024629)

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Trademarks

All referenced product or service names and trademarks are the property of their respective owners.

IMPORTANT NOTICE

The information given in this document shall in no For further information on the product, technology,

Edition 2020-01-21

event be regarded as a guarantee of conditions or delivery terms and conditions and prices please

Published by

characteristics (“Beschaffenheitsgarantie”) .

contact your nearest Infineon Technologies office

(www.infineon.com).

Infineon Technologies AG

81726 München, Germany

With respect to any examples, hints or any typical

values stated herein and/or any information

regarding the application of the product, Infineon

Technologies hereby disclaims any and all

warranties and liabilities of any kind, including

without limitation warranties of non-infringement of

intellectual property rights of any third party.

WARNINGS

Due to technical requirements products may contain

dangerous substances. For information on the types

in question please contact your nearest Infineon

Technologies office.

Do you have a question about this

document?

In addition, any information given in this document

is subject to customer’s compliance with its

obligations stated in this document and any

applicable legal requirements, norms and standards

concerning customer’s products and any use of the

product of Infineon Technologies in customer’s

applications.

Except as otherwise explicitly approved by Infineon

Technologies in

a written document signed by

authorized

representatives

of

Infineon

Email: erratum@infineon.com

Technologies, Infineon Technologies’ products may

not be used in any applications where a failure of the

product or any consequences of the use thereof can

reasonably be expected to result in personal injury.

Document reference

The data contained in this document is exclusively

intended for technically trained staff. It is the

responsibility of customer’s technical departments

to evaluate the suitability of the product for the

intended application and the completeness of the

product information given in this document with

respect to such application.


型号：	ICE5QR0680BG
厂家：	Infineon
描述：	Quasi-Resonant 800 V CoolSETâ¢ - in DSO-12 Package
文件：	总39页 (文件大小：2184K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

ICE5QR0680BG [INFINEON]

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