IKCM10L60GA_15 [INFINEON]
Control Integrated POwer System;型号: | IKCM10L60GA_15 |
厂家: | Infineon |
描述: | Control Integrated POwer System |
文件: | 总16页 (文件大小:1183K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
Control Integrated POwer
System (CIPOS™)
IKCM10L60GA
Datasheet
For Power Management Application
1
Ver. 1.1, 2014-06-01
CIPOS™ IKCM10L60GA
Table of Contents
CIPOS™ Control Integrated POwer System ........................................................................................................3
Features..............................................................................................................................................................3
Target Applications...........................................................................................................................................3
Description.........................................................................................................................................................3
System Configuration .......................................................................................................................................3
Pin Configuration....................................................................................................................................................4
Internal Electrical Schematic.................................................................................................................................4
Pin Assignment.......................................................................................................................................................5
Pin Description ..................................................................................................................................................5
HIN(U,V,W) and LIN(U,V,W) (Low side and high side control pins, Pin 7 - 12)................................................5
VFO (Fault-output and NTC, Pin 14).................................................................................................................6
ITRIP (Over current detection function, Pin 15) ................................................................................................6
VDD, VSS (Low side control supply and reference, Pin 13, 16) .......................................................................6
VB(U,V,W) and VS(U,V,W) (High side supplies, Pin 1 - 6)...............................................................................6
NW, NV, NU (Low side emitter, Pin 17 - 19) .....................................................................................................6
W, V, U (High side emitter and low side collector, Pin 20 - 22).........................................................................6
P (Positive bus input voltage, Pin 23)................................................................................................................6
Absolute Maximum Ratings...................................................................................................................................7
Module Section ..................................................................................................................................................7
Inverter Section..................................................................................................................................................7
Control Section..................................................................................................................................................7
Recommended Operation Conditions..................................................................................................................8
Static Parameters ...................................................................................................................................................9
Dynamic Parameters ............................................................................................................................................10
Bootstrap Parameters ..........................................................................................................................................10
Thermistor .............................................................................................................................................................11
Mechanical Characteristics and Ratings............................................................................................................11
Circuit of a Typical Application...........................................................................................................................12
Switching Times Definition..................................................................................................................................12
Electrical characteristic .......................................................................................................................................13
Package Outline....................................................................................................................................................14
Datasheet
2
Ver. 1.1, 2014-06-01
CIPOS™ IKCM10L60GA
CIPOS™
Control Integrated POwer System
Dual In-Line Intelligent Power Module
3Φ-bridge 600V / 10A
Features
Description
The CIPOS™ module family offers the chance for
integrating various power and control components
to increase reliability, optimize PCB size and system
costs.
Fully isolated Dual In-Line molded module
• TrenchStop® IGBTs
• Rugged SOI gate driver technology with stability
against transient and negative voltage
• Allowable negative VS potential up to -11V for
signal transmission at VBS=15V
It is designed to control three phase AC motors and
permanent magnet motors in variable speed drives
for applications like an air conditioning,
a
refrigerator and a washing machine. The package
concept is specially adapted to power applications,
which need good thermal conduction and electrical
isolation, but also EMI-save control and overload
protection.
TrenchStop® IGBTs and anti parallel diodes are
combined with an optimized SOI gate driver for
excellent electrical performance.
• Integrated bootstrap functionality
• Over current shutdown
• Temperature monitor
• Under-voltage lockout at all channels
• Low side emitter pins accessible for all phase
current monitoring (open emitter)
• Cross-conduction prevention
• All of 6 switches turn off during protection
• Lead-free terminal plating; RoHS compliant
System Configuration
• 3 half bridges with TrenchStop® IGBTs and anti
parallel diodes
Target Applications
• Dish washers
•
3Φ SOI gate driver
• Thermistor
• Refrigerators
• Pin-to-heasink creepage distance typ. 1.6mm
• Washing machines
• Air-conditioners
• Fans
• Low power motor drives
Datasheet
3
Ver. 1.1, 2014-06-01
CIPOS™ IKCM10L60GA
Pin Configuration
Bottom View
Figure 1: Pin configuration
Internal Electrical Schematic
Figure 2: Internal schematic
Datasheet
4
Ver. 1.1, 2014-06-01
CIPOS™ IKCM10L60GA
Pin Assignment
Pin Number
Pin Name
VS(U)
VB(U)
VS(V)
VB(V)
VS(W)
VB(W)
HIN(U)
HIN(V)
HIN(W)
LIN(U)
LIN(V)
LIN(W)
VDD
VFO
Pin Description
U-phase high side floating IC supply offset voltage
U-phase high side floating IC supply voltage
V-phase high side floating IC supply offset voltage
V-phase high side floating IC supply voltage
W-phase high side floating IC supply offset voltage
W-phase high side floating IC supply voltage
U-phase high side gate driver input
V-phase high side gate driver input
W-phase high side gate driver input
U-phase low side gate driver input
V-phase low side gate driver input
W-phase low side gate driver input
Low side control supply
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
Fault output / Temperature monitor
Over current shutdown input
ITRIP
VSS
Low side control negative supply
W-phase low side emitter
NW
NV
V-phase low side emitter
NU
U-phase low side emitter
W
Motor W-phase output
V
Motor V-phase output
U
Motor U-phase output
P
Positive bus input voltage
NC
No Connection
Pin Description
Schmitt-Trigger
HIN(U,V,W) and LIN(U,V,W) (Low side and high
INPUT NOISE
FILTER
HINx
LINx
UZ=10.5V
≈ 5kΩ
side control pins, Pin 7 - 12)
SΩITCH LEVEL
VIH; VIL
These pins are positive logic and they are
responsible for the control of the integrated IGBT.
The Schmitt-trigger input thresholds of them are
such to guarantee LSTTL and CMOS compatibility
down to 3.3V controller outputs. Pull-down resistor
of about 5kΩ is internally provided to pre-bias inputs
during supply start-up and a zener clamp is
provided for pin protection purposes. Input Schmitt-
trigger and noise filter provide beneficial noise
rejection to short input pulses.
Figure 3: Input pin structure
a)
b)
HIN
tFILIN
tFILIN
HIN
LIN
LIN
high
HO
LO
HO
LO
low
The noise filter suppresses control pulses which are
below the filter time tFILIN. The filter acts according to
Figure 4.
Figure 4: Input filter timing diagram
Datasheet
5
Ver. 1.1, 2014-06-01
CIPOS™ IKCM10L60GA
It is recommended for proper work of CIPOS™ not
to provide input pulse-width lower than 1us.
The IC shuts down all the gate drivers’ power
outputs, when the VDD supply voltage is below
VDDUV- = 10.4V. This prevents the external power
switches from critically low gate voltage levels
during on-state and therefore from excessive power
dissipation.
The integrated gate drive provides additionally a
shoot through prevention capability which avoids
the simultaneous on-state of two gate drivers of the
same leg (i.e. HO1 and LO1, HO2 and LO2, HO3
and LO3). When two inputs of a same leg are
activated, only former activated one is activated so
that the leg is kept steadily in a safe state.
VB(U,V,W) and VS(U,V,W) (High side supplies,
Pin 1 - 6)
VB to VS is the high side supply voltage. The high
side circuit can float with respect to VSS following
the external high side power device emitter voltage.
A minimum deadtime insertion of typically 380ns is
also provided by driver IC, in order to reduce cross-
conduction of the external power switches.
Due to the low power consumption, the floating
driver stage is supplied by integrated bootstrap
circuit.
VFO (Fault-output and NTC, Pin 14)
The VFO pin indicates a module failure in case of
under voltage at pin VDD or in case of triggered
over current detection at ITRIP. A pull-up resistor is
externally required to bias the NTC.
The under-voltage detection operates with a rising
supply threshold of typical VBSUV+ = 12.1V and a
falling threshold of VBSUV- = 10.4V.
VS(U,V,W) provide a high robustness against
negative voltage in respect of VSS of -50V
transiently. This ensures very stable designs even
under rough conditions.
VDD
RON,FLT
>1
VFO
VSS
from ITRIP -Latch
NW, NV, NU (Low side emitter, Pin 17 - 19)
The low side emitters are available for current
measurements of each phase leg. It is
recommended to keep the connection to pin VSS as
short as possible in order to avoid unnecessary
inductive voltage drops.
from uv-detection
CIPOS™
Thermistor
Figure 5: Internal circuit at pin VFO
The same pin provides direct access to the NTC,
which is referenced to VSS. An external pull-up
resistor connected to +5V ensures, that the resulting
voltage can be directly connected to the
microcontroller.
W, V, U (High side emitter and low side collector,
Pin 20 - 22)
These pins are motor U, V, W input pins
P (Positive bus input voltage, Pin 23)
The high side IGBT are connected to the bus
voltage. It is noted that the bus voltage does not
exceed 450 V.
ITRIP (Over current detection function, Pin 15)
CIPOS™ provides an over current detection
function by connecting the ITRIP input with the
motor current feedback. The ITRIP comparator
threshold (typ. 0.47V) is referenced to VSS ground.
An input noise filter (typ: tITRIPMIN = 530ns) prevents
the driver to detect false over-current events.
Over current detection generates a shut down of all
outputs of the gate driver after the shutdown
propagation delay of typically 1000ns.
The fault-clear time is set to typical 65us.
VDD, VSS (Low side control supply and
reference, Pin 13, 16)
VDD is the low side supply and it provides power
both to input logic and to low side output power
stage. Input logic is referenced to VSS ground.
The under-voltage circuit enables the device to
operate at power on when a supply voltage of at
least a typical voltage of VDDUV+ = 12.1V is present.
Datasheet
6
Ver. 1.1, 2014-06-01
CIPOS™ IKCM10L60GA
Absolute Maximum Ratings
(VDD = 15V and TJ = 25°C, if not stated otherwise)
Module Section
Value
Description
Condition
Symbol
Unit
min
-40
max
125
-
Storage temperature range
Insulation test voltage
°C
V
Tstg
VISOL
TC
RMS, f = 60Hz, t =1min
Refer to Figure 6
2000
-40
Operating case temperature range
100
°C
Inverter Section
Description
Value
Condition
Symbol
Unit
min
max
-
Max. blocking voltage
IC = 250µA
VCES
VPN
600
V
V
V
DC link supply voltage of P-N
DC link supply voltage (surge) of P-N
Applied between P-N
Applied between P-N
-
-
450
500
VPN(surge)
TC = 25°C, TJ < 150°C
TC = 100°C, TJ < 150°C
-10
-6
10
6
Output current
IC
A
Maximum peak output current
Short circuit withstand time1
less than 1ms
IC
tSC
Ptot
TJ
-20
-
20
5
A
µs
W
°C
VDC ≤ 400V, TJ = 150°C
Power dissipation per IGBT
-
25.2
150
Operating junction temperature range
-40
Single IGBT thermal resistance,
junction-case
4.96
6.88
K/W
K/W
RthJC
-
-
Single diode thermal resistance,
junction-case
RthJCD
Control Section
Value
Description
Condition
Symbol
Unit
min
max
Module supply voltage
VDD
VBS
-1
20
V
V
High side floating supply voltage
(VB vs. VS)
-1
20
VIN
VITRIP
-1
-1
Input voltage
LIN, HIN, ITRIP
10
20
V
Switching frequency
fPWM
-
kHz
1 Allowed number of short circuits: <1000; time between short circuits: >1s.
Datasheet
7
Ver. 1.1, 2014-06-01
CIPOS™ IKCM10L60GA
Recommended Operation Conditions
All voltages are absolute voltages referenced to VSS -potential unless otherwise specified.
Value
Description
DC link supply voltage of P-N
Symbol
Unit
min
0
typ
-
max
400
VPN
VBS
VDD
V
V
V
High side floating supply voltage (VB vs. VS)
Low side supply voltage
13.5
14.0
-
18.5
18.5
16
ΔVBS,
ΔVDD
-1
-1
1
1
Control supply variation
-
V/µs
VIN
VITRIP
0
0
5
5
Logic input voltages LIN,HIN,ITRIP
Between VSS - N (including surge)
-
-
V
V
VSS
-5
5
Figure 6: TC measurement point1
1Any measurement except for the specified point in figure 6 is not relevant for the temperature verification and
brings wrong or different information.
Datasheet
8
Ver. 1.1, 2014-06-01
CIPOS™ IKCM10L60GA
Static Parameters
(VDD = 15V and TJ = 25°C, if not stated otherwise)
Value
typ
Description
Condition
Symbol
Unit
min
max
Iout = 6A
-
-
1.55
1.85
2.05
-
Collector-Emitter saturation voltage
VCE(sat)
V
TJ = 25°C
150°C
Iout = -6A
-
-
1.75
1.78
2.5
-
Emitter-Collector forward voltage
VF
V
TJ = 25°C
150°C
Collector-Emitter leakage current
Logic "1" input voltage (LIN,HIN)
Logic "0" input voltage (LIN,HIN)
ITRIP positive going threshold
ITRIP input hysteresis
VCE = 600V
ICES
VIH
-
-
1
2.5
-
mA
V
-
2.1
0.9
470
70
VIL
0.7
400
40
V
VIT,TH+
VIT,HYS
540
-
mV
mV
VDD and VBS supply under voltage
positive going threshold
VDDUV+
VBSUV+
10.8
9.5
1.0
9.0
-
12.1
10.4
1.7
13.0
11.2
-
V
V
VDD and VBS supply under voltage
negative going threshold
VDDUV-
VBSUV-
VDD and VBS supply under voltage
lockout hysteresis
VDDUVH
VBSUVH
V
Input clamp voltage
(HIN, LIN, ITRIP)
Iin=4mA
VINCLAMP
10.1
300
370
12.5
500
900
V
Quiescent VBx supply current
(VBx only)
HIN = 0V
IQBS
µA
µA
Quiescent VDD supply current (VDD
only)
LIN = 0V, HINX=5V
IQDD
IIN+
-
Input bias current
VIN = 5V
-
-
-
-
-
1
2
1.5
mA
µA
µA
µA
V
Input bias current
VIN = 0V
-
150
-
IIN-
IITRIP+
IFO
ITRIP input bias current
VFO input bias current
VFO output voltage
VITRIP = 5V
65
60
0.5
VFO = 5V, VITRIP = 0V
IFO = 10mA, VITRIP = 1V
VFO
1
Datasheet
9
Ver. 1.1, 2014-06-01
CIPOS™ IKCM10L60GA
Dynamic Parameters
(VDD = 15V and TJ = 25°C, if not stated otherwise)
Value
typ
655
25
Description
Condition
Symbol
Unit
min
max
Turn-on propagation delay time
Turn-on rise time
ton
tr
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
V
LIN,HIN = 5V; Iout = 6A,
VDC = 300V
Turn-on switching time
Reverse recovery time
Turn-off propagation delay time
Turn-off fall time
tc(on)
trr
165
180
850
75
toff
VLIN,HIN = 0V; Iout = 6A
VDC = 300V
tf
Turn-off switching time
Short circuit propagation delay time
Input filter time ITRIP
tc(off)
tSCP
tITRIPmin
120
1300
530
From VIT,TH+ to 10% ISC
VITRIP = 1V
Input filter time at LIN, HIN for turn
on and off
VLIN,HIN = 0V & 5V
VITRIP = 1V
tFILIN
tFLTCLR
DTPWM
DTIC
-
40
1.0
-
290
65
-
-
ns
µs
µs
ns
Fault clear time after ITRIP-fault
200
Deadtime between low side and high
side
-
-
Deadtime of gate drive circuit
380
V
DC = 300V, IC = 6A,
IGBT turn-on energy (includes
reverse recovery of diode)
-
-
290
350
-
-
TJ = 25°C
150°C
Eon
Eoff
Erec
µJ
µJ
µJ
VDC = 300V, IC = 6A,
-
-
165
210
-
-
IGBT turn-off energy
TJ = 25°C
150°C
VDC = 300V, IC = 6A,
-
-
30
55
-
-
Diode recovery energy
TJ = 25°C
150°C
Bootstrap Parameters
(TJ = 25°C, if not stated otherwise)
Value
Description
Condition
Symbol
VRRM
Unit
min
typ
max
Repetitive peak reverse
voltage
600
V
VS2 or VS3 = 300V, TJ = 25°C
VS2 and VS3 = 0V, TJ = 25°C
VS2 or VS3 = 300V, TJ = 125°C
VS2 and VS3 = 0V, TJ = 125°C
22
-
-
35
40
50
65
-
-
-
Bootstrap resistance of
U-phase1
RBS1
Ω
-
80
Reverse recovery time
Forward voltage drop
IF = 0.6A, di/dt=80A/µs
trr_BS
50
ns
V
VF_BS
IF = 20mA, VS2 and VS3 = 0V
2.6
3.25
1 RBS2 and RBS3 have same values to RBS1
.
Datasheet
10
Ver. 1.1, 2014-06-01
CIPOS™ IKCM10L60GA
Thermistor
Value
typ
Description
Condition
Symbol
Unit
min
max
Resistor
TNTC = 25°C
RNTC
-
85
-
kΩ
B-constant of NTC
(Negative temperature coefficient)
B(25/100)
-
4092
-
K
Figure 7: Thermistor resistance – temperature curve and table
(For more information, please refer to the application note ‘AN CIPOS-mini 1 Technical description’)
Mechanical Characteristics and Ratings
Value
Unit
Description
Mounting torque
Condition
min
0.59
-50
-
typ
0.69
-
max
M3 screw and washer
Refer to Figure 8
0.78
100
-
Nm
µm
g
Flatness
Weight
6.15
Figure 8: Flatness measurement position
Datasheet
11
Ver. 1.1, 2014-06-01
CIPOS™ IKCM10L60GA
Circuit of a Typical Application
NC (24)
P (23)
(1) VS(U)
(2) VB(U)
VB1
VB2
HO1
VS1
U(22)
V (21)
W (20)
RBS1
(3) VS(V)
(4) VB(V)
HO2
VS2
3-ph AC
Motor
RBS2
(5) VS(W)
(6) VB(W)
HO3
VS3
VB3
RBS3
(7) HIN(U)
(8) HIN(V)
LO1
LO2
LO3
HIN1
HIN2
NU (19)
NV (18)
NW (17)
(9) HIN(W)
(10) LIN(U)
HIN3
LIN1
Micro
Controller
(11) LIN(V)
LIN2
LIN3
VDD
VFO
ITRIP
(12) LIN(W)
(13) VDD
VDD line
(14) VFO
5 or 3.3V line
(15) ITRIP
(16) VSS
VSS
Thermistor
U-phase current sensing
V-phase current sensing
W-phase current sensing
Signal
for short-circuit protection
Figure 9: Application circuit
Switching Times Definition
HINx
LINx
0.9V
2.1V
trr
toff
ton
10%
10%
iCx
90%
90%
tf
tr
10%
10%
10%
vCEx
tc(on)
tc(off)
Figure 10: Switching times definition
Datasheet
12
Ver. 1.1, 2014-06-01
CIPOS™ IKCM10L60GA
Electrical characteristic
20
20
18
16
14
12
10
8
20
18
16
14
12
10
8
V
DD=15V
TJ=25℃
18
16
14
12
10
8
V
V
V
DD=13V
DD=15V
DD=20V
6
4
2
0
6
6
TJ=25℃
TJ=25℃
TJ=150℃
TJ=150℃
4
4
2
2
0
0.0
0
0.0
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
1.0 1.5 2.0 2.5
3.5 4.0 4.5
0.5
1.0
2.0
2.5
3.5
VCE(sat), Collector - Emitter voltage [V]
VC0.E5(sat), Collector - Emitt3e.r0 voltage [V]
V , Emitter -1C.5ollector voltage [3V.0]
F
Typ. Collector – Emitter saturation
voltage
Typ. Collector – Emitter saturation
voltage
Typ. Emitter – Collector forward
voltage
200
180
160
140
120
100
80
1.8
0.6
V
DC=300V
VDC=300V
VDD=15V
High side @TJ=25℃
VDD=15V
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
High side @TJ=150℃d
0.5
High side @TJ=25℃dd
Low side @TJ=25℃dd
High side @TJ=150℃d
Low side @TJ=25℃dd
Low side @TJ=150℃d
Low side @TJ=150℃d
High side @TJ=25℃
High side @TJ=150℃d
Low side @TJ=25℃dd
Low side @TJ=150℃d
0.4
0.3
0.2
0.1
60
40
20
VDC=300V
VDD=15V
0
0.0
0
2
4
6
Ic, Collector current [A]
8
10 12 14 16 18 20
0
2
4
6
8
Ic, Collector current [A]
10 12 14 16 18 20
0
2
4
6
8
Ic, Collector current [A]
10 12 14 16 18 20
Typ. Turn on switching energy loss
Typ. Turn off switching energy loss
Typ. Reverse recovery energy loss
500
1500
1000
V
DC=300V
V
DC=300V
V
DC=300V
450
400
350
300
250
200
150
100
50
VDD=15V
VDD=15V
VDD=15V
1400
1300
1200
1100
1000
900
900
800
700
600
500
High side @TJ=25℃
High side @TJ=150℃
Low side @TJ=25℃
Low side @TJ=150℃
High side @TJ=25℃dd
High side @TJ=150℃d
Low side @TJ=25℃dd
Low side @TJ=150℃d
High side @TJ=25℃dd
High side @TJ=150℃d
Low side @TJ=25℃dd
Low side @TJ=150℃d
800
0
700
0
2
4
6
8
Ic, Collector current [A]
10 12 14 16 18 20
0
2
4
6
Ic, Collector current [A]
8
10 12 14 16 18 20
0
2
4
6
8
Ic, Collector current [A]
10 12 14 16 18 20
Typ. Turn on propagation delay time
Typ. Turn on switching time
Typ. Turn off propagation delay time
10
500
400
350
300
250
200
150
100
50
V
DC=300V
V
DC=300V
450
400
350
300
250
200
150
100
50
VDD=15V
VDD=15V
1
High side @TJ=25℃dd
High side @TJ=150℃d
Low side @TJ=25℃ddd
Low side @TJ=150℃d
High side @TJ=25℃
High side @TJ=150℃
Low side @TJ=25℃
Low side @TJ=150℃
D : duty ratio
0.1
D=50%
D=20%
D=10%
0.01
D=5%
D=2%
Single pulse
1E-3
0
0
1E-4
0
2
4
6
8
Ic, Collector current [A]
10 12 14 16 18 20
0
2
4
6
8
Ic, Collector current [A]
10 12 14 16 18 20
1E-7 1E-6 1E-5 1E-4 1E-3 0.01 0.1
t , Pulse width [sec.]
1
10 100
P
Typ. Turn off switching time
Typ. Reverse recovery time
IGBT transient thermal resistance at
all six IGBTs operation
Datasheet
13
Ver. 1.1, 2014-06-01
CIPOS™ IKCM10L60GA
Package Outline
Datasheet
14
Ver. 1.1, 2014-06-01
CIPOS™ IKCM10L60GA
Revision History
Previous Version:
Datasheet Ver. 1.0
Major changes since the last revision
Page or Reference
Description of change
Figure 6 updated
8
14
Package Outline updated
Datasheet
15
Ver. 1.1, 2014-06-01
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Systems, Inc. VLYNQ™ of Texas Instruments Incorporated. VXWORKS™, WIND RIVER™ of WIND RIVER SYSTEMS, INC. ZETEX™ of Diodes Zetex.
Last Trademarks Update 2014-07-17
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Edition 2014-06-01
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