IM111-X6Q1B [INFINEON]

CIPOS™ Nano 600 V, 2 A full-bridge Intelligent Power Module;
IM111-X6Q1B
型号: IM111-X6Q1B
厂家: Infineon    Infineon
描述:

CIPOS™ Nano 600 V, 2 A full-bridge Intelligent Power Module

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IM111-X6Q1B  
CIPOS™ Nano  
IM111-X6Q1B  
Description  
IM111-X6Q1B is an H-bridge integrated power module (IPM) designed for advanced appliance motor drive  
applications. This advanced low profile IPM offers a combination of Infineon’s low RDS(ON) CoolMOS ™ technology  
and the industry benchmark high voltage, rugged driver in a small 12x10mm QFN package.  
Features  
Integrated gate drivers and bootstrap  
functionality  
Overcurrent protection & fault reporting  
Low 0.28Ω RDS(on), 600V CoolMOS™  
Under-voltage lockout for both channels  
Shoot through protection  
Matched propagation delay for all channels  
Optimized dv/dt for loss and EMI trade offs  
Advanced input filter  
3.3V input logic compatible  
Motor power range 80-200W  
1500VRMS min isolation  
Potential Applications  
Linear refrigerator compressors  
High efficiency single-phase motor drives  
DC-AC inverters  
Product Validation  
Qualified for industrial applications according to the relevant tests of JEDEC47/20/22.  
Table 1  
Part Ordering Table  
Standard Pack  
Base Part Number Package Type  
Orderable Part Number  
Form  
Quantity  
IM111-X6Q1B  
QFN 12x10mm  
Tape and Reel  
2000  
IM111-X6Q1BAUMA1  
Please read the Important Notice and Warnings at the end of this document  
Final Datasheet  
www.infineon.com  
Revision 1.0  
2019-12-12  
 
 
 
 
CIPOS™ Nano  
IM111-X6Q1B  
Table of contents  
Description……………………………………………………………………………………………………………..1  
Features………………………………………………………………………………………………………………...1  
Potential Applications..................................................................................................................... 1  
Product Validation.......................................................................................................................... 1  
Table of contents............................................................................................................................ 2  
1
Internal Electrical Schematic .......................................................................................... 3  
2
2.1  
2.2  
Pin Configuration........................................................................................................... 4  
Pin Assignment........................................................................................................................................4  
Pin Descriptions.......................................................................................................................................5  
3
Absolute Maximum Rating .............................................................................................. 6  
Module .....................................................................................................................................................6  
Inverter ....................................................................................................................................................6  
Control .....................................................................................................................................................6  
3.1  
3.2  
3.3  
4
5
Thermal Characteristics ................................................................................................. 7  
Recommended Operating Conditions............................................................................... 8  
6
6.1  
6.2  
Static Parameters .......................................................................................................... 9  
Inverter ....................................................................................................................................................9  
Control .....................................................................................................................................................9  
7
7.1  
7.2  
Dynamic Parameters.....................................................................................................10  
Inverter ..................................................................................................................................................10  
Control ...................................................................................................................................................10  
8
9
Thermistor Characteristics ............................................................................................11  
Qualification Information ..............................................................................................12  
10  
10.1  
10.2  
Diagrams & Tables ........................................................................................................13  
Input-Output Logic Table......................................................................................................................13  
Switching Time Definitions ...................................................................................................................13  
11  
Application Guide .........................................................................................................14  
Typical Application Schematic .............................................................................................................14  
Performance Charts ..............................................................................................................................14  
Vs Immunity.........................................................................................................................................15  
11.1  
11.2  
11.3  
12  
Package Outline ...........................................................................................................16  
Revision History ............................................................................................................................18  
Revision 1.0  
2019-12-12  
2
Final Datasheet  
 
CIPOS™ Nano  
IM111-X6Q1B  
1
Internal Electrical Schematic  
6~8, 32~35 V+  
Integrated in HVIC  
9
VB1  
10 VDD1  
11 HIN1  
12 LIN1  
Half-Bridge  
HVIC  
19~25 VS1  
17~18 VR1  
13 ITRIP1  
14 RFE1  
15, 39 COM1  
16 NTC  
36 VB2  
37 VDD2  
1 HIN2  
Half-Bridge  
HVIC  
26~28, 31 VS2  
29~30 VR2  
2 LIN2  
3 ITRIP2  
4 RFE2  
5, 38 COM2  
Figure 1  
Internal electrical schematic.  
3
Final Datasheet  
Revision 1.0  
2019-12-12  
CIPOS™ Nano  
IM111-X6Q1B  
2
Pin Configuration  
2.1  
Pin Assignment  
20 21 22  
19  
12 13 14 15 16 17 18  
23  
11  
39  
10  
24  
25  
9
26  
27  
8
7
6
28  
5
38  
4
29  
30  
3
2
1
31  
35  
34  
33  
32  
37  
36  
Figure 2  
Table 2  
Module pinout  
Pin Assignment  
Pin  
1
2
3
4
5
6-8  
9
10  
11  
Name  
HIN2  
LIN2  
ITRIP2  
RFE2  
COM2  
V+  
Description  
Logic Input for High Side Gate Driver (Active High)  
Logic Input for Low Side Gate Driver (Active High)  
Over Current Protection  
Fault Clear, Fault Reporting & Enable  
Logic Ground  
DC Bus Voltage Positive  
High Side Floating Supply (Bootstrap Cap Connection +)  
Low Side Control Supply  
Logic Input for High Side Gate Driver (Active High)  
Logic Input for Low Side Gate Driver (Active High)  
Over Current Protection  
Fault Clear, Fault Reporting & Enable  
Logic Ground  
Negative Temperature Coeffient Thermistor  
Low Side Source  
Phase Output  
VB1  
VDD1  
HIN1  
LIN1  
ITRIP1  
RFE1  
COM1  
NTC  
VR1  
VS1  
VS2  
VR2  
VS2  
V+  
VB2  
VDD2  
COM2  
COM1  
12  
13  
14  
15  
16  
17-18  
19-25  
26-28  
29-30  
31  
32-35  
36  
37  
Phase Output  
Low Side Source  
Phase Output (Bootstrap Cap Connection -)  
DC Bus Voltage Positive  
High Side Floating Supply (Bootstrap Cap Connection +)  
Low Side Control Supply  
38  
39  
Logic Ground  
Logic Ground  
4
Final Datasheet  
Revision 1.0  
2019-12-12  
CIPOS™ Nano  
IM111-X6Q1B  
2.2  
Pin Descriptions  
LIN and HIN (Low side and high side control pins)  
= 7.7V. This prevents the external power switches  
from critically low gate voltage levels during on-  
state and therefore from excessive power  
dissipation.  
These pins are positive logic and they are  
responsible for the control of the integrated  
CoolMOS. The Schmitt-trigger input thresholds of  
them are such to guarantee LSTTL and CMOS  
compatibility down to 3.3V controller outputs. Pull-  
down resistor of about 800kis internally provided  
to pre-bias inputs during supply start-up and an ESD  
diode is provided for pin protection purposes. Input  
Schmitt-trigger and noise filter provide beneficial  
noise rejection to short input pulses.  
VB and VS (High side supplies)  
VB to VS is the high side supply voltage. The high side  
circuit can float with respect to COM following the  
external high side power device source voltage.  
Due to the low power consumption, the floating  
driver stage is supplied by integrated bootstrap  
circuit.  
The noise filter suppresses control pulses which are  
below the filter time tFILIN. The filter acts according to  
Figure 4.  
The under-voltage detection operates with a rising  
supply threshold of typical VBSUV+ = 8.9V and a falling  
threshold of VBSUV- = 7.7V.  
CIPOSTM  
VS provide a high robustness against negative  
voltage in respect of COM. This ensures very stable  
designs even under rough conditions.  
Schmitt-Trigger  
HINx  
LINx  
INPUT NOISE  
FILTER  
0.8M  
SWITCH LEVEL  
COM  
VIH; VIL  
VR (Low side source)  
Figure 3  
Input pin structure  
The low side source is available for current  
measurements of each phase leg. It is  
recommended to keep the connection to pin COM as  
short as possible in order to avoid unnecessary  
inductive voltage drops.  
a)  
b)  
HIN  
tFILIN  
tFILIN  
HIN  
LIN  
LIN  
high  
HO  
LO  
HO  
LO  
low  
VS (High side source and low side drain)  
Figure 4  
Input filter timing diagram  
This pin is motor input pin.  
The integrated gate drive provides additionally a  
shoot through prevention capability which avoids  
the simultaneous on-state of the high-side and low-  
side switch of the same inverter phase. A minimum  
deadtime insertion of typically 300ns is also  
provided by driver IC, in order to reduce cross-  
conduction of the external power switches.  
V+ (Positive bus input voltage)  
The high side CoolMOS devices are connected to the  
bus voltage. It is noted that the bus voltage does not  
exceed 450V.  
ITRIP (Over current protection)  
Analog input for over-current shutdown. When  
active, ITRIP shuts down outputs and activates RFE  
low.  
VDD, COM (Low side control supply and reference)  
VDD is the control supply and it provides power both  
to input logic and to output power stage. Input logic  
is referenced to COM ground.  
RFE (Fault clear, fault reporting and enable)  
Integrated fault reporting function, fault clear timer  
and external enable pin. This pin has negative logic  
and an open-drain output.  
The under-voltage circuit enables the device to  
operate at power on when a supply voltage of at  
least a typical voltage of VDDUV+ = 8.9V is present.  
The IC shuts down all the gate drivers power  
outputs, when the VDD supply voltage is below VDDUV-  
5
Final Datasheet  
Revision 1.0  
2019-12-12  
CIPOS™ Nano  
IM111-X6Q1B  
3
Absolute Maximum Ratings  
3.1  
Module  
Table 3  
Parameter  
Symbol  
TSTG  
TC  
Condition  
Units  
°C  
Storage temperature  
-40 ~ 150  
-40 ~ 125  
-40 ~ 150  
1500  
Operating case temperature  
Operating junction temperature  
Isolation voltage1  
°C  
TJ  
°C  
VISO  
1min, RMS, f = 60Hz  
V
1. Characterized, not tested at production  
3.2  
Inverter  
Table 4  
Parameter  
Symbol Condition  
Units  
Max. blocking voltage  
VDSS/VRRM  
600  
12  
V
1
Output current based on RTH(J-C)B  
Peak output current  
IO  
TC = 25°C, DC  
A
A
A
W
IOP  
IOA  
P
TC = 25°C, pulsed current  
TA = 25°C, DC  
20  
Output current based on RTH(J-A)  
2
Peak power dissipation per MOSFET  
TC = 25°C  
175  
1. Limited by wire bonding current capability inside the package  
3.3  
Control  
Table 5  
Parameter  
Symbol  
VDD  
Condition  
Units  
Low side control supply voltage  
Input voltage LIN, HIN  
-0.3 ~ 20  
-0.3 ~ VDD  
-0.3 ~ 20  
V
V
V
VIN  
High side floating supply voltage  
(VB reference to VS)  
VBS  
6
Final Datasheet  
Revision 1.0  
2019-12-12  
CIPOS™ Nano  
IM111-X6Q1B  
4
Thermal Characteristics  
Table 6  
Parameter  
Symbol Conditions  
Min.  
Typ.  
Max.  
Units  
Single MOSFET thermal  
resistance, junction-case  
(bottom)  
RTH(J-C)B  
Measures either high  
side or low side  
device  
-
0.6  
-
°C/W  
Thermal resistance,  
RTH(J-A)  
-
12  
-
°C/W  
junction-ambient(1)  
(1) The junction to ambient thermal resistance is simulated based on standard JESD51-5/7 using a FR4  
2s2p board with device mounted and power evenly distributed to four power MOSFETs.  
7
Final Datasheet  
Revision 1.0  
2019-12-12  
CIPOS™ Nano  
IM111-X6Q1B  
5
Recommended Operating Conditions  
Table 7  
Parameter  
Symbol  
V+  
Min.  
-
Typ.  
Max.  
Units  
V
Positive DC bus input voltage  
Low side control supply voltage  
High side floating supply voltage  
Input voltage  
-
-
-
-
6
-
-
-
450  
VDD  
13.5  
12.5  
0
16.5  
V
VBS  
17.5  
V
VIN  
5
-
V
PWM carrier frequency  
External dead time between HIN & LIN  
Voltage between COM and VR  
Minimum input pulse width  
FPWM  
DT  
-
kHz  
µs  
V
1
-
VCOMR  
-5  
5
-
PWIN(ON)  
,
0.5  
µs  
PWIN(OFF)  
8
Final Datasheet  
Revision 1.0  
2019-12-12  
CIPOS™ Nano  
IM111-X6Q1B  
6
Static Parameters  
6.1  
Inverter  
(VDD-COM) = (VB - VS) = 15 V. TC = 25°C unless otherwise specified.  
Table 8  
Parameter  
Symbol Conditions  
Min.  
Typ.  
0.28  
0.59  
20  
Max.  
Units  
Ω
Drain to Source ON Resistance RDS(on)  
ID = 0.5A  
-
-
-
-
0.31  
Ω
ID= 0.5A, TJ = 150  
VIN = 0V, V+ = 600V  
-
-
-
Drain source leakage current  
Diode forward voltage  
IDSS  
µA  
µA  
VIN = 0V, V+ = 600V, TJ  
= 150°C  
40  
VF  
IF = 0.5A  
-
-
0.69  
0.48  
-
-
V
V
IF = 0.5A, TJ = 150℃  
6.2  
Control  
(VDD-COM) = (VB - VS) = 15 V. TC = 25°C unless otherwise specified. The VIN and IIN are referenced to COM and are  
applicable to all six channels. The VDDUV is referenced to COM. The VBSUV is referenced to VS.  
Table 9  
Parameter  
Symbol  
VIN,TH+  
VIN,TH-  
VRFE+  
Min.  
2.2  
-
Typ.  
Max.  
-
Units  
Logic “1” input voltage (LIN, HIN)  
Logic “0” input voltage (LIN, HIN)  
RFE positive going threshold  
RFE negative going threshold  
-
V
V
V
V
V
-
0.8  
2.5  
-
-
-
VRFE-  
0.8  
8
-
VDD/VBS supply undervoltage, positive going  
threshold  
VDD,UV+  
,
8.9  
9.8  
VBS,UV+  
VDD/VBS supply undervoltage, negative going  
threshold  
VDD,UV-  
VBS,UV-  
,
6.9  
-
7.7  
1.2  
8.5  
-
V
V
VDD/VBS supply undervoltage lock-out  
hysteresis  
VDDUVH  
VBSUVH  
,
Quiescent VBS supply current  
Quiescent VDD supply current  
Input bias current VIN=4V for LIN,HIN  
Input bias current VIN=0V for LIN, HIN  
Input bias current VIN = 4V for RFE  
Input bias current VIN = 4V for ITRIP  
ITRIP positive going threshold  
ITRIP negative going threshold  
ITRIP input hysteresis  
IQBS  
-
45  
70  
3.0  
20  
2
µA  
mA  
µA  
µA  
µA  
µA  
V
IQCC  
1.0  
1.7  
5
IIN+  
-
IIN-  
-
-
IIN,RFE+  
ITRIP+  
VIT,TH+  
VIT,TH-  
VIT,HYS  
RBS  
-
0
1
-
5
20  
0.525  
-
0.475  
0.500  
0.43  
0.07  
200  
50  
-
-
-
-
V
-
V
Bootstrap resistance  
-
RFE low on resistance  
RRFE  
100  
9
Final Datasheet  
Revision 1.0  
2019-12-12  
CIPOS™ Nano  
IM111-X6Q1B  
7
Dynamic Parameters  
7.1  
Inverter  
(VDD-COM) = (VB - VS) = 15 V. TC = 25°C unless otherwise specified.  
Table 10  
Parameter  
Symbol Conditions  
Min.  
Typ.  
Max.  
Units  
µs  
Input to output turn-on  
propagation delay  
TON  
-
0.88  
-
ID = 0.5A, V+ = 300V  
TR  
ns  
ns  
µs  
Turn-on rise time  
-
-
-
37  
-
-
-
TC(on)  
TOFF  
Turn-on switching time  
167  
0.92  
Input to output turn-off  
propagation delay  
ID = 0.5A, V+ = 300V  
TF  
ns  
ns  
µs  
Turn-off fall time  
-
-
-
186  
192  
0.52  
-
-
-
TC(off)  
TEN  
Turn-off switching time  
RFE low to six switch turn-off  
propagation delay  
VIN = 0 or VIN = 5V, VEN  
5V  
=
ITRIP to six switch turn-off  
propagation delay  
TITRIP  
-
900  
-
ns  
µJ  
Turn-on switching energy  
Turn-off switching energy  
EON  
ID = 0.5A, V+ = 300V,  
VDD = 15V, L = 9mH  
-
-
-
-
-
-
-
-
54  
11  
7
-
-
-
-
-
-
-
-
EOFF  
Diode reverse recovery energy EREC  
ns  
Diode reverse recovery time  
Turn-on switching energy  
Turn-off switching energy  
TRR  
121  
126  
12  
10  
EON  
EOFF  
ID = 0.5A, V+ = 300V,  
VDD = 15V, L = 9mH, TJ  
= 150°C  
µJ  
Diode reverse recovery energy EREC  
Diode reverse recovery time TRR  
ns  
203  
7.2  
Control  
(VDD-COM) = (VB - VS) = 15V. TC = 25°C unless otherwise specified.  
Table 11  
Parameter  
Symbol Conditions  
Min.  
Typ.  
300  
500  
660  
Max.  
Units  
ns  
TFIL,IN  
TFIL,EN  
TFLT  
Input filter time (HIN, LIN, ITRIP  
Input filter time (RFE)  
)
VIN = 0 or VIN = 5V  
-
-
-
-
-
-
VRFE = 0 or VRFE = 5V  
ns  
ITRIP to Fault propagation  
delay  
VIN = 0 or VIN = 5V, VITRIP  
= 5V  
ns  
Internal injected dead time  
TDT,GD  
MT  
VIN = 0 or VIN = 5V  
-
-
300  
-
-
ns  
ns  
Matching propagation delay  
time (on and off) for same  
phase high-side and low-side  
External dead time >  
1µs  
50  
10  
Final Datasheet  
Revision 1.0  
2019-12-12  
CIPOS™ Nano  
IM111-X6Q1B  
8
Thermistor Characteristics  
Table 12  
Parameter  
Resistance  
Resistance  
Symbol  
R25  
Conditions  
Min.  
44.65  
1.27  
-
Typ.  
47  
Max.  
49.35  
1.51  
-
Units  
kΩ  
TC = 25°C, ±5% tolerance  
TC = 125°C  
R125  
B
1.39  
4006  
kΩ  
B-constant  
(25/100)  
±1% tolerance  
K
Temperature  
Range  
-20  
-
150  
°C  
+3.3V  
4.0  
3.5  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
REXT  
VTH  
R
Rmin  
[kΩ]  
Rtyp  
[kΩ]  
Rmax  
[kΩ]  
max  
TTH []  
typ  
50  
15.448  
10.483  
7.245  
5.092  
3.648  
2.653  
1.957  
1.462  
1.269  
16.432  
11.194  
7.765  
5.477  
3.937  
2.872  
2.125  
1.592  
1.384  
17.436  
11.924  
8.302  
5.876  
4.237  
3.101  
2.301  
1.729  
1.505  
min  
60  
70  
80  
90  
100  
110  
120  
125  
0.0  
0
10 20 30 40 50 60 70 80 90 100 110 120 130 140 150  
Thermistor Temperature TTH (°C)  
Figure 5  
Thermistor resistance temperature curve, for REXT=9.76kΩ, and thermistor resistance  
variation with temperature.  
11  
Final Datasheet  
Revision 1.0  
2019-12-12  
CIPOS™ Nano  
IM111-X6Q1B  
9
Qualification Information  
Table 13  
Moisture sensitivity level MSL3  
RoHS Compliant  
ESD  
Yes  
CDM  
HBM  
±2kV, Class C3, per ANSI/ESDA/JEDEC JS-002 standard  
±2kV, Class 2, per ANSI/ESDA/JEDEC JESD22-A114F standard  
12  
Final Datasheet  
Revision 1.0  
2019-12-12  
CIPOS™ Nano  
IM111-X6Q1B  
10  
Diagrams & Tables  
10.1  
Input-Output Logic Table  
V+  
Ho  
Lo  
HIN  
Gate  
Driver  
IC  
U/V/W  
LIN  
Figure 6  
Module block diagram  
Table 14  
RFE  
1
ITRIP  
0
HIN  
1
LIN  
0
U,V,W  
V+  
0
1
0
0
1
1
0
0
0
1
0
1
1
1
1
x
x
0
x
x
x
‡ Voltage depends on direction of phase current  
10.2  
Switching Time Definitions  
HIN  
LIN  
2.1V  
0.9V  
trr  
toff  
ton  
10%  
10%  
iD  
90%  
90%  
tf  
tr  
10%  
10%  
10%  
vDS  
tc(on)  
tc(off)  
Switching times definition  
Figure 7  
13  
Final Datasheet  
Revision 1.0  
2019-12-12  
CIPOS™ Nano  
IM111-X6Q1B  
11  
Application Guide  
11.1  
Typical Application Schematic  
IM111-X6Q1B  
VBUS  
VB1  
VB2  
VDD1  
VDD2  
XTAL0  
HO  
HO  
PWMUL  
LIN1  
HIN1  
LIN2  
HIN2  
PWMUH  
XTAL1  
PWMWL  
PWMWH  
RFE1  
RFE2  
U
V
+
VS1  
LO  
VS2  
LO  
Fault/  
Shutdown  
-
NTC  
Vtemp  
ITRIP1  
COM1  
ITRIP2  
COM2  
uP  
AIN1  
IFB+  
IFB-  
Power  
Supply  
VDD  
VDDCAP  
VSS  
IFBO  
Figure 8  
Application schematic  
11.2  
Performance Charts  
2.5  
V+ = 300V, VDD=VBS=15V,  
TJ≤150°C, MI=0.8, PF=0.8,  
Bipolar SPWM, RTH(J-A)=12°C/W  
2
1.5  
1
FPWM=6kHz  
FPWM=16kHz  
0.5  
0
0
10 20 30 40 50 60 70 80 90 100 110 120 130 140 150  
PCB Ambient Temperature []  
Figure 9  
Max current SOA  
14  
Final Datasheet  
Revision 1.0  
2019-12-12  
CIPOS™ Nano  
IM111-X6Q1B  
11.3  
–Vs Immunity  
Figure 10  
Vs immunity  
15  
Final Datasheet  
Revision 1.0  
2019-12-12  
CIPOS™ Nano  
IM111-X6Q1B  
12  
Package Outline  
Dimensions in mm  
16  
Final Datasheet  
Revision 1.0  
2019-12-12  
CIPOS™ Nano  
IM111-X6Q1B  
Note: Exposed tie bars on side of the module.  
T1 is internally connected to pin 37  
T2 is internally connected to pin 15  
T3 is internally connected to pin 12  
T4 is internally connected to pin 31  
T5 is internally connected to pin 5  
17  
Final Datasheet  
Revision 1.0  
2019-12-12  
CIPOS™ Nano  
IM111-X6Q1B  
Revision History  
Major changes since the last revision  
Page or Reference Description of change  
18  
Final Datasheet  
Revision 1.0  
2019-12-12  
Trademarks  
All referenced product or service names and trademarks are the property of their respective owners.  
IMPORTANT NOTICE  
The information given in this document shall in no For further information on the product, technology,  
Edition 2019-12-12  
event be regarded as a guarantee of conditions or delivery terms and conditions and prices please  
characteristics (“Beschaffenheitsgarantie”) .  
contact your nearest Infineon Technologies office  
Published by  
Infineon Technologies AG  
(www.infineon.com).  
With respect to any examples, hints or any typical  
81726 München, Germany  
values stated herein and/or any information Please note that this product is not qualified  
regarding the application of the product, Infineon according to the AEC Q100 or AEC Q101 documents  
Technologies hereby disclaims any and all of the Automotive Electronics Council.  
warranties and liabilities of any kind, including  
© 2019 Infineon Technologies AG.  
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