IPA041N04N G [INFINEON]

英飞凌的 40V 和 60V 产品系列不仅具有行业内极低的 R DS(on),同时还具有快速开关应用的完美开关行为。通过先进的薄晶圆技术,与其他器件相比,实现了 R DS(on) 减低 15%,品质因数 (R DS(on) x Q g) 降低 31%。;
IPA041N04N G
型号: IPA041N04N G
厂家: Infineon    Infineon
描述:

英飞凌的 40V 和 60V 产品系列不仅具有行业内极低的 R DS(on),同时还具有快速开关应用的完美开关行为。通过先进的薄晶圆技术,与其他器件相比,实现了 R DS(on) 减低 15%,品质因数 (R DS(on) x Q g) 降低 31%。

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MOSFET  
MetalꢀOxideꢀSemiconductorꢀFieldꢀEffectꢀTransistor  
OptiMOSTM  
OptiMOSª3ꢀPower-Transistor,ꢀ40ꢀV  
IPA041N04NꢀG  
DataꢀSheet  
Rev.ꢀ2.0  
Final  
PowerꢀManagementꢀ&ꢀMultimarket  
OptiMOSª3ꢀPower-Transistor,ꢀ40ꢀV  
IPA041N04NꢀG  
TO-220-FP  
1ꢀꢀꢀꢀꢀDescription  
Features  
•ꢀOptimizedꢀtechnologyꢀforꢀDC/DCꢀconverters  
•ꢀQualifiedꢀaccordingꢀtoꢀJEDECꢀ1)ꢀꢀforꢀtargetꢀapplications  
•ꢀN-channel,ꢀnormalꢀlevel  
•ꢀExcellentꢀgateꢀchargeꢀxꢀRDS(on)ꢀproductꢀ(FOM)  
•ꢀVeryꢀlowꢀon-resistanceꢀRDS(on)  
•ꢀ100%ꢀAvalancheꢀtested  
•ꢀPb-freeꢀplating;ꢀRoHSꢀcompliant  
•ꢀHalogen-freeꢀaccordingꢀtoꢀIEC61249-2-21  
Drain  
Pin 2  
Tableꢀ1ꢀꢀꢀꢀꢀKeyꢀPerformanceꢀParameters  
Gate  
Pin 1  
Parameter  
Value  
Unit  
VDS  
40  
V
Source  
Pin 3  
RDS(on),max  
ID  
4.1  
m  
A
70  
Typeꢀ/ꢀOrderingꢀCode  
Package  
Marking  
RelatedꢀLinks  
IPA041N04N G  
PG-TO220-FP  
041N04N  
-
1) J-STD20 and JESD22  
Final Data Sheet  
2
Rev.ꢀ2.0,ꢀꢀ2014-03-12  
OptiMOSª3ꢀPower-Transistor,ꢀ40ꢀV  
IPA041N04NꢀG  
TableꢀofꢀContents  
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2  
Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4  
Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4  
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5  
Electrical characteristics diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7  
Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11  
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12  
Disclaimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12  
Final Data Sheet  
3
Rev.ꢀ2.0,ꢀꢀ2014-03-12  
OptiMOSª3ꢀPower-Transistor,ꢀ40ꢀV  
IPA041N04NꢀG  
2ꢀꢀꢀꢀꢀMaximumꢀratings  
atꢀTjꢀ=ꢀ25ꢀ°C,ꢀunlessꢀotherwiseꢀspecified  
Tableꢀ2ꢀꢀꢀꢀꢀMaximumꢀratings  
at 25 °C  
Values  
Parameter  
Symbol  
Unit Noteꢀ/ꢀTestꢀCondition  
Min.  
Typ.  
Max.  
-
-
-
-
70  
49  
VGS=10ꢀV,ꢀTC=25ꢀ°C  
VGS=10ꢀV,ꢀTC=100ꢀ°C  
Continuous drain current  
ID  
A
Pulsed drain current 1)  
ID,pulse  
IAS  
-
-
-
-
-
-
280  
70  
70  
20  
35  
A
TC=25ꢀ°C  
TC=25ꢀ°C  
ID=70ꢀA,ꢀRGS=25ꢀΩ  
-
Avalanche current, single pulse 2)  
Avalanche energy, single pulse  
Gate source voltage  
-
A
EAS  
VGS  
Ptot  
-
mJ  
V
-20  
-
Power dissipation  
W
TC=25ꢀ°C  
IEC climatic category;  
DIN IEC 68-1: 55/175/56  
Operating and storage temperature  
Tj,ꢀTstg  
-55  
-
175  
°C  
3ꢀꢀꢀꢀꢀThermalꢀcharacteristics  
Tableꢀ3ꢀꢀꢀꢀꢀThermalꢀcharacteristics  
Values  
Typ.  
-
Parameter  
Symbol  
Unit Noteꢀ/ꢀTestꢀCondition  
Min.  
Max.  
Thermal resistance, junction - case  
RthJC  
RthJA  
-
4.3  
K/W  
K/W  
-
-
SMD version, device on PCB,  
minimal footprint  
-
-
-
-
62  
40  
SMD version, device on PCB,  
6 cm² cooling area 3)  
RthJA  
K/W  
-
1) See figure 3 for more detailed information  
2) See figure 13 for more detailed information  
3) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain connection.  
PCB is vertical in still air.  
Final Data Sheet  
4
Rev.ꢀ2.0,ꢀꢀ2014-03-12  
OptiMOSª3ꢀPower-Transistor,ꢀ40ꢀV  
IPA041N04NꢀG  
4ꢀꢀꢀꢀꢀElectricalꢀcharacteristics  
Tableꢀ4ꢀꢀꢀꢀꢀStaticꢀcharacteristics  
Values  
Parameter  
Symbol  
Unit Noteꢀ/ꢀTestꢀCondition  
Min.  
40  
2
Typ.  
Max.  
Drain-source breakdown voltage  
Gate threshold voltage  
V(BR)DSS  
VGS(th)  
-
-
-
V
V
VGS=0ꢀV,ꢀID=1ꢀmA  
VDS=VGS,ꢀID=45ꢀµA  
4
-
-
0.1  
10  
1
100  
VDS=40ꢀV,ꢀVGS=0ꢀV,ꢀTj=25ꢀ°C  
VDS=40ꢀV,ꢀVGS=0ꢀV,ꢀTj=125ꢀ°C  
Zero gate voltage drain current  
IDSS  
µA  
nA  
Gate-source leakage current  
Drain-source on-state resistance 1)  
Gate resistance  
IGSS  
RDS(on)  
RG  
-
10  
100  
4.1  
2.4  
-
VGS=20ꢀV,ꢀVDS=0ꢀV  
-
3.5  
1.6  
96  
mVGS=10ꢀV,ꢀID=70ꢀA  
-
-
Transconductance  
gfs  
48  
S
|VDS|>2|ID|RDS(on)max,ꢀID=70ꢀA  
Tableꢀ5ꢀꢀꢀꢀꢀDynamicꢀcharacteristics  
Values  
Typ.  
Parameter  
Symbol  
Unit Noteꢀ/ꢀTestꢀCondition  
Min.  
Max.  
Input capacitance  
Ciss  
Coss  
Crss  
-
-
-
3400 4500 pF  
VGS=0ꢀV,ꢀVDS=20ꢀV,ꢀf=1ꢀMHz  
VGS=0ꢀV,ꢀVDS=20ꢀV,ꢀf=1ꢀMHz  
VGS=0ꢀV,ꢀVDS=20ꢀV,ꢀf=1ꢀMHz  
Output capacitance  
980  
36  
1300 pF  
Reverse transfer capacitance  
72  
-
pF  
ns  
VDD=20ꢀV,ꢀVGS=10ꢀV,ꢀID=30ꢀA,  
RG,ext=1.6ꢀΩ  
Turn-on delay time  
Rise time  
td(on)  
tr  
td(off)  
tf  
-
-
-
-
16  
VDD=20ꢀV,ꢀVGS=10ꢀV,ꢀID=30ꢀA,  
RG,ext=1.6ꢀΩ  
3.8  
23  
-
-
-
ns  
ns  
ns  
VDD=20ꢀV,ꢀVGS=10ꢀV,ꢀID=30ꢀA,  
RG,ext=1.6ꢀΩ  
Turn-off delay time  
Fall time  
VDD=20ꢀV,ꢀVGS=10ꢀV,ꢀID=30ꢀA,  
RG,ext=1.6ꢀΩ  
4.8  
Tableꢀ6ꢀꢀꢀꢀꢀGateꢀchargeꢀcharacteristicsꢀ2)ꢀ  
Values  
Typ.  
18  
Parameter  
Symbol  
Unit Noteꢀ/ꢀTestꢀCondition  
Min.  
Max.  
Gate to source charge  
Gate charge at threshold  
Gate to drain charge  
Switching charge  
Qgs  
-
-
-
-
-
-
-
-
-
nC  
nC  
nC  
nC  
nC  
V
VDD=20ꢀV,ꢀID=30ꢀA,ꢀVGS=0ꢀtoꢀ10ꢀV  
VDD=20ꢀV,ꢀID=30ꢀA,ꢀVGS=0ꢀtoꢀ10ꢀV  
VDD=20ꢀV,ꢀID=30ꢀA,ꢀVGS=0ꢀtoꢀ10ꢀV  
VDD=20ꢀV,ꢀID=30ꢀA,ꢀVGS=0ꢀtoꢀ10ꢀV  
VDD=20ꢀV,ꢀID=30ꢀA,ꢀVGS=0ꢀtoꢀ10ꢀV  
VDD=20ꢀV,ꢀID=30ꢀA,ꢀVGS=0ꢀtoꢀ10ꢀV  
VDS=0.1ꢀV,ꢀVGS=0ꢀtoꢀ10ꢀV  
Qg(th)  
Qgd  
10.3  
5.3  
-
-
Qsw  
12.5  
42  
-
Gate charge total  
Qg  
56  
-
Gate plateau voltage  
Gate charge total, sync. FET  
Output charge  
Vplateau  
Qg(sync)  
Qoss  
5.1  
40  
-
nC  
nC  
41  
-
VDD=20ꢀV,ꢀVGS=0ꢀV  
1) Measured from drain tab to source pin  
2) See Gate charge waveformsfor parameter definition  
Final Data Sheet  
5
Rev.ꢀ2.0,ꢀꢀ2014-03-12  
OptiMOSª3ꢀPower-Transistor,ꢀ40ꢀV  
IPA041N04NꢀG  
Tableꢀ7ꢀꢀꢀꢀꢀReverseꢀdiode  
Values  
Parameter  
Symbol  
Unit Noteꢀ/ꢀTestꢀCondition  
Min.  
Typ.  
-
Max.  
29  
Diode continuous forward current  
Diode pulse current  
IS  
-
-
-
-
A
TC=25ꢀ°C  
IS,pulse  
VSD  
Qrr  
-
280  
1.2  
-
A
TC=25ꢀ°C  
Diode forward voltage  
0.87  
19  
V
VGS=0ꢀV,ꢀIF=29ꢀA,ꢀTj=25ꢀ°C  
VR=20ꢀV,ꢀIF=29ꢀA,ꢀdiF/dt=400ꢀA/µs  
Reverse recovery charge  
nC  
Final Data Sheet  
6
Rev.ꢀ2.0,ꢀꢀ2014-03-12  
OptiMOSª3ꢀPower-Transistor,ꢀ40ꢀV  
IPA041N04NꢀG  
5ꢀꢀꢀꢀꢀElectricalꢀcharacteristicsꢀdiagrams  
Diagramꢀ1:ꢀPowerꢀdissipation  
Diagramꢀ2:ꢀDrainꢀcurrent  
40  
80  
60  
40  
20  
0
36  
32  
28  
24  
20  
16  
12  
8
4
0
0
50  
100  
150  
200  
0
50  
100  
150  
200  
TCꢀ[°C]  
TCꢀ[°C]  
Ptot=f(TC)  
ID=f(TC);ꢀVGS10ꢀV  
Diagramꢀ3:ꢀSafeꢀoperatingꢀarea  
Diagramꢀ4:ꢀMax.ꢀtransientꢀthermalꢀimpedance  
103  
101  
1 µs  
0.5  
100 µs  
102  
10 µs  
100  
0.2  
1 ms  
0.1  
101  
0.05  
DC  
0.02  
10 ms  
10-1  
100  
0.01  
single pulse  
10-2  
10-1  
10-1  
100  
101  
102  
10-6  
10-5  
10-4  
10-3  
10-2  
10-1  
100  
101  
VDSꢀ[V]  
tpꢀ[s]  
ID=f(VDS);ꢀTC=25ꢀ°C;ꢀD=0;ꢀparameter:ꢀtp  
ZthJC=f(tp);ꢀparameter:ꢀD=tp/T  
Final Data Sheet  
7
Rev.ꢀ2.0,ꢀꢀ2014-03-12  
OptiMOSª3ꢀPower-Transistor,ꢀ40ꢀV  
IPA041N04NꢀG  
Diagramꢀ5:ꢀTyp.ꢀoutputꢀcharacteristics  
Diagramꢀ6:ꢀTyp.ꢀdrain-sourceꢀonꢀresistance  
200  
8
5.5 V  
10 V  
7
6 V  
6.5 V  
7 V  
6.5 V  
150  
6
5
4
3
2
1
0
7 V  
6 V  
100  
50  
0
10 V  
5.5 V  
5 V  
0
1
2
3
0
50  
100  
150  
200  
VDSꢀ[V]  
IDꢀ[A]  
ID=f(VDS);ꢀTj=25ꢀ°C;ꢀparameter:ꢀVGS  
RDS(on)=f(ID);ꢀTj=25ꢀ°C;ꢀparameter:ꢀVGS  
Diagramꢀ7:ꢀTyp.ꢀtransferꢀcharacteristics  
Diagramꢀ8:ꢀTyp.ꢀforwardꢀtransconductance  
200  
120  
100  
80  
60  
40  
20  
0
150  
100  
50  
175 °C  
25 °C  
0
0
2
4
6
8
0
20  
40  
60  
80  
100  
VGSꢀ[V]  
IDꢀ[A]  
ID=f(VGS);ꢀ|VDS|>2|ID|RDS(on)max;ꢀparameter:ꢀTj  
gfs=f(ID);ꢀTj=25ꢀ°C  
Final Data Sheet  
8
Rev.ꢀ2.0,ꢀꢀ2014-03-12  
OptiMOSª3ꢀPower-Transistor,ꢀ40ꢀV  
IPA041N04NꢀG  
Diagramꢀ9:ꢀDrain-sourceꢀon-stateꢀresistance  
Diagramꢀ10:ꢀTyp.ꢀgateꢀthresholdꢀvoltage  
8
4
7
6
3
2
1
0
5
max  
4
typ  
3
2
1
0
-60  
-20  
20  
60  
100  
140  
180  
-60  
-20  
20  
60  
100  
140  
180  
Tjꢀ[°C]  
Tjꢀ[°C]  
RDS(on)=f(Tj);ꢀID=70ꢀA;ꢀVGS=10ꢀV  
VGS(th)=f(Tj);ꢀVGS=VDS;ꢀID=45ꢀµA  
Diagramꢀ11:ꢀTyp.ꢀcapacitances  
Diagramꢀ12:ꢀForwardꢀcharacteristicsꢀofꢀreverseꢀdiode  
104  
103  
25 °C  
175 °C  
25 °C, max  
175 °C, max  
Ciss  
Coss  
103  
102  
101  
102  
101  
100  
Crss  
0
10  
20  
30  
40  
0.0  
0.5  
1.0  
1.5  
2.0  
VDSꢀ[V]  
VSDꢀ[V]  
C=f(VDS);ꢀVGS=0ꢀV;ꢀf=1ꢀMHz  
IF=f(VSD);ꢀparameter:ꢀTj  
Final Data Sheet  
9
Rev.ꢀ2.0,ꢀꢀ2014-03-12  
OptiMOSª3ꢀPower-Transistor,ꢀ40ꢀV  
IPA041N04NꢀG  
Diagramꢀ13:ꢀAvalancheꢀcharacteristics  
Diagramꢀ14:ꢀTyp.ꢀgateꢀcharge  
102  
12  
20 V  
8 V  
10  
8
25 °C  
100 °C  
32 V  
150 °C  
101  
6
4
2
100  
10-1  
0
100  
101  
102  
103  
0
10  
20  
30  
40  
50  
tAVꢀ[µs]  
Qgateꢀ[nC]  
IAS=f(tAV);ꢀRGS=25ꢀ;ꢀparameter:ꢀTj(start)  
VGS=f(Qgate);ꢀID=30ꢀAꢀpulsed;ꢀparameter:ꢀVDD  
Diagramꢀ15:ꢀDrain-sourceꢀbreakdownꢀvoltage  
Gate charge waveforms  
44  
42  
40  
38  
36  
34  
32  
30  
-60  
-20  
20  
60  
100  
140  
180  
Tjꢀ[°C]  
VBR(DSS)=f(Tj);ꢀID=1ꢀmA  
Final Data Sheet  
10  
Rev.ꢀ2.0,ꢀꢀ2014-03-12  
OptiMOSª3ꢀPower-Transistor,ꢀ40ꢀV  
IPA041N04NꢀG  
6ꢀꢀꢀꢀꢀPackageꢀOutlines  
Figureꢀ1ꢀꢀꢀꢀꢀOutlineꢀPG-TO220-FP,ꢀdimensionsꢀinꢀmm/inches  
Final Data Sheet  
11  
Rev.ꢀ2.0,ꢀꢀ2014-03-12  
OptiMOSª3ꢀPower-Transistor,ꢀ40ꢀV  
IPA041N04NꢀG  
RevisionꢀHistory  
IPA041N04N G  
Revision:ꢀ2014-03-12,ꢀRev.ꢀ2.0  
Previous Revision  
Revision Date  
2.0  
Subjects (major changes since last revision)  
Release of final version  
2014-03-12  
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TheꢀInfineonꢀTechnologiesꢀcomponentꢀdescribedꢀinꢀthisꢀDataꢀSheetꢀmayꢀbeꢀusedꢀinꢀlife-supportꢀdevicesꢀorꢀsystemsꢀand/or  
automotive,ꢀaviationꢀandꢀaerospaceꢀapplicationsꢀorꢀsystemsꢀonlyꢀwithꢀtheꢀexpressꢀwrittenꢀapprovalꢀofꢀInfineonꢀTechnologies,ꢀifꢀa  
failureꢀofꢀsuchꢀcomponentsꢀcanꢀreasonablyꢀbeꢀexpectedꢀtoꢀcauseꢀtheꢀfailureꢀofꢀthatꢀlife-support,ꢀautomotive,ꢀaviationꢀand  
aerospaceꢀdeviceꢀorꢀsystemꢀorꢀtoꢀaffectꢀtheꢀsafetyꢀorꢀeffectivenessꢀofꢀthatꢀdeviceꢀorꢀsystem.ꢀLifeꢀsupportꢀdevicesꢀorꢀsystemsꢀare  
intendedꢀtoꢀbeꢀimplantedꢀinꢀtheꢀhumanꢀbodyꢀorꢀtoꢀsupportꢀand/orꢀmaintainꢀandꢀsustainꢀand/orꢀprotectꢀhumanꢀlife.ꢀIfꢀtheyꢀfail,ꢀitꢀis  
reasonableꢀtoꢀassumeꢀthatꢀtheꢀhealthꢀofꢀtheꢀuserꢀorꢀotherꢀpersonsꢀmayꢀbeꢀendangered.  
Final Data Sheet  
12  
Rev.ꢀ2.0,ꢀꢀ2014-03-12  

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