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IPD050N10N5ATMA1 [INFINEON]

Power Field-Effect Transistor, 80A I(D), 100V, 0.005ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-252, DPAK-3/2;
IPD050N10N5ATMA1
型号： IPD050N10N5ATMA1
厂家： Infineon    Infineon
描述：

Power Field-Effect Transistor, 80A I(D), 100V, 0.005ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-252, DPAK-3/2

开关 脉冲 晶体管
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中文：  中文翻译
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IPD050N10N5  
MOSFET  
OptiMOSTM5ꢀPower-Transistor,ꢀ100ꢀV  
D-PAK  
Features  
•ꢀN-channel,ꢀnormalꢀlevel  
•ꢀExcellentꢀgateꢀchargeꢀxꢀRDS(on)ꢀproductꢀ(FOM)  
•ꢀVeryꢀlowꢀon-resistanceꢀRDS(on)  
tab  
•ꢀ175ꢀ°Cꢀoperatingꢀtemperature  
1
2
•ꢀPb-freeꢀleadꢀplating;ꢀRoHSꢀcompliant  
•ꢀQualifiedꢀaccordingꢀtoꢀJEDEC1)ꢀꢀforꢀtargetꢀapplication  
•ꢀIdealꢀforꢀhigh-frequencyꢀswitchingꢀandꢀsynchronousꢀrectification  
•ꢀHalogen-freeꢀaccordingꢀtoꢀIEC61249-2-21  
3
Drain  
Pin 2, Tab  
Tableꢀ1ꢀꢀꢀꢀꢀKeyꢀPerformanceꢀParameters  
Parameter  
Value  
100  
5.0  
80  
Unit  
VDS  
V
Gate  
Pin 1  
RDS(on),max  
ID  
mΩ  
A
Source  
Pin 3  
QOSS  
67  
nC  
nC  
QG(0V..10V)  
51  
Typeꢀ/ꢀOrderingꢀCode  
Package  
Marking  
RelatedꢀLinks  
IPD050N10N5  
P-TO252-3  
050N10N5  
-
1) J-STD20 and JESD22  
Final Data Sheet  
1
Rev.ꢀ2.1,ꢀꢀ2017-01-17  
OptiMOSTM5ꢀPower-Transistor,ꢀ100ꢀV  
IPD050N10N5  
TableꢀofꢀContents  
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3  
Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3  
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4  
Electrical characteristics diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6  
Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10  
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11  
Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11  
Disclaimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11  
Final Data Sheet  
2
Rev.ꢀ2.1,ꢀꢀ2017-01-17  
OptiMOSTM5ꢀPower-Transistor,ꢀ100ꢀV  
IPD050N10N5  
1ꢀꢀꢀꢀꢀMaximumꢀratings  
atꢀTA=25ꢀ°C,ꢀunlessꢀotherwiseꢀspecified  
Tableꢀ2ꢀꢀꢀꢀꢀMaximumꢀratings  
Values  
Typ.  
Parameter  
Symbol  
Unit Noteꢀ/ꢀTestꢀCondition  
Min.  
Max.  
-
-
-
-
80  
80  
TC=25ꢀ°C1)  
TC=100ꢀ°C  
Continuous drain current  
ID  
A
Pulsed drain current1)  
Avalanche energy, single pulse2)  
Gate source voltage  
ID,pulse  
EAS  
-
-
-
-
-
320  
110  
20  
A
TC=25ꢀ°C  
-
mJ  
V
ID=80ꢀA,ꢀRGS=25ꢀΩ  
VGS  
Ptot  
-20  
-
-
Power dissipation  
150  
W
TC=25ꢀ°C  
IEC climatic category;  
DIN IEC 68-1: 55/175/56  
Operating and storage temperature  
Tj,ꢀTstg  
-55  
-
175  
°C  
2ꢀꢀꢀꢀꢀThermalꢀcharacteristics  
Tableꢀ3ꢀꢀꢀꢀꢀThermalꢀcharacteristics  
Values  
Typ.  
0.6  
Parameter  
Symbol  
Unit Noteꢀ/ꢀTestꢀCondition  
Min.  
Max.  
Thermal resistance, junction - case  
RthJC  
RthJA  
-
1
K/W  
K/W  
-
-
Thermal resistance, junction - ambient,  
minimal footprint  
-
-
-
-
-
-
75  
Thermal resistance, junction - ambient,  
6 cm2 cooling area3)  
RthJA  
Tsold  
50  
K/W  
°C  
-
Soldering temperature, wave and  
reflow soldering are allowed  
260  
reflow MSL1  
1) See Diagram 3 for more detailed information  
2) See Diagram 13 for more detailed information  
3) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain connection.  
PCB is vertical in still air.  
Final Data Sheet  
3
Rev.ꢀ2.1,ꢀꢀ2017-01-17  
OptiMOSTM5ꢀPower-Transistor,ꢀ100ꢀV  
IPD050N10N5  
3ꢀꢀꢀꢀꢀElectricalꢀcharacteristics  
Tableꢀ4ꢀꢀꢀꢀꢀStaticꢀcharacteristics  
Values  
Typ.  
-
Parameter  
Symbol  
Unit Noteꢀ/ꢀTestꢀCondition  
Min.  
100  
2.2  
Max.  
-
Drain-source breakdown voltage  
Gate threshold voltage  
V(BR)DSS  
VGS(th)  
V
V
VGS=0ꢀV,ꢀID=1ꢀmA  
VDS=VGS,ꢀID=84ꢀµA  
3.0  
3.8  
-
-
0.1  
10  
1
100  
VDS=100ꢀV,ꢀVGS=0ꢀV,ꢀTj=25ꢀ°C  
VDS=100ꢀV,ꢀVGS=0ꢀV,ꢀTj=125ꢀ°C  
Zero gate voltage drain current  
Gate-source leakage current  
Drain-source on-state resistance  
IDSS  
µA  
nA  
IGSS  
-
1
100  
VGS=20ꢀV,ꢀVDS=0ꢀV  
-
-
4.3  
5.1  
5
6.7  
VGS=10ꢀV,ꢀID=40ꢀA  
VGS=6ꢀV,ꢀID=20ꢀA  
RDS(on)  
mΩ  
Gate resistance1)  
Transconductance  
RG  
gfs  
-
1.2  
95  
1.8  
-
Ω
-
48  
S
|VDS|>2|ID|RDS(on)max,ꢀID=40ꢀA  
Tableꢀ5ꢀꢀꢀꢀꢀDynamicꢀcharacteristics1)ꢀ  
Values  
Typ.  
Parameter  
Symbol  
Unit Noteꢀ/ꢀTestꢀCondition  
Min.  
Max.  
Input capacitance  
Ciss  
Coss  
Crss  
-
-
-
3600 4700 pF  
VGS=0ꢀV,ꢀVDS=50ꢀV,ꢀf=1ꢀMHz  
VGS=0ꢀV,ꢀVDS=50ꢀV,ꢀf=1ꢀMHz  
VGS=0ꢀV,ꢀVDS=50ꢀV,ꢀf=1ꢀMHz  
Output capacitance  
560  
25  
730  
44  
pF  
pF  
Reverse transfer capacitance  
VDD=50ꢀV,ꢀVGS=10ꢀV,ꢀID=40ꢀA,  
RG,ext=1.6ꢀΩ  
Turn-on delay time  
Rise time  
td(on)  
tr  
td(off)  
tf  
-
-
-
-
13  
7
-
-
-
-
ns  
ns  
ns  
ns  
VDD=50ꢀV,ꢀVGS=10ꢀV,ꢀID=40ꢀA,  
RG,ext=1.6ꢀΩ  
VDD=50ꢀV,ꢀVGS=10ꢀV,ꢀID=40ꢀA,  
RG,ext=1.6ꢀΩ  
Turn-off delay time  
Fall time  
27  
7
VDD=50ꢀV,ꢀVGS=10ꢀV,ꢀID=40ꢀA,  
RG,ext=1.6ꢀΩ  
Tableꢀ6ꢀꢀꢀꢀꢀGateꢀchargeꢀcharacteristics2)ꢀ  
Values  
Typ.  
16  
Parameter  
Symbol  
Unit Noteꢀ/ꢀTestꢀCondition  
Min.  
Max.  
Gate to source charge  
Gate to drain charge1)  
Switching charge  
Gate charge total1)  
Gate plateau voltage  
Output charge1)  
Qgs  
-
-
-
-
-
-
-
nC  
nC  
nC  
nC  
V
VDD=50ꢀV,ꢀID=40ꢀA,ꢀVGS=0ꢀtoꢀ10ꢀV  
VDD=50ꢀV,ꢀID=40ꢀA,ꢀVGS=0ꢀtoꢀ10ꢀV  
VDD=50ꢀV,ꢀID=40ꢀA,ꢀVGS=0ꢀtoꢀ10ꢀV  
VDD=50ꢀV,ꢀID=40ꢀA,ꢀVGS=0ꢀtoꢀ10ꢀV  
VDD=50ꢀV,ꢀID=40ꢀA,ꢀVGS=0ꢀtoꢀ10ꢀV  
VDD=50ꢀV,ꢀVGS=0ꢀV  
Qgd  
10  
16  
-
Qsw  
Qg  
16  
51  
64  
-
Vplateau  
Qoss  
4.5  
67  
89  
nC  
1) Defined by design. Not subject to production test  
2) See ″Gate charge waveforms″ for parameter definition  
Final Data Sheet  
4
Rev.ꢀ2.1,ꢀꢀ2017-01-17  
OptiMOSTM5ꢀPower-Transistor,ꢀ100ꢀV  
IPD050N10N5  
Tableꢀ7ꢀꢀꢀꢀꢀReverseꢀdiode  
Values  
Parameter  
Symbol  
Unit Noteꢀ/ꢀTestꢀCondition  
Min.  
Typ.  
-
Max.  
80  
Diode continous forward current  
Diode pulse current  
IS  
-
-
-
-
-
A
TC=25ꢀ°C  
IS,pulse  
VSD  
trr  
-
320  
1.2  
96  
A
TC=25ꢀ°C  
Diode forward voltage  
0.9  
48  
62  
V
VGS=0ꢀV,ꢀIF=40ꢀA,ꢀTj=25ꢀ°C  
VR=50ꢀV,ꢀIF=40ꢀA,ꢀdiF/dt=100ꢀA/µs  
VR=50ꢀV,ꢀIF=40ꢀA,ꢀdiF/dt=100ꢀA/µs  
Reverse recovery time1)  
Reverse recovery charge1)  
ns  
nC  
Qrr  
124  
1) Defined by design. Not subject to production test  
Final Data Sheet  
5
Rev.ꢀ2.1,ꢀꢀ2017-01-17  
OptiMOSTM5ꢀPower-Transistor,ꢀ100ꢀV  
IPD050N10N5  
4ꢀꢀꢀꢀꢀElectricalꢀcharacteristicsꢀdiagrams  
Diagramꢀ1:ꢀPowerꢀdissipation  
Diagramꢀ2:ꢀDrainꢀcurrent  
175  
100  
150  
125  
100  
75  
80  
60  
40  
20  
0
50  
25  
0
0
50  
100  
150  
200  
0
50  
100  
150  
200  
TCꢀ[°C]  
TCꢀ[°C]  
Ptot=f(TC)  
ID=f(TC);ꢀVGS≥10ꢀV  
Diagramꢀ3:ꢀSafeꢀoperatingꢀarea  
Diagramꢀ4:ꢀMax.ꢀtransientꢀthermalꢀimpedance  
103  
101  
1 µs  
10 µs  
102  
100  
100 µs  
0.5  
0.2  
0.1  
1 ms  
101  
10-1  
0.05  
0.02  
10 ms  
0.01  
DC  
single pulse  
100  
10-1  
10-2  
100  
101  
102  
103  
10-5  
10-4  
10-3  
10-2  
10-1  
100  
VDSꢀ[V]  
tpꢀ[s]  
ID=f(VDS);ꢀTC=25ꢀ°C;ꢀD=0;ꢀparameter:ꢀtp  
ZthJC=f(tp);ꢀparameter:ꢀD=tp/T  
Final Data Sheet  
6
Rev.ꢀ2.1,ꢀꢀ2017-01-17  
OptiMOSTM5ꢀPower-Transistor,ꢀ100ꢀV  
IPD050N10N5  
Diagramꢀ5:ꢀTyp.ꢀoutputꢀcharacteristics  
Diagramꢀ6:ꢀTyp.ꢀdrain-sourceꢀonꢀresistance  
360  
10  
7 V  
8 V  
10 V  
320  
280  
240  
200  
160  
120  
80  
6.5 V  
8
5 V  
5.5 V  
6 V  
6 V  
6.5 V  
6
4
2
0
7 V  
8 V  
5.5 V  
5 V  
10 V  
40  
4.5 V  
0
0
1
2
3
4
5
0
40  
80  
120  
160  
200  
240  
280  
320  
VDSꢀ[V]  
IDꢀ[A]  
ID=f(VDS);ꢀTj=25ꢀ°C;ꢀparameter:ꢀVGS  
RDS(on)=f(ID);ꢀTj=25ꢀ°C;ꢀparameter:ꢀVGS  
Diagramꢀ7:ꢀTyp.ꢀtransferꢀcharacteristics  
Diagramꢀ8:ꢀTyp.ꢀforwardꢀtransconductance  
180  
200  
150  
120  
90  
160  
120  
80  
40  
0
60  
175 °C  
25 °C  
30  
0
0
2
4
6
8
0
40  
80  
120  
160  
VGSꢀ[V]  
IDꢀ[A]  
ID=f(VGS);ꢀ|VDS|>2|ID|RDS(on)max;ꢀparameter:ꢀTj  
gfs=f(ID);ꢀTj=25ꢀ°C  
Final Data Sheet  
7
Rev.ꢀ2.1,ꢀꢀ2017-01-17  
OptiMOSTM5ꢀPower-Transistor,ꢀ100ꢀV  
IPD050N10N5  
Diagramꢀ9:ꢀDrain-sourceꢀon-stateꢀresistance  
Diagramꢀ10:ꢀTyp.ꢀgateꢀthresholdꢀvoltage  
12  
4
10  
8
840 µA  
3
2
1
0
84 µA  
max  
6
typ  
4
2
0
-60  
-20  
20  
60  
100  
140  
180  
-60  
-20  
20  
60  
100  
140  
180  
Tjꢀ[°C]  
Tjꢀ[°C]  
RDS(on)=f(Tj);ꢀID=40ꢀA;ꢀVGS=10ꢀV  
VGS(th)=f(Tj);ꢀVGS=VDS;ꢀparameter:ꢀID  
Diagramꢀ11:ꢀTyp.ꢀcapacitances  
Diagramꢀ12:ꢀForwardꢀcharacteristicsꢀofꢀreverseꢀdiode  
104  
103  
25 °C  
175 °C  
25 °C, 98%  
175 °C, 98%  
Ciss  
103  
102  
101  
102  
101  
100  
Coss  
Crss  
0
20  
40  
60  
80  
100  
0.0  
0.5  
1.0  
1.5  
2.0  
VDSꢀ[V]  
VSDꢀ[V]  
C=f(VDS);ꢀVGS=0ꢀV;ꢀf=1ꢀMHz  
IF=f(VSD);ꢀparameter:ꢀTj  
Final Data Sheet  
8
Rev.ꢀ2.1,ꢀꢀ2017-01-17  
OptiMOSTM5ꢀPower-Transistor,ꢀ100ꢀV  
IPD050N10N5  
Diagramꢀ13:ꢀAvalancheꢀcharacteristics  
Diagramꢀ14:ꢀTyp.ꢀgateꢀcharge  
102  
10  
50 V  
8
6
4
2
0
25 °C  
20 V  
80 V  
100 °C  
150 °C  
101  
100  
10-1  
100  
101  
102  
103  
0
20  
40  
60  
tAVꢀ[µs]  
Qgateꢀ[nC]  
IAS=f(tAV);ꢀRGS=25ꢀΩ;ꢀparameter:ꢀTj(start)  
VGS=f(Qgate);ꢀID=40ꢀAꢀpulsed;ꢀparameter:ꢀVDD  
Diagramꢀ15:ꢀDrain-sourceꢀbreakdownꢀvoltage  
Gate charge waveforms  
110  
105  
100  
95  
90  
-60  
-20  
20  
60  
100  
140  
180  
Tjꢀ[°C]  
VBR(DSS)=f(Tj);ꢀID=1ꢀmA  
Final Data Sheet  
9
Rev.ꢀ2.1,ꢀꢀ2017-01-17  
OptiMOSTM5ꢀPower-Transistor,ꢀ100ꢀV  
IPD050N10N5  
5ꢀꢀꢀꢀꢀPackageꢀOutlines  
Figureꢀ1ꢀꢀꢀꢀꢀOutlineꢀP-TO252-3,ꢀdimensionsꢀinꢀmm/inches  
Final Data Sheet  
10  
Rev.ꢀ2.1,ꢀꢀ2017-01-17  
OptiMOSTM5ꢀPower-Transistor,ꢀ100ꢀV  
IPD050N10N5  
RevisionꢀHistory  
IPD050N10N5  
Revision:ꢀ2017-01-17,ꢀRev.ꢀ2.1  
Previous Revision  
Revision Date  
Subjects (major changes since last revision)  
2.0  
2.1  
Release of final version  
2016-11-22  
2017-01-17  
Update Idss max at Tj=25°C  
TrademarksꢀofꢀInfineonꢀTechnologiesꢀAG  
AURIX™,ꢀC166™,ꢀCanPAK™,ꢀCIPOS™,ꢀCoolGaN™,ꢀCoolMOS™,ꢀCoolSET™,ꢀCoolSiC™,ꢀCORECONTROL™,ꢀCROSSAVE™,ꢀDAVE™,ꢀDI-POL™,ꢀDrBlade™,  
EasyPIM™,ꢀEconoBRIDGE™,ꢀEconoDUAL™,ꢀEconoPACK™,ꢀEconoPIM™,ꢀEiceDRIVER™,ꢀeupec™,ꢀFCOS™,ꢀHITFET™,ꢀHybridPACK™,ꢀInfineon™,  
ISOFACE™,ꢀIsoPACK™,ꢀi-Wafer™,ꢀMIPAQ™,ꢀModSTACK™,ꢀmy-d™,ꢀNovalithIC™,ꢀOmniTune™,ꢀOPTIGA™,ꢀOptiMOS™,ꢀORIGA™,ꢀPOWERCODE™,  
PRIMARION™,ꢀPrimePACK™,ꢀPrimeSTACK™,ꢀPROFET™,ꢀPRO-SIL™,ꢀRASIC™,ꢀREAL3™,ꢀReverSave™,ꢀSatRIC™,ꢀSIEGET™,ꢀSIPMOS™,ꢀSmartLEWIS™,  
SOLIDꢀFLASH™,ꢀSPOC™,ꢀTEMPFET™,ꢀthinQꢁ™,ꢀTRENCHSTOP™,ꢀTriCore™.  
TrademarksꢀupdatedꢀAugustꢀ2015  
OtherꢀTrademarks  
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(“Beschaffenheitsgarantie”)ꢀ.  
Withꢀrespectꢀtoꢀanyꢀexamples,ꢀhintsꢀorꢀanyꢀtypicalꢀvaluesꢀstatedꢀhereinꢀand/orꢀanyꢀinformationꢀregardingꢀtheꢀapplicationꢀofꢀthe  
product,ꢀInfineonꢀTechnologiesꢀherebyꢀdisclaimsꢀanyꢀandꢀallꢀwarrantiesꢀandꢀliabilitiesꢀofꢀanyꢀkind,ꢀincludingꢀwithoutꢀlimitation  
warrantiesꢀofꢀnon-infringementꢀofꢀintellectualꢀpropertyꢀrightsꢀofꢀanyꢀthirdꢀparty.  
Inꢀaddition,ꢀanyꢀinformationꢀgivenꢀinꢀthisꢀdocumentꢀisꢀsubjectꢀtoꢀcustomer’sꢀcomplianceꢀwithꢀitsꢀobligationsꢀstatedꢀinꢀthis  
documentꢀandꢀanyꢀapplicableꢀlegalꢀrequirements,ꢀnormsꢀandꢀstandardsꢀconcerningꢀcustomer’sꢀproductsꢀandꢀanyꢀuseꢀofꢀthe  
productꢀofꢀInfineonꢀTechnologiesꢀinꢀcustomer’sꢀapplications.  
Theꢀdataꢀcontainedꢀinꢀthisꢀdocumentꢀisꢀexclusivelyꢀintendedꢀforꢀtechnicallyꢀtrainedꢀstaff.ꢀItꢀisꢀtheꢀresponsibilityꢀofꢀcustomer’s  
technicalꢀdepartmentsꢀtoꢀevaluateꢀtheꢀsuitabilityꢀofꢀtheꢀproductꢀforꢀtheꢀintendedꢀapplicationꢀandꢀtheꢀcompletenessꢀofꢀtheꢀproduct  
informationꢀgivenꢀinꢀthisꢀdocumentꢀwithꢀrespectꢀtoꢀsuchꢀapplication.  
Information  
Forꢀfurtherꢀinformationꢀonꢀtechnology,ꢀdeliveryꢀtermsꢀandꢀconditionsꢀandꢀpricesꢀpleaseꢀcontactꢀyourꢀnearestꢀInfineon  
TechnologiesꢀOfficeꢀ(www.infineon.com).  
Warnings  
Dueꢀtoꢀtechnicalꢀrequirements,ꢀcomponentsꢀmayꢀcontainꢀdangerousꢀsubstances.ꢀForꢀinformationꢀonꢀtheꢀtypesꢀinꢀquestion,  
pleaseꢀcontactꢀtheꢀnearestꢀInfineonꢀTechnologiesꢀOffice.  
TheꢀInfineonꢀTechnologiesꢀcomponentꢀdescribedꢀinꢀthisꢀDataꢀSheetꢀmayꢀbeꢀusedꢀinꢀlife-supportꢀdevicesꢀorꢀsystemsꢀand/or  
automotive,ꢀaviationꢀandꢀaerospaceꢀapplicationsꢀorꢀsystemsꢀonlyꢀwithꢀtheꢀexpressꢀwrittenꢀapprovalꢀofꢀInfineonꢀTechnologies,ꢀifꢀa  
failureꢀofꢀsuchꢀcomponentsꢀcanꢀreasonablyꢀbeꢀexpectedꢀtoꢀcauseꢀtheꢀfailureꢀofꢀthatꢀlife-support,ꢀautomotive,ꢀaviationꢀand  
aerospaceꢀdeviceꢀorꢀsystemꢀorꢀtoꢀaffectꢀtheꢀsafetyꢀorꢀeffectivenessꢀofꢀthatꢀdeviceꢀorꢀsystem.ꢀLifeꢀsupportꢀdevicesꢀorꢀsystemsꢀare  
intendedꢀtoꢀbeꢀimplantedꢀinꢀtheꢀhumanꢀbodyꢀorꢀtoꢀsupportꢀand/orꢀmaintainꢀandꢀsustainꢀand/orꢀprotectꢀhumanꢀlife.ꢀIfꢀtheyꢀfail,ꢀitꢀis  
reasonableꢀtoꢀassumeꢀthatꢀtheꢀhealthꢀofꢀtheꢀuserꢀorꢀotherꢀpersonsꢀmayꢀbeꢀendangered.  
Final Data Sheet  
11  
Rev.ꢀ2.1,ꢀꢀ2017-01-17  

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