首页 |元器件品牌

IPD075N03L G [INFINEON]

极低的栅极和输出电荷，结合极低的导通状态电阻和小体积封装，使 OptiMOS™ 25V 成为要求较高的服务器、数据通信和通信电压调节器解决方案的最佳选择。OptiMOS™ 30V 产品专为满足笔记本电脑的电源管理需求而量身定制，可改善电磁干扰行为，以及延长电池寿命。可用于半桥配置（功率级 5x6）;
IPD075N03L G
型号： IPD075N03L G
厂家： Infineon    Infineon
描述：

极低的栅极和输出电荷，结合极低的导通状态电阻和小体积封装，使 OptiMOS™ 25V 成为要求较高的服务器、数据通信和通信电压调节器解决方案的最佳选择。OptiMOS™ 30V 产品专为满足笔记本电脑的电源管理需求而量身定制，可改善电磁干扰行为，以及延长电池寿命。可用于半桥配置（功率级 5x6）

通信 电池 栅 数据通信 服务器 电脑 栅极 调节器
文件： 总11页 (文件大小：998K)
中文：  中文翻译
下载：  下载PDF数据表文档文件
 查看货源
IPD075N03LꢀG  
MOSFET  
OptiMOSª3ꢀPower-Transistor,ꢀ30ꢀV  
DPAK  
tab  
Features  
•ꢀFastꢀswitchingꢀMOSFETꢀforꢀSMPS  
•ꢀOptimizedꢀtechnologyꢀforꢀDC/DCꢀconverters  
•ꢀQualifiedꢀaccordingꢀtoꢀJEDEC1)ꢀꢀforꢀtargetꢀapplications  
•ꢀN-channel,ꢀlogicꢀlevel  
•ꢀExcellentꢀgateꢀchargeꢀxꢀRDS(on)ꢀproductꢀ(FOM)  
•ꢀVeryꢀlowꢀon-resistanceꢀRDS(on)  
2
1
•ꢀAvalancheꢀrated  
3
•ꢀPb-freeꢀplating;ꢀRoHSꢀcompliant  
•ꢀHalogen-freeꢀaccordingꢀtoꢀIEC61249-2-21  
Drain  
Pin 2, Tab  
Tableꢀ1ꢀꢀꢀꢀꢀKeyꢀPerformanceꢀParameters  
Parameter  
Value  
Unit  
Gate  
Pin 1  
VDS  
30  
V
Source  
Pin 3  
RDS(on),max  
ID  
7.5  
mΩ  
A
50  
Typeꢀ/ꢀOrderingꢀCode  
Package  
Marking  
RelatedꢀLinks  
IPD075N03L G  
PG-TO252-3  
075N03L  
-
1) J-STD20 and JESD22  
Final Data Sheet  
1
Rev.ꢀ2.2,ꢀꢀ2020-09-14  
OptiMOSª3ꢀPower-Transistor,ꢀ30ꢀV  
IPD075N03LꢀG  
TableꢀofꢀContents  
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3  
Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3  
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4  
Electrical characteristics diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6  
Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10  
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11  
Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11  
Disclaimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11  
Final Data Sheet  
2
Rev.ꢀ2.2,ꢀꢀ2020-09-14  
OptiMOSª3ꢀPower-Transistor,ꢀ30ꢀV  
IPD075N03LꢀG  
1ꢀꢀꢀꢀꢀMaximumꢀratings  
atꢀTA=25ꢀ°C,ꢀunlessꢀotherwiseꢀspecified  
Tableꢀ2ꢀꢀꢀꢀꢀMaximumꢀratings  
Values  
Typ.  
Parameter  
Symbol  
Unit Noteꢀ/ꢀTestꢀCondition  
Min.  
Max.  
-
-
-
-
-
-
-
-
50  
43  
49  
35  
VGS=10ꢀV,ꢀTC=25ꢀ°C  
VGS=10ꢀV,ꢀTC=100ꢀ°C  
VGS=4.5ꢀV,ꢀTC=25ꢀ°C  
VGS=4.5ꢀV,ꢀTC=100ꢀ°C  
Continuous drain current  
ID  
A
Pulsed drain current1)  
ID,pulse  
IAS  
-
-
-
-
-
-
350  
50  
50  
20  
47  
A
TC=25ꢀ°C  
TC=25ꢀ°C  
ID=12ꢀA,ꢀRGS=25ꢀΩ  
-
Avalanche current, single pulse2)  
Avalanche energy, single pulse  
Gate source voltage  
-
A
EAS  
VGS  
Ptot  
-
mJ  
V
-20  
-
Power dissipation  
W
TC=25ꢀ°C  
IEC climatic category;  
DIN IEC 68-1: 55/175/56  
Operating and storage temperature  
Tj,ꢀTstg  
-55  
-
175  
°C  
2ꢀꢀꢀꢀꢀThermalꢀcharacteristics  
Tableꢀ3ꢀꢀꢀꢀꢀThermalꢀcharacteristics  
Values  
Typ.  
-
Parameter  
Symbol  
Unit Noteꢀ/ꢀTestꢀCondition  
Min.  
Max.  
Thermal resistance, junction - case  
RthJC  
RthJA  
-
3.2  
K/W  
K/W  
-
-
SMD version, device on PCB,  
minimal footprint  
-
-
-
-
75  
50  
SMD version, device on PCB,  
6 cm² cooling area3)  
RthJA  
K/W  
-
1) See figure 3 for more detailed information  
2) See figure 13 for more detailed information  
3) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain connection.  
PCB is vertical in still air.  
Final Data Sheet  
3
Rev.ꢀ2.2,ꢀꢀ2020-09-14  
OptiMOSª3ꢀPower-Transistor,ꢀ30ꢀV  
IPD075N03LꢀG  
3ꢀꢀꢀꢀꢀElectricalꢀcharacteristics  
atꢀTj=25ꢀ°C,ꢀunlessꢀotherwiseꢀspecified  
Tableꢀ4ꢀꢀꢀꢀꢀStaticꢀcharacteristics  
Values  
Parameter  
Symbol  
Unit Noteꢀ/ꢀTestꢀCondition  
Min.  
30  
1
Typ.  
Max.  
-
Drain-source breakdown voltage  
Gate threshold voltage  
V(BR)DSS  
VGS(th)  
-
-
V
V
VGS=0ꢀV,ꢀID=1ꢀmA  
2.2  
VDS=VGS,ꢀID=250ꢀµA  
-
-
0.1  
10  
1
100  
VDS=30ꢀV,ꢀVGS=0ꢀV,ꢀTj=25ꢀ°C  
VDS=30ꢀV,ꢀVGS=0ꢀV,ꢀTj=125ꢀ°C  
Zero gate voltage drain current  
Gate-source leakage current  
Drain-source on-state resistance1)  
IDSS  
µA  
nA  
IGSS  
-
10  
100  
VGS=20ꢀV,ꢀVDS=0ꢀV  
-
-
9.1  
6.3  
11.4  
7.5  
VGS=4.5ꢀV,ꢀID=30ꢀA  
VGS=10ꢀV,ꢀID=30ꢀA  
RDS(on)  
mΩ  
Gate resistance  
RG  
gfs  
-
1.3  
61  
-
-
Ω
-
Transconductance  
30  
S
|VDS|>2|ID|RDS(on)max,ꢀID=30ꢀA  
Tableꢀ5ꢀꢀꢀꢀꢀDynamicꢀcharacteristics  
Values  
Typ.  
Parameter  
Symbol  
Unit Noteꢀ/ꢀTestꢀCondition  
Min.  
Max.  
Input capacitance2)  
Output capacitance2)  
Reverse transfer capacitance2)  
Ciss  
Coss  
Crss  
-
-
-
1400 1900 pF  
VGS=0ꢀV,ꢀVDS=15ꢀV,ꢀf=1ꢀMHz  
VGS=0ꢀV,ꢀVDS=15ꢀV,ꢀf=1ꢀMHz  
VGS=0ꢀV,ꢀVDS=15ꢀV,ꢀf=1ꢀMHz  
580  
29  
770  
44  
pF  
pF  
VDD=15ꢀV,ꢀVGS=10ꢀV,ꢀID=30ꢀA,  
RG=1.6ꢀΩ  
Turn-on delay time  
Rise time  
td(on)  
tr  
td(off)  
tf  
-
-
-
-
4.3  
3.6  
17  
-
-
-
-
ns  
ns  
ns  
ns  
VDD=15ꢀV,ꢀVGS=10ꢀV,ꢀID=30ꢀA,  
RG=1.6ꢀΩ  
VDD=15ꢀV,ꢀVGS=10ꢀV,ꢀID=30ꢀA,  
RG=1.6ꢀΩ  
Turn-off delay time  
Fall time  
VDD=15ꢀV,ꢀVGS=10ꢀV,ꢀID=30ꢀA,  
RG=1.6ꢀΩ  
2.8  
Tableꢀ6ꢀꢀꢀꢀꢀGateꢀchargeꢀcharacteristics3)ꢀ  
Values  
Typ.  
4.6  
Parameter  
Symbol  
Unit Noteꢀ/ꢀTestꢀCondition  
Min.  
Max.  
Gate to source charge  
Gate charge at threshold  
Gate to drain charge  
Switching charge  
Qgs  
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
nC  
nC  
nC  
nC  
nC  
V
VDD=15ꢀV,ꢀID=30ꢀA,ꢀVGS=0ꢀtoꢀ4.5ꢀV  
VDD=15ꢀV,ꢀID=30ꢀA,ꢀVGS=0ꢀtoꢀ4.5ꢀV  
VDD=15ꢀV,ꢀID=30ꢀA,ꢀVGS=0ꢀtoꢀ4.5ꢀV  
VDD=15ꢀV,ꢀID=30ꢀA,ꢀVGS=0ꢀtoꢀ4.5ꢀV  
VDD=15ꢀV,ꢀID=30ꢀA,ꢀVGS=0ꢀtoꢀ4.5ꢀV  
VDD=15ꢀV,ꢀID=30ꢀA,ꢀVGS=0ꢀtoꢀ4.5ꢀV  
VDD=15ꢀV,ꢀID=30ꢀA,ꢀVGS=0ꢀtoꢀ10ꢀV  
VDS=0.1ꢀV,ꢀVGS=0ꢀtoꢀ4.5ꢀV  
Qg(th)  
Qgd  
2.2  
2.1  
Qsw  
4.4  
Gate charge total  
Qg  
8.7  
Gate plateau voltage  
Gate charge total  
Vplateau  
Qg  
3.3  
18  
-
Gate charge total, sync. FET  
Output charge  
Qg(sync)  
Qoss  
7.6  
nC  
-
15  
VDD=15ꢀV,ꢀVGS=0ꢀV  
1) Measured from drain tab to source pin  
2) Defined by design. Not subject to production test  
3) See ″Gate charge waveforms″ for parameter definition  
Final Data Sheet  
4
Rev.ꢀ2.2,ꢀꢀ2020-09-14  
OptiMOSª3ꢀPower-Transistor,ꢀ30ꢀV  
IPD075N03LꢀG  
Tableꢀ7ꢀꢀꢀꢀꢀReverseꢀdiode  
Values  
Parameter  
Symbol  
Unit Noteꢀ/ꢀTestꢀCondition  
Min.  
Typ.  
Max.  
42  
Diode continuous forward current  
Diode pulse current  
IS  
-
-
-
-
-
A
TC=25ꢀ°C  
IS,pulse  
VSD  
Qrr  
-
350  
1.1  
10  
A
TC=25ꢀ°C  
Diode forward voltage  
Reverse recovery charge1)  
0.89  
-
V
VGS=0ꢀV,ꢀIF=30ꢀA,ꢀTj=25ꢀ°C  
VR=15ꢀV,ꢀIF=IS,ꢀdiF/dt=400ꢀA/µs  
nC  
1) Defined by design. Not subject to production test  
Final Data Sheet  
5
Rev.ꢀ2.2,ꢀꢀ2020-09-14  
OptiMOSª3ꢀPower-Transistor,ꢀ30ꢀV  
IPD075N03LꢀG  
4ꢀꢀꢀꢀꢀElectricalꢀcharacteristicsꢀdiagrams  
Diagramꢀ1:ꢀPowerꢀdissipation  
Diagramꢀ2:ꢀDrainꢀcurrent  
50  
60  
50  
40  
30  
20  
10  
0
40  
30  
20  
10  
0
0
50  
100  
150  
200  
0
50  
100  
150  
200  
TCꢀ[°C]  
TCꢀ[°C]  
Ptot=f(TC)  
ID=f(TC);ꢀVGS≥10ꢀV  
Diagramꢀ3:ꢀSafeꢀoperatingꢀarea  
Diagramꢀ4:ꢀMax.ꢀtransientꢀthermalꢀimpedance  
103  
101  
1 µs  
102  
0.5  
10 µs  
100 µs  
100  
0.2  
DC  
0.1  
101  
0.05  
0.02  
1 ms  
10-1  
0.01  
10 ms  
100  
single pulse  
10-1  
10-2  
10-1  
100  
101  
102  
10-6  
10-5  
10-4  
10-3  
10-2  
10-1  
100  
VDSꢀ[V]  
tpꢀ[s]  
ID=f(VDS);ꢀTC=25ꢀ°C;ꢀD=0;ꢀparameter:ꢀtp  
ZthJC=f(tp);ꢀparameter:ꢀD=tp/T  
Final Data Sheet  
6
Rev.ꢀ2.2,ꢀꢀ2020-09-14  
OptiMOSª3ꢀPower-Transistor,ꢀ30ꢀV  
IPD075N03LꢀG  
Diagramꢀ5:ꢀTyp.ꢀoutputꢀcharacteristics  
Diagramꢀ6:ꢀTyp.ꢀdrain-sourceꢀonꢀresistance  
120  
20  
5 V  
4.5 V  
3.2 V  
100  
80  
60  
40  
20  
0
16  
10 V  
3.5 V  
4 V  
12  
8
4 V  
4.5 V  
5 V  
10 V  
3.5 V  
3.2 V  
11.5 V  
4
3 V  
2.8 V  
0
0
1
2
3
0
20  
40  
60  
80  
100  
VDSꢀ[V]  
IDꢀ[A]  
ID=f(VDS);ꢀTj=25ꢀ°C;ꢀparameter:ꢀVGS  
RDS(on)=f(ID);ꢀTj=25ꢀ°C;ꢀparameter:ꢀVGS  
Diagramꢀ7:ꢀTyp.ꢀtransferꢀcharacteristics  
Diagramꢀ8:ꢀTyp.ꢀforwardꢀtransconductance  
100  
100  
80  
60  
40  
80  
60  
40  
20  
0
20  
175 °C  
25 °C  
0
0
1
2
3
4
5
0
20  
40  
60  
80  
100  
VGSꢀ[V]  
IDꢀ[A]  
ID=f(VGS);ꢀ|VDS|>2|ID|RDS(on)max;ꢀparameter:ꢀTj  
gfs=f(ID);ꢀTj=25ꢀ°C  
Final Data Sheet  
7
Rev.ꢀ2.2,ꢀꢀ2020-09-14  
OptiMOSª3ꢀPower-Transistor,ꢀ30ꢀV  
IPD075N03LꢀG  
Diagramꢀ9:ꢀDrain-sourceꢀon-stateꢀresistance  
Diagramꢀ10:ꢀTyp.ꢀgateꢀthresholdꢀvoltage  
16  
2.5  
14  
12  
10  
2.0  
1.5  
1.0  
0.5  
0.0  
98 %  
8
typ  
6
4
2
0
-60  
-20  
20  
60  
100  
140  
180  
-60  
-20  
20  
60  
100  
140  
180  
Tjꢀ[°C]  
Tjꢀ[°C]  
RDS(on)=f(Tj);ꢀID=30ꢀA;ꢀVGS=10ꢀV  
VGS(th)=f(Tj);ꢀVGS=VDS;ꢀID=250ꢀµA  
Diagramꢀ11:ꢀTyp.ꢀcapacitances  
Diagramꢀ12:ꢀForwardꢀcharacteristicsꢀofꢀreverseꢀdiode  
104  
103  
25 °C  
25 °C, max  
175 °C  
175 °C, max  
103  
102  
101  
100  
Ciss  
102  
101  
100  
Coss  
Crss  
0
10  
20  
30  
0.0  
0.5  
1.0  
1.5  
2.0  
VDSꢀ[V]  
VSDꢀ[V]  
C=f(VDS);ꢀVGS=0ꢀV;ꢀf=1ꢀMHz  
IF=f(VSD);ꢀparameter:ꢀTj  
Final Data Sheet  
8
Rev.ꢀ2.2,ꢀꢀ2020-09-14  
OptiMOSª3ꢀPower-Transistor,ꢀ30ꢀV  
IPD075N03LꢀG  
Diagramꢀ13:ꢀAvalancheꢀcharacteristics  
Diagramꢀ14:ꢀTyp.ꢀgateꢀcharge  
102  
12  
15 V  
24 V  
6 V  
10  
8
25 °C  
150 °C  
100 °C  
101  
6
4
2
100  
10-1  
0
100  
101  
102  
103  
0
4
8
12  
16  
20  
24  
tAVꢀ[µs]  
Qgateꢀ[nC]  
IAS=f(tAV);ꢀRGS=25ꢀΩ;ꢀparameter:ꢀTj(start)  
VGS=f(Qgate);ꢀID=30ꢀAꢀpulsed;ꢀparameter:ꢀVDD  
Diagramꢀ15:ꢀDrain-sourceꢀbreakdownꢀvoltage  
Diagram Gate charge waveforms  
34  
32  
30  
28  
26  
24  
22  
20  
-60  
-20  
20  
60  
100  
140  
180  
Tjꢀ[°C]  
VBR(DSS)=f(Tj);ꢀID=1ꢀmA  
Final Data Sheet  
9
Rev.ꢀ2.2,ꢀꢀ2020-09-14  
OptiMOSª3ꢀPower-Transistor,ꢀ30ꢀV  
IPD075N03LꢀG  
5ꢀꢀꢀꢀꢀPackageꢀOutlines  
MILLIMETERS  
DIMENSION  
MIN.  
2.16  
0.00  
0.64  
0.65  
4,95  
0.46  
0.40  
5.97  
5.02  
6.35  
4.32  
MAX.  
2.41  
0.15  
0.89  
1.15  
5.50  
0.61  
0.98  
6.22  
5.84  
6.73  
5.50  
DOCUMENT NO.  
Z8B00003328  
A
A1  
b
REVISION  
07  
b2  
b3  
c
SCALE:  
10:1  
c2  
D
2mm  
0
1
D1  
E
EUROPEAN PROJECTION  
E1  
e
2.29  
4.57  
3
e1  
N
H
9.40  
1.18  
0.89  
0.51  
10.48  
1.78  
1.27  
1.02  
L
ISSUE DATE  
01.04.2020  
L3  
L4  
Figureꢀ1ꢀꢀꢀꢀꢀOutlineꢀPG-TO252-3,ꢀdimensionsꢀinꢀmm  
Final Data Sheet  
10  
Rev.ꢀ2.2,ꢀꢀ2020-09-14  
OptiMOSª3ꢀPower-Transistor,ꢀ30ꢀV  
IPD075N03LꢀG  
RevisionꢀHistory  
IPD075N03L G  
Revision:ꢀ2020-09-14,ꢀRev.ꢀ2.2  
Previous Revision  
Revision Date  
Subjects (major changes since last revision)  
Update POD  
2.2  
2020-09-14  
Trademarks  
Allꢀreferencedꢀproductꢀorꢀserviceꢀnamesꢀandꢀtrademarksꢀareꢀtheꢀpropertyꢀofꢀtheirꢀrespectiveꢀowners.  
WeꢀListenꢀtoꢀYourꢀComments  
Anyꢀinformationꢀwithinꢀthisꢀdocumentꢀthatꢀyouꢀfeelꢀisꢀwrong,ꢀunclearꢀorꢀmissingꢀatꢀall?ꢀYourꢀfeedbackꢀwillꢀhelpꢀusꢀtoꢀcontinuously  
improveꢀtheꢀqualityꢀofꢀthisꢀdocument.ꢀPleaseꢀsendꢀyourꢀproposalꢀ(includingꢀaꢀreferenceꢀtoꢀthisꢀdocument)ꢀto:  
erratum@infineon.com  
Publishedꢀby  
InfineonꢀTechnologiesꢀAG  
81726ꢀMünchen,ꢀGermany  
©ꢀ2020ꢀInfineonꢀTechnologiesꢀAG  
AllꢀRightsꢀReserved.  
LegalꢀDisclaimer  
Theꢀinformationꢀgivenꢀinꢀthisꢀdocumentꢀshallꢀinꢀnoꢀeventꢀbeꢀregardedꢀasꢀaꢀguaranteeꢀofꢀconditionsꢀorꢀcharacteristicsꢀ  
(“Beschaffenheitsgarantie”)ꢀ.  
Withꢀrespectꢀtoꢀanyꢀexamples,ꢀhintsꢀorꢀanyꢀtypicalꢀvaluesꢀstatedꢀhereinꢀand/orꢀanyꢀinformationꢀregardingꢀtheꢀapplicationꢀofꢀthe  
product,ꢀInfineonꢀTechnologiesꢀherebyꢀdisclaimsꢀanyꢀandꢀallꢀwarrantiesꢀandꢀliabilitiesꢀofꢀanyꢀkind,ꢀincludingꢀwithoutꢀlimitation  
warrantiesꢀofꢀnon-infringementꢀofꢀintellectualꢀpropertyꢀrightsꢀofꢀanyꢀthirdꢀparty.  
Inꢀaddition,ꢀanyꢀinformationꢀgivenꢀinꢀthisꢀdocumentꢀisꢀsubjectꢀtoꢀcustomer’sꢀcomplianceꢀwithꢀitsꢀobligationsꢀstatedꢀinꢀthis  
documentꢀandꢀanyꢀapplicableꢀlegalꢀrequirements,ꢀnormsꢀandꢀstandardsꢀconcerningꢀcustomer’sꢀproductsꢀandꢀanyꢀuseꢀofꢀthe  
productꢀofꢀInfineonꢀTechnologiesꢀinꢀcustomer’sꢀapplications.  
Theꢀdataꢀcontainedꢀinꢀthisꢀdocumentꢀisꢀexclusivelyꢀintendedꢀforꢀtechnicallyꢀtrainedꢀstaff.ꢀItꢀisꢀtheꢀresponsibilityꢀofꢀcustomer’s  
technicalꢀdepartmentsꢀtoꢀevaluateꢀtheꢀsuitabilityꢀofꢀtheꢀproductꢀforꢀtheꢀintendedꢀapplicationꢀandꢀtheꢀcompletenessꢀofꢀtheꢀproduct  
informationꢀgivenꢀinꢀthisꢀdocumentꢀwithꢀrespectꢀtoꢀsuchꢀapplication.  
Information  
Forꢀfurtherꢀinformationꢀonꢀtechnology,ꢀdeliveryꢀtermsꢀandꢀconditionsꢀandꢀpricesꢀpleaseꢀcontactꢀyourꢀnearestꢀInfineon  
TechnologiesꢀOfficeꢀ(www.infineon.com).  
Warnings  
Dueꢀtoꢀtechnicalꢀrequirements,ꢀcomponentsꢀmayꢀcontainꢀdangerousꢀsubstances.ꢀForꢀinformationꢀonꢀtheꢀtypesꢀinꢀquestion,  
pleaseꢀcontactꢀtheꢀnearestꢀInfineonꢀTechnologiesꢀOffice.  
TheꢀInfineonꢀTechnologiesꢀcomponentꢀdescribedꢀinꢀthisꢀDataꢀSheetꢀmayꢀbeꢀusedꢀinꢀlife-supportꢀdevicesꢀorꢀsystemsꢀand/or  
automotive,ꢀaviationꢀandꢀaerospaceꢀapplicationsꢀorꢀsystemsꢀonlyꢀwithꢀtheꢀexpressꢀwrittenꢀapprovalꢀofꢀInfineonꢀTechnologies,ꢀifꢀa  
failureꢀofꢀsuchꢀcomponentsꢀcanꢀreasonablyꢀbeꢀexpectedꢀtoꢀcauseꢀtheꢀfailureꢀofꢀthatꢀlife-support,ꢀautomotive,ꢀaviationꢀand  
aerospaceꢀdeviceꢀorꢀsystemꢀorꢀtoꢀaffectꢀtheꢀsafetyꢀorꢀeffectivenessꢀofꢀthatꢀdeviceꢀorꢀsystem.ꢀLifeꢀsupportꢀdevicesꢀorꢀsystemsꢀare  
intendedꢀtoꢀbeꢀimplantedꢀinꢀtheꢀhumanꢀbodyꢀorꢀtoꢀsupportꢀand/orꢀmaintainꢀandꢀsustainꢀand/orꢀprotectꢀhumanꢀlife.ꢀIfꢀtheyꢀfail,ꢀitꢀis  
reasonableꢀtoꢀassumeꢀthatꢀtheꢀhealthꢀofꢀtheꢀuserꢀorꢀotherꢀpersonsꢀmayꢀbeꢀendangered.  
Final Data Sheet  
11  
Rev.ꢀ2.2,ꢀꢀ2020-09-14  

相关型号：

IPD075N03LG

 OptiMOS Power-Transistor Feature Enhancement mode Logic Level Avalanche rated
INFINEON

IPD075N03LGATMA1

 Power Field-Effect Transistor, 50A I(D), 30V, 0.0114ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-252, GREEN, PLASTIC PACKAGE-3
INFINEON

IPD075N03LGHF

 Power Field-Effect Transistor, 50A I(D), 30V, 0.0114ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-252, GREEN, PLASTIC PACKAGE-3
INFINEON

IPD075N03LGXT

 Power Field-Effect Transistor, 50A I(D), 30V, 0.0114ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-252, GREEN, PLASTIC PACKAGE-3
INFINEON

IPD075N03LG_10

 OptiMOS3 Power-Transistor
INFINEON

IPD079N06L3G

 OptiMOS(TM)3 Power-Transistor
INFINEON

IPD079N06L3GBTMA1

 Power Field-Effect Transistor, 50A I(D), 60V, 0.0079ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-252AA, GREEN, PLASTIC, TO-252, 3 PIN
INFINEON

IPD07N03L

 OptiMOS Buck converter series
INFINEON

IPD082N10N3 G

 英飞凌的 100V OptiMOS™ 功率 MOSFET 可以为高效率、高功率密度的 SMPS 提供卓越的解决方案。与下一代出色技术相比，该系列在 R Ds（on）和 FOM（品质因数）方面均降低了30％。
INFINEON

IPD082N10N3G

 OptiMOS?3 Power-Transistor Features Excellent gate charge x R DS(on) product (FOM)
INFINEON

IPD082N10N3GATMA1

 Power Field-Effect Transistor, 80A I(D), 100V, 0.0082ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-252, GREEN, PLASTIC, DPAK-3
INFINEON

IPD082N10N3GBTMA1

 Power Field-Effect Transistor, 80A I(D), 100V, 0.0082ohm, 1-Element, N-Channel, Silicon, Metal-Oxide Semiconductor FET, TO-252, GREEN, PLASTIC, DPAK-3
INFINEON
©2020 ICPDF网 联系我们和版权申明