IPF05N03LBG [INFINEON]

Power Field-Effect Transistor, 90A I(D), 30V, 0.0048ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-252, ROHS COMPLIANT, PLASTIC, TO-252, 3 PIN;
IPF05N03LBG
型号: IPF05N03LBG
厂家: Infineon    Infineon
描述:

Power Field-Effect Transistor, 90A I(D), 30V, 0.0048ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-252, ROHS COMPLIANT, PLASTIC, TO-252, 3 PIN

开关 脉冲 晶体管
文件: 总11页 (文件大小:393K)
中文:  中文翻译
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IPD05N03LB G  
IPU05N03LB G  
IPS05N03LB G  
IPF05N03LB G  
OptiMOS®2 Power-Transistor  
Product Summary  
Features  
V DS  
30  
4.8  
90  
V
• Ideal for high-frequency dc/dc converters  
• Qualified according to JEDEC1) for target applications  
R DS(on),max  
I D  
m  
A
• N-channel, logic level  
• Excellent gate charge x R DS(on) product (FOM)  
• Superior thermal resistance  
• 175 °C operating temperature  
Type  
IPD05N03LB G  
IPS05N03LB G  
IPF05N03LB G  
IPU05N03LB G  
Package  
PG-TO252-3-11  
Q67042-S4262  
05N03LB  
PG-TO251-3-11  
On request  
05N03LB  
PG-TO252-3-23  
On request  
05N03LB  
PG-TO251-3-1  
On request  
05N03LB  
Ordering Code  
Marking  
Maximum ratings, at T j=25 °C, unless otherwise specified  
Value  
Parameter  
Symbol Conditions  
Unit  
T C=25 °C2)  
I D  
Continuous drain current  
90  
74  
A
T C=100 °C  
T C=25 °C3)  
I D,pulse  
Pulsed drain current  
420  
120  
E AS  
I D=90 A, R GS=25 Ω  
Avalanche energy, single pulse  
mJ  
I D=90 A, V DS=20 V,  
di /dt =200 A/µs,  
Reverse diode dv /dt  
dv /dt  
6
kV/µs  
T
j,max=175 °C  
Gate source voltage4)  
V GS  
±20  
94  
V
P tot  
T C=25 °C  
Power dissipation  
W
°C  
T j, T stg  
Operating and storage temperature  
IEC climatic category; DIN IEC 68-1  
-55 ... 175  
55/175/56  
Rev. 1.3  
page 1  
2005-07-18  
IPD05N03LB G  
IPU05N03LB G  
IPS05N03LB G  
IPF05N03LB G  
Values  
Parameter  
Symbol Conditions  
Unit  
min.  
typ.  
max.  
Thermal characteristics  
R thJC  
Thermal resistance, junction - case  
SMD version, device on PCB  
-
-
-
-
-
-
1.6  
75  
50  
K/W  
R thJA  
minimal footprint  
6 cm2 cooling area5)  
Electrical characteristics, at T j=25 °C, unless otherwise specified  
Static characteristics  
V (BR)DSS  
V GS(th)  
V
V
GS=0 V, I D=1 mA  
DS=V GS, I D=40 µA  
Drain-source breakdown voltage  
Gate threshold voltage  
30  
-
-
V
1.2  
1.6  
2
V
DS=30 V, V GS=0 V,  
I DSS  
Zero gate voltage drain current  
-
-
0.1  
10  
1
µA  
T j=25 °C  
V
DS=30 V, V GS=0 V,  
100  
T j=125 °C  
I GSS  
V
V
V
GS=20 V, V DS=0 V  
GS=4.5 V, I D=50 A  
GS=4.5 V, I D=50 A,  
Gate-source leakage current  
-
-
10  
100 nA  
R DS(on)  
Drain-source on-state resistance  
6.0  
7.7  
7.5  
5.0  
mΩ  
-
-
5.8  
4.1  
SMD version  
V
GS=10 V, I D=60 A  
V
GS=10 V, I D=60 A,  
-
-
3.9  
1
4.8  
SMD version  
R G  
g fs  
Gate resistance  
-
-
|V DS|>2|I D|R DS(on)max  
I D=60 A  
,
Transconductance  
48  
96  
S
1) J-STD20 and JESD22  
1) Current is limited by bondwire; with anR thJC=1.6 K/W the chip is able to carry 104 A.  
3) See figure 3  
4) T j,max=150 °C and duty cycle D <0.25 for V GS<-5 V  
5) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm (one layer, 70 µm thick) copper area for drain  
connection. PCB is vertical in still air.  
2
Rev. 1.3  
page 2  
2005-07-18  
IPD05N03LB G  
IPU05N03LB G  
IPS05N03LB G  
IPF05N03LB G  
Values  
Parameter  
Symbol Conditions  
Unit  
min.  
typ.  
max.  
Dynamic characteristics  
Input capacitance  
C iss  
-
-
-
-
-
-
-
2400  
860  
110  
9
3200 pF  
1100  
V
GS=0 V, V DS=15 V,  
C oss  
Crss  
t d(on)  
t r  
Output capacitance  
f =1 MHz  
Reverse transfer capacitance  
160  
14  
10  
42  
7
ns  
Rise time  
7
V
DD=15 V, V GS=10 V,  
I D=45 A, R G=2.7 Ω  
t d(off)  
t f  
Turn-off delay time  
Fall time  
28  
4.6  
Gate Charge Characteristics6)  
Gate to source charge  
Gate charge at threshold  
Gate to drain charge  
Switching charge  
Q gs  
Q g(th)  
Q gd  
Q sw  
Q g  
-
-
-
-
-
8
11  
5.1  
8
nC  
3.9  
5.1  
9
V
V
DD=15 V, I D=45 A,  
GS=0 to 5 V  
13  
25  
Gate charge total  
19  
V plateau  
Gate plateau voltage  
-
3.3  
-
V
V
V
DS=0.1 V,  
Q g(sync)  
Q oss  
Gate charge total, sync. FET  
Output charge  
-
-
16  
19  
22  
26  
nC  
GS=0 to 5 V  
V
DD=15 V, V GS=0 V  
Reverse Diode  
I S  
Diode continous forward current  
Diode pulse current  
-
-
-
-
78  
A
T C=25 °C  
I S,pulse  
420  
V
GS=0 V, I F=78.125 A,  
V SD  
Q rr  
Diode forward voltage  
-
-
0.93  
-
1.2  
15  
V
T j=25 °C  
V R=15 V, I F=I S,  
di F/dt =400 A/µs  
Reverse recovery charge  
nC  
6) See figure 16 for gate charge parameter definition  
Rev. 1.3  
page 3  
2005-07-18  
IPD05N03LB G  
IPU05N03LB G  
IPS05N03LB G  
IPF05N03LB G  
1 Power dissipation  
2 Drain current  
P
tot=f(T C)  
120  
100  
80  
I D=f(T C); V GS10 V  
100  
80  
60  
40  
20  
0
60  
40  
20  
0
0
50  
100  
150  
200  
0
50  
100  
150  
200  
T
C [°C]  
T
C [°C]  
3 Safe operating area  
I D=f(V DS); T C=25 °C; D =0  
parameter: t p  
4 Max. transient thermal impedance  
thJC=f(t p)  
Z
parameter: D =t p/T  
1000  
10  
limited by on-state  
resistance  
1 µs  
0.5  
1
10 µs  
100  
100 µs  
0.2  
0.1  
DC  
0.05  
0.1  
1 ms  
0.02  
single pulse  
0.01  
10  
10 ms  
0.01  
1
0
0
0
0
0
0
1
0.001  
0.1  
1
10  
100  
10-6  
10-5  
10-4  
10-3  
p [s]  
10-2  
10-1  
100  
V
DS [V]  
t
Rev. 1.3  
page 4  
2005-07-18  
IPD05N03LB G  
IPU05N03LB G  
IPS05N03LB G  
IPF05N03LB G  
5 Typ. output characteristics  
I D=f(V DS); T j=25 °C  
6 Typ. drain-source on resistance  
R
DS(on)=f(I D); T j=25 °C  
parameter: V GS  
parameter: V GS  
200  
180  
12  
3.2 V  
3.5 V  
4.5 V  
3.8 V  
10  
8
10 V  
160  
140  
120  
100  
80  
4.1 V  
4.5 V  
4.1 V  
6
3.8 V  
4
10 V  
60  
3.5 V  
3.2 V  
40  
2
20  
3 V  
2.8 V  
0
0
0
1
2
3
0
20  
40  
60  
80  
100  
V
DS [V]  
I
D [A]  
7 Typ. transfer characteristics  
I D=f(V GS); |V DS|>2|I D|R DS(on)max  
parameter: T j  
8 Typ. forward transconductance  
g fs=f(I D); T j=25 °C  
100  
100  
90  
80  
70  
60  
50  
40  
30  
20  
10  
0
80  
60  
40  
20  
175 °C  
25 °C  
0
0
1
2
3
4
5
0
10  
20  
30  
40  
50  
60  
V
GS [V]  
I
D [A]  
Rev. 1.3  
page 5  
2005-07-18  
IPD05N03LB G  
IPU05N03LB G  
IPS05N03LB G  
IPF05N03LB G  
9 Drain-source on-state resistance  
10 Typ. gate threshold voltage  
R
DS(on)=f(T j); I D=60 A; V GS=10 V  
V GS(th)=f(T j); V GS=V DS  
parameter: I D  
10  
9
2.5  
8
2
1.5  
1
7
400 µA  
6
98 %  
40 µA  
5
typ  
4
3
2
1
0
0.5  
0
-60  
-20  
20  
60  
100  
140  
180  
-60  
-20  
20  
60  
T j [°C]  
100  
140  
180  
T j [°C]  
11 Typ. capacitances  
12 Forward characteristics of reverse diode  
I F=f(V SD  
C =f(V DS); V GS=0 V; f =1 MHz  
)
parameter: T j  
10000  
1000  
25 °C, 98%  
Ciss  
175 °C, 98%  
Coss  
25 °C  
1000  
100  
10  
175 °C  
Crss  
100  
10  
1
0
5
10  
15  
20  
25  
30  
0.0  
0.5  
1.0  
1.5  
2.0  
V
DS [V]  
V
SD [V]  
Rev. 1.3  
page 6  
2005-07-18  
IPD05N03LB G  
IPU05N03LB G  
IPS05N03LB G  
IPF05N03LB G  
13 Avalanche characteristics  
AS=f(t AV); R GS=25 Ω  
14 Typ. gate charge  
GS=f(Q gate); I D=45 A pulsed  
V
I
parameter: Tj(start)  
parameter: V DD  
100  
12  
25 °C  
15 V  
100 °C  
10  
8
6 V  
24 V  
150 °C  
10  
6
4
2
1
1
0
0
10  
100  
1000  
20  
40  
t
AV [µs]  
Q
gate [nC]  
15 Drain-source breakdown voltage  
16 Gate charge waveforms  
V
BR(DSS)=f(T j); I D=1 mA  
38  
36  
34  
32  
30  
28  
26  
24  
22  
20  
V GS  
Q g  
V gs(th)  
Q g(th)  
Q sw  
Q gd  
Q gate  
Q gs  
-60  
-20  
20  
60  
100  
140  
180  
T j [°C]  
Rev. 1.3  
page 7  
2005-07-18  
IPD05N03LB G  
IPU05N03LB G  
IPS05N03LB G  
IPF05N03LB G  
Package Outline  
PG-TO252-3-11: Outline  
Footprint:  
Packaging:  
Dimensions in mm  
Rev. 1.3  
page 8  
2005-07-18  
IPD05N03LB G  
IPU05N03LB G  
IPS05N03LB G  
IPF05N03LB G  
Package Outline  
PG-TO252-3-23: Outline  
Footprint:  
Dimensions in mm  
Rev. 1.3  
page 9  
2005-07-18  
IPD05N03LB G  
IPU05N03LB G  
IPS05N03LB G  
IPF05N03LB G  
Package Outline  
PG-TO251-3-11: Outline  
PG-TO-251-3-1: Outline  
Dimensions in mm  
Rev. 1.3  
page 10  
2005-07-18  
IPD05N03LB G  
IPU05N03LB G  
IPS05N03LB G  
IPF05N03LB G  
Published by  
Infineon Technologies AG  
Bereich Kommunikation  
St.-Martin-Straße 53  
D-81541 München  
© Infineon Technologies AG 1999  
All Rights Reserved.  
Attention please!  
The information herein is given to describe certain components and shall not be considered as  
warranted characteristics.  
Terms of delivery and rights to technical change reserved.  
We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement,  
regarding circuits, descriptions and charts stated herein.  
Infineon Technologies is an approved CECC manufacturer.  
Information  
For further information on technology, delivery terms and conditions and prices, please contact your  
nearest Infineon Technologies office in Germany or our Infineon Technologies representatives worldwide  
(see address list).  
Warnings  
Due to technical requirements, components may contain dangerous substances.  
For information on the types in question, please contact your nearest Infineon Technologies office.  
Infineon Technologies' components may only be used in life-support devices or systems with the  
expressed written approval of Infineon Technologies if a failure of such components can reasonably  
be expected to cause the failure of that life-support device or system, or to affect the safety or  
effectiveness of that device or system. Life support devices or systems are intended to be implanted  
in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail,  
it is reasonable to assume that the health of the user or other persons may be endangered.  
Rev. 1.3  
page 11  
2005-07-18  

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