IPP14N03LA [INFINEON]
OptiMOS 2 Power-Transistor; 的OptiMOS 2功率三极管
| 型号： | IPP14N03LA |
| 厂家： | 
Infineon |
| 描述： | OptiMOS 2 Power-Transistor |
| 文件： | 总10页 (文件大小：347K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
IPB14N03LA
IPI14N03LA, IPP14N03LA
OptiMOS®2 Power-Transistor
Product Summary
Features
V DS
25
V
• Ideal for high-frequency dc/dc converters
• N-channel
R DS(on),max (SMD version)
13.6
30
mΩ
A
I D
• Logic level
• Excellent gate charge x R DS(on) product (FOM)
• Very low on-resistance R DS(on)
P-TO263-3-2
P-TO262-3-1
P-TO220-3-1
• Superior thermal resistance
• 175 °C operating temperature
• dv /dt rated
Type
Package
Ordering Code Marking
IPB14N03LA
IPI14N03LA
IPP14N03LA
P-TO263-3-2
P-TO262-3-1
P-TO220-3-1
Q67042-S4156
Q67042-S4157
Q67042-S4158
14N03LA
14N03LA
14N03LA
Maximum ratings, at T j=25 °C, unless otherwise specified
Value
Parameter
Symbol Conditions
Unit
T C=25 °C1)
I D
Continuous drain current
30
30
A
T C=100 °C
T C=25 °C2)
I D,pulse
Pulsed drain current
210
60
E AS
I D=24 A, R GS=25 Ω
Avalanche energy, single pulse
mJ
I D=30 A, V DS=20 V,
di /dt =200 A/µs,
Reverse diode dv /dt
dv /dt
6
kV/µs
T
j,max=175 °C
Gate source voltage3)
V GS
±20
46
V
P tot
T C=25 °C
Power dissipation
W
°C
T j, T stg
Operating and storage temperature
IEC climatic category; DIN IEC 68-1
-55 ... 175
55/175/56
Rev. 1.3
page 1
2003-12-18
IPB14N03LA
IPI14N03LA, IPP14N03LA
Values
typ.
Parameter
Symbol Conditions
Unit
min.
max.
Thermal characteristics
R thJC
Thermal resistance, junction - case
SMD version, device on PCB
-
-
-
-
-
-
3.2
62
40
K/W
R thJA
minimal footprint
6 cm2 cooling area4)
Electrical characteristics, at T j=25 °C, unless otherwise specified
Static characteristics
V (BR)DSS V GS=0 V, I D=1 mA
V GS(th) V DS=V GS, I D=20 µA
Drain-source breakdown voltage
Gate threshold voltage
25
-
-
V
1.2
1.6
2
V DS=25 V, V GS=0 V,
T j=25 °C
I DSS
Zero gate voltage drain current
-
-
0.1
10
1
µA
V
DS=25 V, V GS=0 V,
100
T j=125 °C
I GSS
V GS=20 V, V DS=0 V
Gate-source leakage current
-
-
10
100 nA
R DS(on) V GS=4.5 V, I D=20 A
Drain-source on-state resistance
18.5
23.1
22.7
13.9
13.6
-
mΩ
V
GS=4.5 V, I D=20 A,
-
-
18.2
11.6
11.3
0.9
SMD version
V
V
GS=10 V, I D=30 A
GS=10 V, I D=30 A,
-
SMD version
R G
g fs
Gate resistance
-
Ω
|V DS|>2|I D|R DS(on)max
I D=30 A
,
Transconductance
17
33
-
S
1) Current is limited by bondwire; with an R thJC=3.2 K/W the chip is able to carry 45 A.
2) See figure 3
3)
T
=150 °C and duty cycle D <0.25 for V GS<-5 V
j,max
4) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain
connection. PCB is vertical in still air.
Rev. 1.3
page 2
2003-12-18
IPB14N03LA
IPI14N03LA, IPP14N03LA
Values
typ.
Parameter
Symbol Conditions
Unit
min.
max.
Dynamic characteristics
Input capacitance
Output capacitance
Reverse transfer capacitance
Turn-on delay time
Rise time
C iss
-
-
-
-
-
-
-
849
364
58
1129 pF
484
V
GS=0 V, V DS=15 V,
C oss
Crss
t d(on)
t r
f =1 MHz
87
7
10
41
27
5
ns
27
V
DD=15 V, V GS=10 V,
I D=20 A, R G=2.7 Ω
t d(off)
t f
Turn-off delay time
Fall time
18
3.4
Gate Charge Characteristics5)
Gate to source charge
Gate charge at threshold
Gate to drain charge
Switching charge
Q gs
-
-
-
-
-
-
2.9
1.4
2.2
3.7
7.0
3.4
3.9
1.8
3.2
5.3
9.3
-
nC
Q g(th)
Q gd
V
V
DD=15 V, I D=15 A,
GS=0 to 5 V
Q sw
Q g
Gate charge total
V plateau
Gate plateau voltage
V
V DS=0.1 V,
GS=0 to 5 V
Q g(sync)
Gate charge total, sync. FET
Output charge
-
-
6.0
8
7.9
10
nC
V
Q oss
V DD=15 V, V GS=0 V
Reverse Diode
I S
Diode continous forward current
Diode pulse current
-
-
-
-
30
A
T C=25 °C
I S,pulse
210
V GS=0 V, I F=30 A,
T j=25 °C
V SD
Diode forward voltage
-
-
0.97
-
1.2
10
V
V R=15 V, I F=I S,
di F/dt =400 A/µs
Q rr
Reverse recovery charge
nC
5) See figure 16 for gate charge parameter definition
Rev. 1.3
page 3
2003-12-18
IPB14N03LA
IPI14N03LA, IPP14N03LA
1 Power dissipation
2 Drain current
P tot=f(T C)
I D=f(T C); V GS≥10 V
50
40
30
20
10
0
40
30
20
10
0
0
50
100
150
200
0
50
100
150
200
T C [°C]
T C [°C]
3 Safe operation area
I D=f(V DS); T C=25 °C; D =0
parameter: t p
4 Max. transient thermal impedance
Z thJC=f(t p)
parameter: D =t p/T
1000
10
1 µs
0.5
100
limited by on-state
resistance
1
10 µs
0.2
0.1
100 µs
0.05
DC
0.02
1 ms
10
0.1
0.01
10 ms
single pulse
1
0.01
-4
10-6
10-5
10
10-3
10-2
10-1100
0.1
1
10
100
t p [s]
V DS [V]
Rev. 1.3
page 4
2003-12-18
IPB14N03LA
IPI14N03LA, IPP14N03LA
5 Typ. output characteristics
I D=f(V DS); T j=25 °C
6 Typ. drain-source on resistance
R DS(on)=f(I D); T j=25 °C
parameter: V GS
parameter: V GS
60
60
3.2 V
3.5 V
3 V
3.8 V
4.1 V
4.5 V
10 V
50
40
30
20
10
0
50
4.5 V
40
30
20
10
0
4.1 V
3.8 V
3.5 V
3.2 V
10 V
3 V
2.8 V
0
10
20
30
40
50
60
0
1
2
3
V DS [V]
I D [A]
7 Typ. transfer characteristics
I D=f(V GS); |V DS|>2|I D|R DS(on)max
parameter: T j
8 Typ. forward transconductance
g fs=f(I D); T j=25 °C
60
50
40
30
20
50
40
30
20
10
0
10
175 °C
25 °C
0
0
1
2
3
4
5
0
10
20
30
40
50
60
I D [A]
V GS [V]
Rev. 1.3
page 5
2003-12-18
IPB14N03LA
IPI14N03LA, IPP14N03LA
9 Drain-source on-state resistance
10 Typ. gate threshold voltage
R
DS(on)=f(T j); I D=30 A; V GS=10 V
V GS(th)=f(T j); V GS=V DS
parameter: I D
30
25
20
2.5
2
200 µA
1.5
1
98 %
20 µA
15
typ
10
5
0.5
0
0
-60
-20
20
60
100
140
180
-60
-20
20
60
T j [°C]
100
140
180
T j [°C]
11 Typ. Capacitances
12 Forward characteristics of reverse diode
I F=f(V SD
C =f(V DS); V GS=0 V; f =1 MHz
)
parameter: T j
1000
1000
Ciss
Coss
25 °C
100
175°C 98%
100
175 °C
Crss
25°C 98%
10
1
10
0.0
0.5
1.0
VSD [V]
1.5
2.0
0
5
10
15
20
25
30
V DS [V]
Rev. 1.3
page 6
2003-12-18
IPB14N03LA
IPI14N03LA, IPP14N03LA
13 Avalanche characteristics
14 Typ. gate charge
V GS=f(Q gate); I D=15 A pulsed
parameter: V DD
I AS=f(t AV); R GS=25 Ω
parameter: Tj(start)
100
12
10
8
15 V
20 V
5 V
25 °C
100 °C
150 °C
10
6
4
2
1
0
1
10
100
1000
0
5
10
15
Q gate [nC]
t AV [µs]
15 Drain-source breakdown voltage
16 Gate charge waveforms
V
BR(DSS)=f(T j); I D=1 mA
29
28
27
26
25
24
23
22
21
20
V GS
Q g
V gs(th)
Q g(th)
Q sw
Q gd
Q gate
Q gs
-60
-20
20
60
100
140
180
T j [°C]
Rev. 1.3
page 7
2003-12-18
IPB14N03LA
IPI14N03LA, IPP14N03LA
Package Outline
P-TO263-3-2: Outline
Footprint
Packaging
Dimensions in mm
Rev. 1.3
page 8
2003-12-18
IPB14N03LA
IPI14N03LA, IPP14N03LA
P-TO262-3-1: Outline
P-TO220-3-1: Outline
Packaging
Dimensions in mm
Rev. 1.3
page 9
2003-12-18
IPB14N03LA
IPI14N03LA, IPP14N03LA
Published by
Infineon Technologies AG
Bereich Kommunikation
St.-Martin-Straße 53
D-81541 München
© Infineon Technologies AG 1999
All Rights Reserved.
Attention please!
The information herein is given to describe certain components and shall not be considered as
warranted characteristics.
Terms of delivery and rights to technical change reserved.
We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement,
regarding circuits, descriptions and charts started herein.
Infineon Technologies is an approved CECC manufacturer.
Information
For further information on technology, delivery terms and conditions and prices, please contact your
nearest Infineon Technologies office in Germany or our Infineon Technologies representatives worldwide
(see address list).
Warnings
Due to technical requirements, components may contain dangerous substances.
For information on the types in question, please contact your nearest Infineon Technologies office.
Infineon Technologies' components may only be used in life-support devices or systems with the
expressed written approval of Infineon Technologies if a failure of such components can reasonably
be expected to cause the failure of that life-support device or system, or to affect the safety or
effectiveness of that device or system. Life support devices or systems are intended to be implanted
in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail,
it is reasonable to assume that the health of the user or other persons may be endangered.
Rev. 1.3
page 10
2003-12-18
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