IPS021L [INFINEON]
FULLY PROTECTED POWER MOSFET SWITCH; 充分保护功率MOSFET开关
| 型号： | IPS021L |
| 厂家： | 
Infineon |
| 描述： | FULLY PROTECTED POWER MOSFET SWITCH |
| 文件： | 总11页 (文件大小：112K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Data Sheet No.PD60145-K
IPS021L
FULLY PROTECTED POWER MOSFET SWITCH
Features
Product Summary
• Over temperature shutdown
• Over current shutdown
• Active clamp
• Low current & logic level input
• E.S.D protection
R
V
150mΩ (max)
ds(on)
50V
5A
clamp
I
shutdown
Description
T T
on/ off
1.5µs
The IPS021L is a fully protected three terminal SMART
POWER MOSFET that features over-current, over-
temperature, ESD protection and drain to source
®
active clamp.This device combines a HEXFET
POWER MOSFET and a gate driver. It offers full
protection and high reliability required in harsh envi-
ronments. The driver allows short switching times
and provides efficient protection by turning OFF the
power MOSFET when the temperature exceeds 165oC
or when the drain current reaches 5A. The device
restarts once the input is cycled. The avalanche
capability is significantly enhanced by the active
clamp and covers most inductive load demagnetiza-
tions.
Package
ead SOT223
Typical Connection
Load
R in series
(if needed)
D
S
IN
control
Logic signal
(Refer to lead assignment for correct pin configuration)
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IPS021L
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are ref-
erenced to SOURCE lead. (T
copper thickness..
= 25oC unless otherwise specified). PCB mounting uses the standard footprint with 70 µm
Ambient
Symbol Parameter
Min.
—
Max.
47
Units
Test Conditions
V
Maximum drain to source voltage
Maximum Input voltage
Maximum IN current
ds
V
V
-0.3
7
in
I
I
-10
+10
mA
A
in, max
sd cont.
(1)
Diode max. continuous current
(rth=125oC/W)
—
—
1.4
10
(1)
I
Diode max. pulsed current
sd pulsed
(1)
P
d
Maximum power dissipation
(rth=125oC/W)
Electrostatic discharge voltage (Human Body)
Electrostatic discharge voltage (Machine Model)
Max. storage temperature
—
—
1
4
W
ESD1
ESD2
C=100pF, R=1500Ω,
kV
—
0.5
150
+150
C=200pF, R=0Ω, L=10µH
T
T
-55
-40
stor.
oC
max. Max. junction temperature
j
Thermal Characteristics
Symbol Parameter
Min. Typ. Max. Units Test Conditions
R
R
1
Thermal resistance with standard footprint
Thermal resistance with 1" square footprint
—
—
100
50
—
—
th
th
oC/W
2
Recommended Operating Conditions
These values are given for a quick design. For operation outside these conditions, please consult the application notes.
Symbol Parameter
Min. Max. Units
V
V
V
Continuous drain to source voltage
35
—
4
ds (max)
High level input voltage
Low level input voltage
6
V
IH
IL
0
0.5
I
Continuous drain current
(
ds
Tamb=85oC
o
o
o
TAmbient = 85 C, IN = 5V, rth = 100 C/W, Tj = 125 C)
—
0.5
1.4
5
A
R
in
Recommended resistor in series with IN pin
k
Ω
µ
S
T
r-in
F -I
(max) Max recommended rise time for IN signal (see fig. 2)
—
0
1
(2)
Max. frequency in short circuit condition (Vcc = 14V)
1
kHz
r sc
(1) Limited by junction temperature (pulsed current limited also by internal wiring)
(2) Operations at higher switching frequencies is possible. See Appl. notes.
2
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IPS021L
Static Electrical Characteristics
Standard footprint 70 µm copper thickness. Tj = 25oC, (unless otherwise specified).
Symbol Parameter
Min. Typ. Max. Units Test Conditions
ON state resistance T = 25oC
100
—
0
130
220
0.01
0.1
150
280
25
R
ds(on)
j
V
= 5V, I = 1A
ds
mΩ
µA
in
T
j
= 150oC
T
T
= 25oC
= 25oC
I
I
Drain to source leakage current
Drain to source leakage current
Drain to source clamp voltage 1
V
= 14V,
dss 1
dss 2
cc
cc
j
0
50
V
I
= 40V,
j
V clamp 1
56
= 20mA (see Fig.3 & 4)
48
50
54
56
8
1.5
90
130
d
I =I
d
(see Fig.3 & 4)
V clamp 2 Drain to source clamp voltage 2
shutdown
= 1 mA
60
9.5
2
V
I
V
V
IN to source clamp voltage
IN threshold voltage
clamp
7
1
in
d
in
th
,
I
= 50mA, V = 14V
ds
25
50
I
I
ON state IN positive current
OFF state IN positive current
200
250
V
V
= 5V
in -on
in, -off
in
µA
= 5V
in
over-current triggered
Switching Electrical Characteristics
V
= 14V, Resistive Load = 10Ω, Rinput = 50Ω, 100µs pulse, T = 25oC, (unless otherwise specified).
j
cc
Symbol Parameter
Min. Typ. Max. Units Test Conditions
T
T
T
Turn-on delay time
Rise time
0.5
0.9
6
0.15
0.4
2
1
on
r
See figure 2
2
Time to 130% final R
Turn-off delay time
Fall time
12
3.5
2.5
—
rf
ds(on)
µs
T
2
0.8
0.5
—
off
See figure 2
T
1.3
30
f
Q
Total gate charge
nC
V
in
= 5V
in
Protection Characteristics
Symbol Parameter
Min. Typ. Max. Units Test Conditions
T
Over temperature threshold
Over current threshold
IN protection reset threshold
Time to reset protection
165
5.5
2.3
10
oC See fig. 1
—
4
—
7
sd
I
A
V
µs
µJ
See fig. 1
sd
V
T
1.5
3
reset
V
V
= 0V, Tj = 25oC
in
2
40
—
reset
EOI_OT Short circuit energy (see application note)
400
= 14V
—
cc
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IPS021L
Functional Block Diagram
All values are typical
DRAIN
47 V
200 kΩ
Ω
1000
IN
S
Q
Q
R
8.1 V
I sense
T > 165°c
I > Isd
µ
80 A
SOURCE
Lead Assignments
(2) D
1
2
3
In
D
S
4
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IPS021L
5 V
0 V
Vin
1900%%
Tr-in
t > T reset
t < T reset
Ids
I shutdown
90 %
10 %
Isd
Td on
Td off
tf
tr
T
T shutdown
Tsd
(165 °c)
Vds
Figure 2 - IN rise time & switching time definitions
Figure 1 - Timing diagram
T clamp
L
V load
Rem : V load is negative
during demagnetization
+
14 V
-
R
Vds clamp
D
S
Vin
IN
Vds
Ids
( Vcc )
5 v
0 v
( see Appl . Notes to evaluate power dissipation )
Figure 3 - Active clamp waveforms
Figure 4 - Active clamp test circuit
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IPS021L
All curves are typical values with standard footprints. Operating in the shaded area is not recommended.
300
250
200
150
100
50
200%
180%
160%
140%
120%
100%
80%
Tj = 150oC
Tj = 25oC
60%
40%
20%
0
0%
0
1
2
3
4
5
6
7
8
-50 -25
0
25 50 75 100 125 150 175
Figure 5 - Rds ON (mΩ) Vs Input Voltage (V)
Figure 6 - Normalised Rds(on) (%) Vs Tj (oC)
10
4
3
2
1
0
ton delay
rise time
130% rdson
toff delay
fall time
9
8
7
6
5
4
3
2
1
0
0
1
2
3
4
5
6
7
8
0
1
2
3
4
5
6
7
8
Figure 7 - Turn-ON Delay Time, Rise Time & Time
to 130% final Rds (us) Vs Input Voltage (V)
Figure 8 - Turn-OFF Delay Time & Fall Time (us)
Vs Input Voltage (V)
(on)
6
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IPS021L
1 0 0
1 0
1
1 0 0
1 0
1
delay off
fall time
delay on
rise time
130% rdson
0 .1
0 .1
1 0
1 0 0
1 0 0 0
1 0 0 0 0
10
100
1000
10000
Figure 9 - Turn-ON Delay Time, Rise Time & Time
Figure 10 - Turn-OFF Delay Time & Fall Time (us)
to 130% final Rds
(us) Vs IN Resistor (Ω)
Vs IN Resistor (Ω)
(on)
8
6
4
2
0
6
5
4
3
2
1
0
Isd 25°C
Ilim 25°C
0
1
2
3
4
5
6
7
8
-50 -25
0
25 50 75 100 125 150
Figure 11 - Current Iim. & I shutdown (A) Vs Vin (V)
Figure 12 - I shutdown (A) Vs Temperature (oC)
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IPS021L
100
10
1
5
4
3
2
1
0
1" footprint 55°C/W
std. footprint 100°C/W
T=25°C Std. footprint
T=100°C Std footprint
Current path capability should
be above this curve
Load characteristic should
be below this curve
-50
0
50
100
150
200
Figure 14 - Ids (A) Vs Protection Resp. Time (s)
Figure 13 - Max.Cont. Ids (A) Vs
Amb. Temperature (oC)
1 0 0
single pulse
10
100 Hz rth=100°C/W dT=25°C
1kHz rth=100°C/W dT=25°C
1 0
1
1
Single pulse
0 .1
0 .0 1
Vbat = 14 V
Tjini = T sd
all curves for 1 mosfet active
0.1
0 .0 1
0 .1
1
1 0
1 0 0
Figure 15 - I clamp (A) Vs Inductive Load (mH)
Figure 16 - Transient Thermal Imped. (oC/W)
Vs Time (s)
8
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IPS021L
200
180
160
140
120
100
80
16
14
12
10
8
Treset
rise time
fall time
6
60
4
Iin,on
Iin,off
40
2
20
0
0
-50 -25
0
25 50 75 100 125 150
-50 -25
0
25 50 75 100 125 150
Figure 17 - Input Current (uA) Vs
Junction Temperature (oC)
Figure 18 - Rise Time, Fall Time and Treset (µs)
Vs Tj (oC)
120%
115%
110%
105%
100%
95%
90%
Vds clamp @ Isd
85%
Vin clamp @ 10mA
80%
-50 -25
0
25 50 75 100 125 150
Figure 19 -Vin clamp and Vds clamp Vs
Tj (oC)
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IPS021L
Case Outline
01-6029
01-0022 05 (TO-261AA)
3-Lead SOT-223
10
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IPS021L
Tape & Reel - SOT223
01-0028 05 / 01-0008 02
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105
Data and specifications subject to change without notice. 6/11/2001
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