IPTG011N08NM5 [INFINEON]

OptiMOS™ 功率 MOSFET IPTG011N08NM5 采用改良的翼型引脚 TO-Leaded 封装。TOLG 封装尺寸与 TO-Leadless 封装尺寸互相兼容,与 D2PAK 7 引脚相比,TOLG 封装具有出色的电器性能,同时减少了约 60% 的电路板空间。这款 OptiMOS™ 5 - 80 V 的新型封装具有非常低的 RDS(on) ,而且经过优化,可处理大于 300 A 的高电流。;
IPTG011N08NM5
型号: IPTG011N08NM5
厂家: Infineon    Infineon
描述:

OptiMOS™ 功率 MOSFET IPTG011N08NM5 采用改良的翼型引脚 TO-Leaded 封装。TOLG 封装尺寸与 TO-Leadless 封装尺寸互相兼容,与 D2PAK 7 引脚相比,TOLG 封装具有出色的电器性能,同时减少了约 60% 的电路板空间。这款 OptiMOS™ 5 - 80 V 的新型封装具有非常低的 RDS(on) ,而且经过优化,可处理大于 300 A 的高电流。

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IPTG011N08NM5  
MOSFET  
OptiMOSTMꢀ5ꢀPower-Transistor,ꢀ80ꢀV  
PG-HSOG-8-1  
TAB  
Features  
TAB  
•ꢀN-channel,ꢀnormalꢀlevel  
•ꢀVeryꢀlowꢀon-resistanceꢀRDS(on)  
•ꢀExcellentꢀgateꢀchargeꢀxꢀRDS(on)ꢀproductꢀ(FOM)  
•ꢀ100%ꢀavalancheꢀtested  
•ꢀPb-freeꢀleadꢀplating;ꢀRoHSꢀcompliant  
•ꢀHalogen-freeꢀaccordingꢀtoꢀIEC61249-2-21  
•ꢀIdealꢀforꢀhighꢀfrequencyꢀswitchingꢀandꢀsync.ꢀrec.  
1
8
8
1
Productꢀvalidation  
FullyꢀqualifiedꢀaccordingꢀtoꢀJEDECꢀforꢀIndustrialꢀApplications  
Drain  
TAB  
Tableꢀ1ꢀꢀꢀꢀꢀKeyꢀPerformanceꢀParameters  
Gate  
Pin 1  
Parameter  
Value  
Unit  
Source  
Pin 2-8  
VDS  
80  
V
RDS(on),max  
ID  
1.1  
m  
A
408  
207  
178  
Qoss  
nC  
nC  
QG  
Typeꢀ/ꢀOrderingꢀCode  
Package  
Marking  
RelatedꢀLinks  
IPTG011N08NM5  
PG-HSOG-8-1  
011N08N5  
-
Final Data Sheet  
1
Rev.ꢀ2.0,ꢀꢀ2021-02-11  
OptiMOSTMꢀ5ꢀPower-Transistor,ꢀ80ꢀV  
IPTG011N08NM5  
TableꢀofꢀContents  
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3  
Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3  
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4  
Electrical characteristics diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6  
Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10  
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11  
Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11  
Disclaimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11  
Final Data Sheet  
2
Rev.ꢀ2.0,ꢀꢀ2021-02-11  
OptiMOSTMꢀ5ꢀPower-Transistor,ꢀ80ꢀV  
IPTG011N08NM5  
1ꢀꢀꢀꢀꢀMaximumꢀratings  
atꢀTA=25ꢀ°C,ꢀunlessꢀotherwiseꢀspecified  
Tableꢀ2ꢀꢀꢀꢀꢀMaximumꢀratings  
Values  
Typ.  
Parameter  
Symbol  
Unit Noteꢀ/ꢀTestꢀCondition  
Min.  
Max.  
-
-
-
-
-
-
-
-
408  
295  
237  
42  
VGS=10ꢀV,ꢀTC=25ꢀ°C  
VGS=10ꢀV,ꢀTC=100ꢀ°C  
Continuous drain current1)  
ID  
A
VGS=6ꢀV,ꢀTC=100ꢀ°C  
VGS=10ꢀV,TA=25°C,RTHJA=40°C/W2)  
Pulsed drain current3)  
Avalanche energy, single pulse4)  
ID,pulse  
EAS  
-
-
-
-
1632  
817  
20  
A
TA=25ꢀ°C  
-
mJ  
V
ID=150ꢀA,ꢀRGS=25ꢀΩ  
Gate source voltage  
VGS  
-20  
-
-
-
-
-
375  
3.8  
TC=25ꢀ°C  
Power dissipation  
Ptot  
W
TA=25ꢀ°C,ꢀRTHJA=40ꢀ°C/W2)  
IEC climatic category; DIN IEC 68-1:  
55/175/56  
Operating and storage temperature  
Tj,ꢀTstg  
-55  
-
175  
°C  
2ꢀꢀꢀꢀꢀThermalꢀcharacteristics  
Tableꢀ3ꢀꢀꢀꢀꢀThermalꢀcharacteristics  
Values  
Typ.  
0.2  
Parameter  
Symbol  
Unit Noteꢀ/ꢀTestꢀCondition  
Min.  
Max.  
Thermal resistance, junction - case  
RthJC  
RthJA  
-
0.4  
°C/W -  
°C/W -  
Thermal resistance, junction - ambient,  
6 cm² cooling area  
-
-
-
-
40  
62  
Thermal resistance, junction - ambient,  
minimal footprint2)  
RthJA  
°C/W -  
1) Rating refers to the product only with datasheet specified absolute maximum values, maintaining case temperature  
as specified. For other case temperatures please refer to Diagram 2. De-rating will be required based on the actual  
environmental conditions.  
2) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain  
connection. PCB is vertical in still air.  
3) See Diagram 3 for more detailed information  
4) See Diagram 13 for more detailed information  
Final Data Sheet  
3
Rev.ꢀ2.0,ꢀꢀ2021-02-11  
OptiMOSTMꢀ5ꢀPower-Transistor,ꢀ80ꢀV  
IPTG011N08NM5  
3ꢀꢀꢀꢀꢀElectricalꢀcharacteristics  
atꢀTj=25ꢀ°C,ꢀunlessꢀotherwiseꢀspecified  
Tableꢀ4ꢀꢀꢀꢀꢀStaticꢀcharacteristics  
Values  
Parameter  
Symbol  
Unit Noteꢀ/ꢀTestꢀCondition  
Min.  
80  
Typ.  
Max.  
-
Drain-source breakdown voltage  
Gate threshold voltage  
V(BR)DSS  
VGS(th)  
-
V
V
VGS=0ꢀV,ꢀID=1ꢀmA  
2.2  
3
3.8  
VDS=VGS,ꢀID=280ꢀµA  
-
-
0.1  
10  
1
100  
VDS=80ꢀV,ꢀVGS=0ꢀV,ꢀTj=25ꢀ°C  
VDS=80ꢀV,ꢀVGS=0ꢀV,ꢀTj=125ꢀ°C  
Zero gate voltage drain current  
Gate-source leakage current  
Drain-source on-state resistance  
IDSS  
µA  
nA  
IGSS  
-
10  
100  
VGS=20ꢀV,ꢀVDS=0ꢀV  
-
-
1.0  
1.3  
1.1  
1.7  
VGS=10ꢀV,ꢀID=150ꢀA  
VGS=6ꢀV,ꢀID=75ꢀA  
RDS(on)  
mΩ  
Gate resistance1)  
Transconductance  
RG  
gfs  
-
1.6  
2.4  
-
-
120  
270  
S
|VDS|2|ID|RDS(on)max,ꢀID=100ꢀA  
Tableꢀ5ꢀꢀꢀꢀꢀDynamicꢀcharacteristics  
Values  
Typ.  
Parameter  
Symbol  
Unit Noteꢀ/ꢀTestꢀCondition  
Min.  
Max.  
Input capacitance1)  
Output capacitance1)  
Reverse transfer capacitance1)  
Ciss  
Coss  
Crss  
-
-
-
13000 17000 pF  
2000 2600 pF  
VGS=0ꢀV,ꢀVDS=40ꢀV,ꢀf=1ꢀMHz  
VGS=0ꢀV,ꢀVDS=40ꢀV,ꢀf=1ꢀMHz  
VGS=0ꢀV,ꢀVDS=40ꢀV,ꢀf=1ꢀMHz  
86  
35  
150  
-
pF  
ns  
VDD=40ꢀV,ꢀVGS=10ꢀV,ꢀID=100ꢀA,  
RG,ext=1.8ꢀΩ  
Turn-on delay time  
Rise time  
td(on)  
tr  
td(off)  
tf  
-
-
-
-
VDD=40ꢀV,ꢀVGS=10ꢀV,ꢀID=100ꢀA,  
RG,ext=1.8ꢀΩ  
31  
82  
30  
-
-
-
ns  
ns  
ns  
VDD=40ꢀV,ꢀVGS=10ꢀV,ꢀID=100ꢀA,  
RG,ext=1.8ꢀΩ  
Turn-off delay time  
Fall time  
VDD=40ꢀV,ꢀVGS=10ꢀV,ꢀID=100ꢀA,  
RG,ext=1.8ꢀΩ  
Tableꢀ6ꢀꢀꢀꢀꢀGateꢀchargeꢀcharacteristics2)ꢀ  
Values  
Typ.  
55  
Parameter  
Symbol  
Unit Noteꢀ/ꢀTestꢀCondition  
Min.  
Max.  
Gate to source charge  
Gate charge at threshold  
Gate to drain charge1)  
Switching charge  
Gate charge total1)  
Gate plateau voltage  
Output charge1)  
Qgs  
-
-
-
-
-
-
-
-
nC  
nC  
nC  
nC  
nC  
V
VDD=40ꢀV,ꢀID=100ꢀA,ꢀVGS=0ꢀtoꢀ10ꢀV  
VDD=40ꢀV,ꢀID=100ꢀA,ꢀVGS=0ꢀtoꢀ10ꢀV  
VDD=40ꢀV,ꢀID=100ꢀA,ꢀVGS=0ꢀtoꢀ10ꢀV  
VDD=40ꢀV,ꢀID=100ꢀA,ꢀVGS=0ꢀtoꢀ10ꢀV  
VDD=40ꢀV,ꢀID=100ꢀA,ꢀVGS=0ꢀtoꢀ10ꢀV  
VDD=40ꢀV,ꢀID=100ꢀA,ꢀVGS=0ꢀtoꢀ10ꢀV  
VDS=40ꢀV,ꢀVGS=0ꢀV  
Qg(th)  
Qgd  
37  
-
37  
56  
-
Qsw  
55  
Qg  
178  
4.4  
223  
-
Vplateau  
Qoss  
207  
275  
nC  
1) Defined by design. Not subject to production test.  
2) See Gate charge waveformsfor parameter definition  
Final Data Sheet  
4
Rev.ꢀ2.0,ꢀꢀ2021-02-11  
OptiMOSTMꢀ5ꢀPower-Transistor,ꢀ80ꢀV  
IPTG011N08NM5  
Tableꢀ7ꢀꢀꢀꢀꢀReverseꢀdiode  
Values  
Typ.  
-
Parameter  
Symbol  
Unit Noteꢀ/ꢀTestꢀCondition  
Min.  
Max.  
304  
1632  
1
Diode continuous forward current  
Diode pulse current  
IS  
-
-
-
-
-
A
TC=25ꢀ°C  
IS,pulse  
VSD  
trr  
-
A
TC=25ꢀ°C  
Diode forward voltage  
0.88  
106  
318  
V
VGS=0ꢀV,ꢀIF=150ꢀA,ꢀTj=25ꢀ°C  
VR=40ꢀV,ꢀIF=100ꢀA,ꢀdiF/dt=100ꢀA/µs  
VR=40ꢀV,ꢀIF=100ꢀA,ꢀdiF/dt=100ꢀA/µs  
Reverse recovery time1)  
Reverse recovery charge1)  
212  
636  
ns  
nC  
Qrr  
1) Defined by design. Not subject to production test.  
Final Data Sheet  
5
Rev.ꢀ2.0,ꢀꢀ2021-02-11  
OptiMOSTMꢀ5ꢀPower-Transistor,ꢀ80ꢀV  
IPTG011N08NM5  
4ꢀꢀꢀꢀꢀElectricalꢀcharacteristicsꢀdiagrams  
Diagramꢀ1:ꢀPowerꢀdissipation  
Diagramꢀ2:ꢀDrainꢀcurrent  
400  
500  
350  
300  
250  
200  
150  
100  
50  
400  
300  
200  
100  
0
0
0
25  
50  
75  
100  
125  
150  
175  
200  
0
25  
50  
75  
100  
125  
150  
175  
200  
TCꢀ[°C]  
TCꢀ[°C]  
Ptot=f(TC)  
ID=f(TC);ꢀVGS10ꢀV  
Diagramꢀ3:ꢀSafeꢀoperatingꢀarea  
Diagramꢀ4:ꢀMax.ꢀtransientꢀthermalꢀimpedance  
104  
101  
single pulse  
0.01  
0.02  
0.05  
0.1  
0.2  
1 µs  
103  
102  
101  
100  
10-1  
10-2  
10 µs  
100  
0.5  
100 µs  
10-1  
10-2  
10-3  
1 ms  
10 ms  
DC  
10-1  
100  
101  
102  
10-5  
10-4  
10-3  
10-2  
10-1  
100  
VDSꢀ[V]  
tpꢀ[s]  
ID=f(VDS);ꢀTC=25ꢀ°C;ꢀD=0;ꢀparameter:ꢀtp  
ZthJC=f(tp);ꢀparameter:ꢀD=tp/T  
Final Data Sheet  
6
Rev.ꢀ2.0,ꢀꢀ2021-02-11  
OptiMOSTMꢀ5ꢀPower-Transistor,ꢀ80ꢀV  
IPTG011N08NM5  
Diagramꢀ5:ꢀTyp.ꢀoutputꢀcharacteristics  
Diagramꢀ6:ꢀTyp.ꢀdrain-sourceꢀonꢀresistance  
1750  
3.0  
8 V  
7 V  
10 V  
1500  
1250  
1000  
750  
2.5  
6 V  
4.5 V  
2.0  
5 V  
1.5  
1.0  
0.5  
0.0  
6 V  
7 V  
8 V  
10 V  
500  
5 V  
250  
4.5 V  
0
0
1
2
3
4
5
0
200  
400  
600  
800  
1000  
VDSꢀ[V]  
IDꢀ[A]  
ID=f(VDS),ꢀTj=25ꢀ°C;ꢀparameter:ꢀVGS  
RDS(on)=f(ID),ꢀTj=25ꢀ°C;ꢀparameter:ꢀVGS  
Diagramꢀ7:ꢀTyp.ꢀtransferꢀcharacteristics  
Diagramꢀ8:ꢀTyp.ꢀdrain-sourceꢀonꢀresistance  
1750  
3.0  
1500  
1250  
1000  
750  
2.5  
2.0  
1.5  
1.0  
0.5  
0.0  
175 °C  
500  
25 °C  
175 °C  
250  
0
25 °C  
0
1
2
3
4
5
6
7
0
2
4
6
8
10  
VGSꢀ[V]  
VGSꢀ[V]  
ID=f(VGS),ꢀ|VDS|>2|ID|RDS(on)max;ꢀparameter:ꢀTj  
RDS(on)=f(VGS),ꢀID=150ꢀA;ꢀparameter:ꢀTj  
Final Data Sheet  
7
Rev.ꢀ2.0,ꢀꢀ2021-02-11  
OptiMOSTMꢀ5ꢀPower-Transistor,ꢀ80ꢀV  
IPTG011N08NM5  
Diagramꢀ9:ꢀNormalizedꢀdrain-sourceꢀonꢀresistance  
Diagramꢀ10:ꢀTyp.ꢀgateꢀthresholdꢀvoltage  
2.0  
4.0  
3.5  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
0.0  
1.6  
1.2  
0.8  
0.4  
0.0  
2800 µA  
280 µA  
-80  
-40  
0
40  
80  
120  
160  
200  
-80  
-40  
0
40  
80  
120  
160  
200  
Tjꢀ[°C]  
Tjꢀ[°C]  
RDS(on)=f(Tj),ꢀID=150ꢀA,ꢀVGS=10ꢀV  
VGS(th=f(Tj),ꢀVGS=VDS;ꢀparameter:ꢀID  
Diagramꢀ11:ꢀTyp.ꢀcapacitances  
Diagramꢀ12:ꢀForwardꢀcharacteristicsꢀofꢀreverseꢀdiode  
105  
104  
25 °C  
25 °C, max  
175 °C  
175 °C, max  
104  
103  
102  
101  
Ciss  
103  
102  
101  
Coss  
Crss  
0
10  
20  
30  
40  
50  
60  
70  
80  
0.00  
0.25  
0.50  
0.75  
1.00  
1.25  
1.50  
VDSꢀ[V]  
VSDꢀ[V]  
C=f(VDS);ꢀVGS=0ꢀV;ꢀf=1ꢀMHz  
IF=f(VSD);ꢀparameter:ꢀTj  
Final Data Sheet  
8
Rev.ꢀ2.0,ꢀꢀ2021-02-11  
OptiMOSTMꢀ5ꢀPower-Transistor,ꢀ80ꢀV  
IPTG011N08NM5  
Diagramꢀ13:ꢀAvalancheꢀcharacteristics  
Diagramꢀ14:ꢀTyp.ꢀgateꢀcharge  
103  
10  
16 V  
40 V  
64 V  
8
6
4
2
0
102  
25 °C  
100 °C  
101  
150 °C  
100  
100  
101  
102  
103  
0
25  
50  
75  
100  
125  
150  
175  
200  
tAVꢀ[µs]  
Qgateꢀ[nC]  
IAS=f(tAV);ꢀRGS=25ꢀ;ꢀparameter:ꢀTj,start  
VGS=f(Qgate),ꢀID=100ꢀAꢀpulsed,ꢀTj=25ꢀ°C;ꢀparameter:ꢀVDD  
Diagramꢀ15:ꢀDrain-sourceꢀbreakdownꢀvoltage  
Diagram Gate charge waveforms  
88  
86  
84  
82  
80  
78  
76  
-80  
-40  
0
40  
80  
120  
160  
200  
Tjꢀ[°C]  
VBR(DSS)=f(Tj);ꢀID=1ꢀmA  
Final Data Sheet  
9
Rev.ꢀ2.0,ꢀꢀ2021-02-11  
OptiMOSTMꢀ5ꢀPower-Transistor,ꢀ80ꢀV  
IPTG011N08NM5  
5ꢀꢀꢀꢀꢀPackageꢀOutlines  
PACKAGE - GROUP  
NUMBER:  
PG-HSOG-8-U01  
DATE: 08.02.2021  
REVISION: 01  
MILLIMETERS  
DIMENSIONS  
MIN.  
MAX.  
2.40  
0.10  
0.80  
0.60  
10.10  
9.56  
11.90  
8.75  
7.01  
A
A1  
b
2.20  
0.00  
0.60  
0.40  
9.70  
9.36  
11.50  
8.45  
6.81  
c
D
D1  
E
E1  
E2  
e
1.20  
8.40  
e1  
L
0.66  
2.90  
0.86  
3.10  
P
Figureꢀ1ꢀꢀꢀꢀꢀOutlineꢀPG-HSOG-8-1,ꢀdimensionsꢀinꢀmm  
Final Data Sheet  
10  
Rev.ꢀ2.0,ꢀꢀ2021-02-11  
OptiMOSTMꢀ5ꢀPower-Transistor,ꢀ80ꢀV  
IPTG011N08NM5  
RevisionꢀHistory  
IPTG011N08NM5  
Revision:ꢀ2021-02-11,ꢀRev.ꢀ2.0  
Previous Revision  
Revision Date  
Subjects (major changes since last revision)  
Release of final version  
2.0  
2021-02-11  
Trademarks  
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Dueꢀtoꢀtechnicalꢀrequirements,ꢀcomponentsꢀmayꢀcontainꢀdangerousꢀsubstances.ꢀForꢀinformationꢀonꢀtheꢀtypesꢀinꢀquestion,  
pleaseꢀcontactꢀtheꢀnearestꢀInfineonꢀTechnologiesꢀOffice.  
TheꢀInfineonꢀTechnologiesꢀcomponentꢀdescribedꢀinꢀthisꢀDataꢀSheetꢀmayꢀbeꢀusedꢀinꢀlife-supportꢀdevicesꢀorꢀsystemsꢀand/or  
automotive,ꢀaviationꢀandꢀaerospaceꢀapplicationsꢀorꢀsystemsꢀonlyꢀwithꢀtheꢀexpressꢀwrittenꢀapprovalꢀofꢀInfineonꢀTechnologies,ꢀifꢀa  
failureꢀofꢀsuchꢀcomponentsꢀcanꢀreasonablyꢀbeꢀexpectedꢀtoꢀcauseꢀtheꢀfailureꢀofꢀthatꢀlife-support,ꢀautomotive,ꢀaviationꢀand  
aerospaceꢀdeviceꢀorꢀsystemꢀorꢀtoꢀaffectꢀtheꢀsafetyꢀorꢀeffectivenessꢀofꢀthatꢀdeviceꢀorꢀsystem.ꢀLifeꢀsupportꢀdevicesꢀorꢀsystemsꢀare  
intendedꢀtoꢀbeꢀimplantedꢀinꢀtheꢀhumanꢀbodyꢀorꢀtoꢀsupportꢀand/orꢀmaintainꢀandꢀsustainꢀand/orꢀprotectꢀhumanꢀlife.ꢀIfꢀtheyꢀfail,ꢀitꢀis  
reasonableꢀtoꢀassumeꢀthatꢀtheꢀhealthꢀofꢀtheꢀuserꢀorꢀotherꢀpersonsꢀmayꢀbeꢀendangered.  
Final Data Sheet  
11  
Rev.ꢀ2.0,ꢀꢀ2021-02-11  

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