IR11672ASPBF [INFINEON]
ADVANCED SMART RECTIFIER TM CONTROL IC; 先进的智能整流TM控制IC型号: | IR11672ASPBF |
厂家: | Infineon |
描述: | ADVANCED SMART RECTIFIER TM CONTROL IC |
文件: | 总25页 (文件大小:1105K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
Datasheet No - PD97469
Nov 2, 2009
IR11672AS
ADVANCED SMART RECTIFIER TM CONTROL IC
Product Summary
Features
•
•
Secondary side high speed SR controller
Flyback,
Resonant Half-bridge
Topology
DCM, CrCM flyback and Resonant half-bridge
topologies
•
•
•
•
•
•
•
•
•
•
200V proprietary IC technology
Max 500KHz switching frequency
Anti-bounce logic and UVLO protection
7A peak turn off drive current
Micropower start-up & ultra low quiescent current
10.7V gate drive clamp
50ns turn-off propagation delay
Vcc range from 11.3V to 20V
Direct sensing of MOSFET drain voltage
Enable function synchronized with MOSFET VDS
transition
VD
200V
VOUT
10.7V
Io+ & I o- (typical)
+2A & -7A
Turn on Propagation
Delay
60ns (typical)
50ns (typical)
Turn off Propagation
Delay
Package Options
•
Cycle by Cycle MOT Check Circuit prevents multiple
false trigger GATE pulses
•
•
Lead-free
Compatible with 0.3W Standby, Energy Star, CECP,
etc.
Typical Applications
•
LCD & PDP TV, Telecom SMPS, AC-DC adapters,
ATX SMPS, Server SMPS
8-Lead SOIC
Typical Connection Diagram
Vin
Rs
Rdc
U1
XFM
Cdc
Cs
1
2
3
4
8
7
6
5
VCC VGATE
Ci
OVT
GND
VS
Co
MOT
EN
RMOT
VD
Rg
Q1
IR11672AS
Rtn
*Please note that this datasheet contains advance information that could change before the product is
released to production.
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© 2009 International Rectifier
IR11672AS
Table of Contents
Description
Page
3
Qualification Information
Absolute Maximum Ratings
Electrical Characteristics
Functional Block Diagram
Input/Output Pin Equivalent Circuit Diagram
Lead Definitions
4
5
6
8
9
10
10
12
22
23
24
25
Lead Assignments
Application Information and Additional Details
Package Details
Tape and Reel Details
Part Marking Information
Ordering Information
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© 2009 International Rectifier
2
IR11672AS
Description
IR11672A is a smart secondary-side driver IC designed to drive N-Channel power MOSFETs used as
synchronous rectifiers in isolated Flyback and resonant half-bridge converters. The IC can control one or
more paralleled N-MOSFETs to emulate the behavior of Schottky diode rectifiers. The drain to source voltage
is sensed differentially to determine the polarity of the current and turn the power switch on and off in
proximity of the zero current transition. Ruggedness and noise immunity are accomplished using an
advanced blanking scheme and double-pulse suppression which allow reliable operation in all operating
modes.
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© 2009 International Rectifier
3
IR11672AS
Qualification Information†
Industrial††
Comments: This family of ICs has passed JEDEC’s
Industrial qualification. IR’s Consumer qualification level is
Qualification Level
granted by extension of the higher Industrial level.
MSL2††† 260°C
(per IPC/JEDEC J-STD-020)
Moisture Sensitivity Level
Class B
Machine Model
Human Body Model
(per JEDEC standard JESD22-A115)
ESD
Class 2
(per EIA/JEDEC standard EIA/JESD22-A114)
Class I, Level A
(per JESD78)
Yes
IC Latch-Up Test
RoHS Compliant
†
Qualification standards can be found at International Rectifier’s web site http://www.irf.com/
†† Higher qualification ratings may be available should the user have such requirements. Please contact your
International Rectifier sales representative for further information.
††† Higher MSL ratings may be available for the specific package types listed here. Please contact your
International Rectifier sales representative for further information.
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© 2009 International Rectifier
4
IR11672AS
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All
voltage parameters are absolute voltages referenced to COM, all currents are defined positive into any lead.
The thermal resistance and power dissipation ratings are measured under board mounted and still air
conditions.
Parameters
Supply Voltage
Enable Voltage
Cont. Drain Sense Voltage
Pulse Drain Sense Voltage
Source Sense Voltage
Gate Voltage
Operating Junction Temperature
Storage Temperature
Thermal Resistance
Symbol
VCC
VEN
VD
VD
VS
VGATE
TJ
TS
Min.
-0.3
-0.3
-3
-5
-3
-0.3
-40
-55
Max.
20
20
200
200
20
Units
V
V
V
V
Remarks
V
V
20
VCC=20V, Gate off
150
150
128
970
500
°C
°C
°C/W
mW
kHz
RθJA
PD
fsw
SOIC-8
Package Power Dissipation
Switching Frequency
SOIC-8, TAMB=25°C
Recommended Operating Conditions
For proper operation the device should be used within the recommended conditions.
Symbol
VCC
VD
TJ
Fsw
Definition
Min.
11.4
-3
-25
---
Max.
18
200
125
500
Units
Supply voltage
Drain Sense Voltage
V
Junction Temperature
Switching Frequency
°C
kHz
Recommended Component Values
Symbol
RMOT
Component
MOT pin resistor value
Min.
5
Max.
75
Units
kΩ
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5
IR11672AS
Electrical Characteristics
VCC=15V and TA = 25°C unless otherwise specified. The output voltage and current (VO and IO) parameters
are referenced to GND (pin7).
Supply Section
Parameters
Supply Voltage Operating
Range
Symbol Min.
Typ.
Max.
Units
Remarks
VCC
11.4
9.8
18
V
V
GBD
VCC Turn On Threshold
VCC Turn Off Threshold
(Under Voltage Lock Out)
VCC ON
10.55
9
11.3
VCC UVLO
8.4
9.7
V
VCC Turn On/Off Hysteresis VCC HYST
1.55
8.5
V
C
C
LOAD=1nF,fSW=400kHz
LOAD=10nF,fSW=400kHz
10
65
mA
mA
mA
Operating Current
ICC
50
Quiescent Current
Start-up Current
IQCC
ICC START
I SLEEP
VENHI
1.8
2.2
200
200
3.2
2.0
100
150
2.70
1.6
µA VCC=VCC ON - 0.1V
Sleep Current
µA VEN=0V, VCC =15V
V
V
Enable Voltage High
Enable Voltage Low
Enable Pull-up Resistance
2.15
1.2
VENLO
REN
1.5
MΩ
GBD
Comparator Section
Parameters
Symbol Min.
Typ.
-3.5
-9.5
-18
Max.
0
-6
-14
-50
Units
Remarks
-7
OVT = 0V, VS=0V
OVT floating, VS=0V
OVT = VCC, VS=0V
Turn-off Threshold
VTH1
mV
-14
-22
Turn-on Threshold
Hysteresis
VTH2
VHYST
IIBIAS1
-150
mV
mV
µA
55
1
VD = -50mV
VD = 200V
GBD
Input Bias Current
Input Bias Current
Comparator Input Offset
7.5
100
2
IIBIAS2
30
µA
VOFFSET
mV
VCM
Input CM Voltage Range
-0.15
2
V
One-Shot Section
Parameters
Blanking pulse duration
Symbol Min.
tBLANK
Typ.
17
Max.
25
Units
µs
Remarks
9
2.5
5.4
40
V
V
VCC=10V – GBD
VCC=20V – GBD
Reset Threshold
Hysteresis
VTH3
mV VCC=10V – GBD
VHYST3
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© 2009 International Rectifier
6
IR11672AS
Electrical Characteristics
VCC=15V and TA = 25°C unless otherwise specified. The output voltage and current (VO and IO) parameters
are referenced to GND (pin7).
Minimum On Time Section
Parameters
Symbol Min.
Typ.
240
3.1
Max.
290
Units
ns
Remarks
RMOT =5kΩ, VCC=12V
RMOT =75kΩ, VCC=12V
190
Minimum on time
TONmin
2.48
3.72
µs
Gate Driver Section
Parameters
Gate Low Voltage
Symbol Min.
VGLO
Typ.
0.3
Max.
0.5
Units
V
Remarks
IGATE = 200mA
VCC=12V-18V
Gate High Voltage
Rise Time
VGTH
tr1
tr2
tf1
tf2
tDon
tDoff
rup
9.0
10.7
18
125
10
30
60
50
4
12.5
V
ns
ns
ns
ns
ns
ns
Ω
(internally clamped)
CLOAD = 1nF, VCC=12V
CLOAD = 10nF, VCC=12V
CLOAD = 1nF, VCC=12V
CLOAD = 10nF, VCC=12V
VDS to VGATE -100mV overdrive
VDS to VGATE -100mV overdrive
IGATE = 1A – GBD
Fall Time
Turn on Propagation Delay
Turn off Propagation Delay
Pull up Resistance
95
75
Pull down Resistance
Output Peak Current(source) IO source
Output Peak Current (sink) IO sink
rdown
0.7
2
7
Ω
A
A
IGATE = -200mA
CLOAD = 10nF – GBD
CLOAD = 10nF – GBD
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© 2009 International Rectifier
7
IR11672AS
Functional Block Diagram
MOT
VCC
VCC
UVLO
&
EN
REGULATOR
Cycle by Cycle
MOT Check
Circuit
VCC
VD
Min ON Time
VTH1
RESET
VGATE
GND
VS
DRIVER
OVT
Min OFF Time
Vgate
RESET
VTH3
VTH1
VDS
VTH2
VTH3
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IR11672AS
I/O Pin Equivalent Circuit Diagram
VD
RESD
ESD
Diode
200V
Diode
GND
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IR11672AS
Lead Definitions
PIN#
Symbol
VCC
OVT
MOT
EN
Description
1
2
3
4
5
6
7
8
Supply Voltage
Offset Voltage Trimming
Minimum On Time
Enable
FET Drain Sensing
FET Source Sensing
Ground
VD
VS
GND
VGATE
Gate Drive Output
Lead Assignments
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IR11672AS
Detailed Pin Description
VCC: Power Supply
This is the supply voltage pin of the IC and it is monitored by the under voltage lockout circuit. It is possible to
turn off the IC by pulling this pin below the minimum turn off threshold voltage, without damage to the IC.
To prevent noise problems, a bypass ceramic capacitor connected to Vcc and COM should be placed as
close as possible to the IR11672A. This pin is internally clamped.
OVT: Offset Voltage Trimming
The OVT pin will program the amount of input offset voltage for the turn-off threshold VTH1
.
The pin can be optionally tied to ground, to VCC or left floating, to select 3 ranges of input offset trimming.
This programming feature allows for accommodating different RDSon MOSFETs.
MOT: Minimum On Time
The MOT programming pin controls the amount of minimum on time. Once VTH2 is crossed for the first time,
the gate signal will become active and turn on the power FET. Spurious ringings and oscillations can trigger
the input comparator off. The MOT blanks the input comparator keeping the FET on for a minimum time.
The MOT is programmed between 200ns and 3us (typ.) by using a resistor referenced to COM.
EN: Enable
This pin is used to activate the IC “sleep” mode by pulling the voltage level below 1.6V (typ). In sleep mode
the IC will consume a minimum amount of current. All switching functions will be disabled and the gate will be
inactive.
VD: Drain Voltage Sense
VD is the voltage sense pin for the power MOSFET Drain. This is a high voltage pin and particular care must
be taken in properly routing the connection to the power MOSFET drain.
Additional filtering and or current limiting on this pin are not recommended as it would limit switching
performance of the IC.
VS: Source Voltage Sense
VS is the differential sense pin for the power MOSFET Source. This pin must not be connected directly to the
power ground pin (7) but must be used to create a Kelvin contact as close as possible to the power MOSFET
source pin.
GND: Ground
This is ground potential pin of the integrated control circuit. The internal devices and gate driver are
referenced to this point.
VGATE: Gate Drive Output
This is the gate drive output of the IC. Drive voltage is internally limited and provides 2A peak source and 7A
peak sink capability. Although this pin can be directly connected to the power MOSFET gate, the use of
minimal gate resistor is recommended, especially when putting multiple FETs in parallel.
Care must be taken in order to keep the gate loop as short and as small as possible in order to achieve
optimal switching performance.
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IR11672AS
Application Information and Additional Details
State Diagram
UVLO/Sleep Mode
The IC remains in the UVLO condition until the voltage on the VCC pin exceeds the VCC turn on threshold
voltage, VCC ON. During the time the IC remains in the UVLO state, the gate drive circuit is inactive and the IC
draws a quiescent current of ICC START. The UVLO mode is accessible from any other state of operation
whenever the IC supply voltage condition of VCC < VCC UVLO occurs.
The sleep mode is initiated by pulling the EN pin below 1.6V (typ). In this mode the IC is essentially shut
down and draws a very low quiescent supply current.
Normal Mode and Synchronized Enable Function
The IC enters in normal operating mode once the UVLO voltage has been exceeded and the EN voltage is
above VENHI threshold. When the IC enters the Normal Mode from the UVLO Mode, the GATE output is
disabled (stays low) until VDS exceeds VTH3 to activate the gate. This ensures that the GATE output is not
enabled in the middle of a switching cycle. This logic prevents any reverse currents across the device due to
the minimum on time function in the IC. The gate will continuously drive the SR MOSFET after this one-time
activation. The Cycle by Cycle MOT protection circuit is enabled in Normal Mode.
MOT Protection Mode
If the secondary current conduction time is shorter than the MOT (Minimum On Time) setting, the next driver
output is disabled. This function can avoid reverse current that occurs when the system works at very low
duty-cycles or at very light/no load conditions and reduce system standby power consumption by disabling
GATE outputs. The Cycle by Cycle MOT Check circuit is always activated under Normal Mode and MOT
Protection Mode, so that the IC can automatically resume normal operation once the load increases to a level
and the secondary current conduction time is longer than MOT.
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IR11672AS
General Description
The IR11672A Smart Rectifier IC can emulate the operation of diode rectifier by properly driving a
Synchronous Rectifier (SR) MOSFET. The direction of the rectified current is sensed by the input comparator
using the power MOSFET RDSon as a shunt resistance and the GATE pin of the MOSFET is driven
accordingly. Internal blanking logic is used to prevent spurious transitions and guarantee operation in
continuous (CCM), discontinuous (DCM) and critical (CrCM) conduction mode.
IR11672A is suitable for Flyback and Resonant Half-Bridge topologies.
VGate
VDS
VTH2
VTH1
VTH3
Figure 1: Input comparator thresholds
Flyback Application
The modes of operation for a Flyback circuit differ mainly for the turn-off phase of the SR switch, while the
turn-on phase of the secondary switch (which corresponds to the turn off of the primary side switch) is
identical.
Turn-on phase
When the conduction phase of the SR FET is initiated, current will start flowing through its body diode,
generating a negative VDS voltage across it. The body diode has generally a much higher voltage drop than
the one caused by the MOSFET on resistance and therefore will trigger the turn-on threshold VTH2
.
At that point the IR11672A will drive the gate of MOSFET on which will in turn cause the conduction voltage
VDS to drop down. This drop is usually accompanied by some amount of ringing, that can trigger the input
comparator to turn off; hence, a Minimum On Time (MOT) blanking period is used that will maintain the
power MOSFET on for a minimum amount of time.
The programmed MOT will limit also the minimum duty cycle of the SR MOSFET and, as a consequence, the
max duty cycle of the primary side switch.
DCM/CrCM Turn-off phase
Once the SR MOSFET has been turned on, it will remain on until the rectified current will decay to the level
where VDS will cross the turn-off threshold VTH1. This will happen differently depending on the mode of
operation.
In DCM the current will cross the threshold with a relatively low dI/dt. Once the threshold is crossed, the
current will start flowing again thru the body diode, causing the VDS voltage to jump negative. Depending on
the amount of residual current, VDS may trigger once again the turn on threshold: for this reason VTH2 is
blanked for a certain amount of time (TBLANK) after VTH1 has been triggered.
The blanking time is internally set. As soon as VDS crosses the positive threshold VTH3 also the blanking time
is terminated and the IC is ready for next conduction cycle.
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IR11672AS
IPRIM
VPRIM
time
T3
T1
T2
ISEC
VSEC
time
Figure 2: Primary and secondary currents and voltages for DCM mode
IPRIM
VPRIM
time
T2
T1
ISEC
VSEC
time
Figure 3: Primary and secondary currents and voltages for CrCM mode
CCM Turn-off phase
In CCM mode the turn off transition is much steeper and dI/dt involved is much higher. The turn on phase is
identical to DCM or CrCM and therefore won’t be repeated here.
During the SR FET conduction phase the current will decay linearly, and so will VDS on the SR FET.
Once the primary switch will start to turn back on, the SR FET current will rapidly decrease crossing VTH1 and
turning the gate off. The turn off speed is critical to avoid cross conduction on the primary side and reduce
switching losses.
Also in this case a blanking period will be applied, but given the very fast nature of this transition, it will be
reset as soon as VDS crosses VTH3
.
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IR11672AS
IPRIM
VPRIM
time
T2
T1
ISEC
VSEC
time
Figure 4: Primary and secondary currents and voltages for CCM mode
The operation waveforms of IR11672A in a flyback converter under CCM mode and DCM/CrCM were shown
in Figure 5 and Figure 6 respectively.
VTH3
ISEC
VDS
T1
T2
time
VTH1
VTH2
Gate Drive
Blanking
time
time
MOT
Figure 5: Secondary side CCM operation
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IR11672AS
VTH3
ISEC
VDS
T1
T2
time
VTH1
VTH2
Gate Drive
Blanking
time
MOT
10us blanking
Figure 6: Secondary side DCM/CrCM operation
Resonant Half-Bridge Application
The typical application circuit of IR11672A in LLC half-bridge is shown in Figure 7.
M3
Rcc1
CVCC1
Rg1
Vin
1
2
3
4
8
7
6
5
VCC
OVT
MOT
EN
GATE
GND
VS
M1
M2
VD
Lr
Rmot1
T1
IR11672A
Lm
VOUT
Cr
Rcc2
CVCC2
Rtn
1
2
3
4
8
7
6
5
Cout
VCC
OVT
MOT
EN
GATE
GND
VS
VD
Rmot2
Rg2
IR11672A
M4
Figure 7: Resonant half-bridge application circuit
In resonant half-bridge converter, the turn-on phase and turn-off phase is similar to flyback except the current
shape is sinusoid. The typical operation waveform can be found below.
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IR11672AS
Figure 8: Resonant half-bridge operation waveform
MOT Protection Mode
The MOT protection prevents reverse current in SR MOSFET which could happen at light load if the MOT
time is set very long. The IC disables the gate output in the protection mode and automatically resume to
normal operation as the load increasing to a level where the SR current conduction time is longer than MOT.
This function works in both flyback and resonant half-bridge topologies. Figure 9 is an example in Flyback
converter.
Figure 9: MOT Protection Mode
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IR11672AS
Synchronized Enable Function
This function works in both flyback and resonant half-bridge topologies. Figure 10 is an example in resonant
half-bridge converter.
Figure 10: Synchronized Enable Function (resonant half-bridge)
General Timing Waveform
VCC
VCC ON
VCC UVLO
t
UVLO
NORMAL
UVLO
Figure 11: Vcc UVLO
VTH1
VDS
VTH2
tDon
tDoff
VGate
90%
50%
10%
trise
tfall
Figure 12: Timing waveform
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18
IR11672AS
Figure 14: Undervoltage Lockout vs.
Figure 13: Supply Current vs. Supply Voltage
Temperature
Figure 16: Icc Supply Currrent @1nF Load vs.
Temperature
Figure 15: Icc Quiescent Currrent vs.
Temperature
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IR11672AS
Figure 17: VTH1 vs. Temperature
Figure 18: VTH2 vs. Temperature
Figure 19: Comparator Hysteresis vs.
Temperature
Figure 20: VTH1 vs. Temperature and Common
Mode (OVT=Floating)
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IR11672AS
Figure 22: MOT vs Temperature
Figure 21: VTH2 vs. Temperature and
Common Mode
Figure 23: Enable Threshold vs. Temperature
Figure 24: Turn-on and Turn-off Propagation
Delay vs. Temperature
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IR11672AS
Package Details: SOIC8N
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22
IR11672AS
Tape and Reel Details: SOIC8N
LOADED TAPE FEED DIRECTION
A
B
H
D
F
C
NOTE : CONTROLLING
DIMENSION IN MM
E
G
CARRIER TAPE DIMENSION FOR 8SOICN
Metric
Imperial
Min
0.311
0.153
0.46
Code
A
B
C
D
E
F
G
H
Min
7.90
3.90
11.70
5.45
6.30
5.10
1.50
1.50
Max
8.10
4.10
12.30
5.55
6.50
5.30
n/a
Max
0.318
0.161
0.484
0.218
0.255
0.208
n/a
0.214
0.248
0.200
0.059
0.059
1.60
0.062
F
D
B
C
A
E
G
H
REEL DIMENSIONS FOR 8SOICN
Metric
Imperial
Code
A
B
C
D
E
F
G
H
Min
329.60
20.95
12.80
1.95
98.00
n/a
14.50
12.40
Max
330.25
21.45
13.20
2.45
102.00
18.40
17.10
14.40
Min
12.976
0.824
0.503
0.767
3.858
n/a
Max
13.001
0.844
0.519
0.096
4.015
0.724
0.673
0.566
0.570
0.488
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IR11672AS
Part Marking Information
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© 2009 International Rectifier
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IR11672AS
Ordering Information
Standard Pack
Base Part Number
Package Type
Complete Part Number
Form
Quantity
Tube/Bulk
95
IR11672ASPBF
SOIC8N
IR11672AS
Tape and Reel
2500
IR11672ASTRPBF
The information provided in this document is believed to be accurate and reliable. However, International Rectifier assumes no
responsibility for the consequences of the use of this information. International Rectifier assumes no responsibility for any infringement
of patents or of other rights of third parties which may result from the use of this information. No license is granted by implication or
otherwise under any patent or patent rights of International Rectifier. The specifications mentioned in this document are subject to
change without notice. This document supersedes and replaces all information previously supplied.
For technical support, please contact IR’s Technical Assistance Center
http://www.irf.com/technical-info/
WORLD HEADQUARTERS:
233 Kansas St., El Segundo, California 90245
Tel: (310) 252-7105
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© 2009 International Rectifier
25
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