IR2103STRPBF [INFINEON]
Half-Bridge Driver; 半桥驱动器型号: | IR2103STRPBF |
厂家: | Infineon |
描述: | Half-Bridge Driver |
文件: | 总18页 (文件大小:1102K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
IR2103(S)PBF
Half-Bridge Driver
Features
Product Summary
Floating channel designed for bootstrap operation
Fully operational to +600V
Tolerant to negative transient voltage
dV/dt immune
Gate drive supply range from 10 to 20V
Undervoltage lockout
3.3V, 5V and 15V logic compatible
Cross-conduction prevention logic
Matched propagation delay for both channels
Internal set deadtime
High side output in phase with HIN input
Low side output out of phase with LIN input
VOFFSET (max)
600V
130mA / 270mA
10V – 20V
680 & 150 ns
520 ns
I
O+/-
V
OUT
ton/off (typ.)
Deadtime (typ.)
Package Options
Description
The IR2103(S) are high voltage, high speed power MOSFET and
IGBT drivers with dependent high and low side referenced output
channels. Proprietary HVIC and latch immune CMOS technologies
enable ruggedized monolithic construction. The logic input is
compatible with standard CMOS or LSTTL output, down to 3.3V
logic. The output drivers feature a high pulse current buffer stage
designed for minimum driver cross-conduction. The floating channel
can be used to drive an N-channel power MOSFET or IGBT in the
high side configuration which operates up to 600 volts.
8 Lead SOIC
8 Lead PDIP
Ordering Information
Standard Pack
Base Part Number
Package Type
Orderable Part Number
Form
Tube
Quantity
95
IR2103SPBF
IR2103SPBF
IR2103PBF
SO8N
SO8N
PDIP8
IR2103SPBF
IR2103STRPBF
IR2103PBF
Tape and Reel
Tube
2500
50
1
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© 2013 International Rectifier
April 18, 2013
IR2103(S)PBF
Table of Contents
Description
Page
1
1
Ordering Information
Typical Connection Diagram
Absolute Maximum Ratings
Recommended Operating Conditions
Dynamic Electrical Characteristics
Static Electrical Characteristics
Functional Block Diagrams
Lead Definitions
3
4
4
5
5
6
7
Lead Assignments
7
Application Information and Additional Details
Package Details: PDIP8, SO8N
Tape and Reel Details: SO8N
Part Marking Information
Qualification Information
8
15
16
17
18
2
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© 2013 International Rectifier
April 18, 2013
IR2103(S)PBF
Typical Connection Diagram
3
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© 2013 International Rectifier
April 18, 2013
IR2103(S)PBF
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage
parameters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are
measured under board mounted and still air conditions.
Symbol
Definition
Min.
Max.
Units
High side floating absolute voltage
High side floating supply offset voltage
-0.3
625
V
V
B
V - 25
B
V + 0.3
B
S
V
V
High side floating output voltage
Low side and logic fixed supply voltage
Low side output voltage
HO
V - 0.3
V + 0.3
S
B
V
-0.3
-0.3
-0.3
25
CC
V
V
+ 0.3
+ 0.3
LO
CC
V
V
CC
Logic input voltage (HIN & ¯L¯IN¯)
IN
V/ns
W
dV /dt
Allowable offset supply voltage transient
Package power dissipation
—
—
—
50
1
S
8 lead PDIP
8 lead SOIC
8 lead PDIP
8 lead SOIC
P
D
@ T ≤ +25°C
0.625
125
200
150
150
300
A
—
—
Thermal resistance, junction to
ambient
°C/W
Rth
JA
Junction temperature
—
T
J
Storage temperature
-55
—
T
S
°C
Lead temperature (soldering, 10 seconds)
T
L
Recommended Operating Conditions
The input/output logic timing diagram is shown in figure 1. For proper operation the device should be used within
the recommended conditions. The V offset rating is tested with all supplies biased at 15V differential.
S
Symbol
Definition
Min.
Max.
Units
High side floating absolute voltage
High side floating supply offset voltage
V
V
V + 10
V + 20
B
S
S
†
600
S
V
V
V
V
High side floating output voltage
Low side and logic fixed supply voltage
Low side output voltage
HO
S
B
V
20
10
0
CC
V
V
CC
LO
0
V
V
Logic input voltage (HIN & LIN)
Ambient temperature
IN
CC
°C
-40
125
T
A
†
Logic operational for VS of -5 to +600V. Logic state held for VS of -5V to -VBS. (Please refer to the Design Tip DT97-3 for
more details).
4
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© 2013 International Rectifier
April 18, 2013
IR2103(S)PBF
Dynamic Electrical Characteristics
V
BIAS
(V , V ) = 15V, C = 1000 pF and T = 25°C unless otherwise specified.
CC BS L A
Symbol Definition
Min.
—
Typ.
680
150
100
50
Max.
820
220
170
60
Units
Test Conditions
V = 0V
Turn-on propagation delay
Turn-off propagation delay
Turn-on rise time
t
t
on
off
S
—
V = 600V
S
—
t
r
ns
Turn-off fall time
—
t
f
Deadtime, LS turn-off to HS turn-on
& HS turn-on to LS turn-off
Delay matching, HS & LS turn on/off
DT
MT
400
520
650
60
—
—
Static Electrical Characteristics
V
BIAS
(V , V ) = 15V and T = 25°C unless otherwise specified. The V , V
and I parameters are
TH, IN
CC
BS
A
IN
referenced to COM. The V and I parameters are referenced to COM and are applicable to the respective
O
O
output leads: HO or LO.
Symbol Definition
Min.
Typ.
Max.
Units
Test Conditions
Logic ―1‖ (HIN) & Logic ―0‖ ( ¯L¯IN¯)
input voltage
3
—
—
V
V
= 10V to 20V
= 10V to 20V
IH
CC
CC
V
Logic ―0‖ (HIN) & Logic ―1‖ ( ¯L¯IN¯)
input voltage
—
—
0.8
V
V
IL
—
—
—
—
—
—
100
100
50
V
High level output voltage V
Low level output voltage, V
- V
I = 0A
O
OH
BIAS
O
mV
V
I = 0A
O
OL
LK
O
Offset supply leakage current
Quiescent V supply current
—
I
V = V = 600V
B
S
30
150
3
55
I
V
= 0V or 5V
QBS
QCC
BS
IN
IN
270
10
μA
I
Quiescent V supply current
V
= 0V or 5V
CC
Logic ―1‖ input bias current
Logic ―0‖ input bias current
—
—
I
H
H
= 5V, ¯L¯IN¯ =0V
= 0V, ¯L¯IN¯ =5V
IN+
IN
IN
—
1
I
IN-
V
supply undervoltage positive
CC
8
8.9
8.2
9.8
9
V
CCUV+
going threshold
V
V
CC
supply undervoltage negative
7.4
130
270
V
CCUV-
going threshold
Output high short circuit pulsed
current
V = 0V, V = V
O
IN
IH
210
360
—
—
I
O+
PW ≤ 10 μs
mA
Output low short circuit pulsed
current
V = 15V , V = V
O
IN
IL
I
O-
PW ≤ 10 μs
5
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© 2013 International Rectifier
April 18, 2013
IR2103(S)PBF
Functional Block Diagram
6
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© 2013 International Rectifier
April 18, 2013
IR2103(S)PBF
Lead Definitions
Symbol Description
HIN
¯L¯IN¯
Logic input for high side gate driver output (HO), in phase
Logic input for low side gate driver output (LO), out of phase
High side floating supply
V
B
HO
High side gate drive output
High side floating supply return
Low side and logic fixed supply
Low side gate drive output
V
V
S
CC
LO
COM
Low side return
Lead Assignments
VB
8
VCC
HIN
1
2
3
4
HO
VS
7
6
5
LIN
LO
COM
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© 2013 International Rectifier
April 18, 2013
IR2103(S)PBF
Application Information and Additional Details
Figure 1. Input/Output Timing Diagram
Figure 2. Switching Time Waveform Definitions
Figure 3. Deadtime Waveform Definitions
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IR2103(S)PBF
Figure 4A. Turn-On Time vs. Temperature
Figure 4C. Turn-On Time vs. Input Voltage
Figure 5B. Turn-Off Time vs. Supply Voltage
Figure 4B. Turn-On Time vs. Supply Voltage
Figure 5A. Turn-Off Time vs. Temperature
Figure 5C. Turn-Off Time vs. Input Voltage
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© 2013 International Rectifier
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IR2103(S)PBF
Figure 6A. Turn-On Rise Time vs. Temperature
Figure 6B. Turn-On Rise Time vs. Voltage
Figure 7A. Turn Off Fall Time vs. Temperature
Figure 7B. Turn Off Fall Time vs. Voltage
Figure 8A. Deadtime vs. Temperature
Figure 8B. Deadtime vs. Voltage
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© 2013 International Rectifier
April 18, 2013
IR2103(S)PBF
Figure 9A. Logic “1” ( H¯¯IN¯) & Logic “0” ( ¯L¯IN¯) Input
Figure 9B. Logic “1” ( H¯¯IN¯) & Logic “0” ( ¯L¯IN¯) Input
Voltage vs. Temperature
Voltage vs. Voltage
Figure 10A. Logic “0” ( H¯¯IN¯)) & Logic “1” ( ¯L¯IN¯) Input Figure 10B. Logic “0” (HIN) & Logic “1” (LIN) Input
Voltage vs. Temperature
Voltage vs. Voltage
Figure 11A. High Level Output vs. Temperature
Figure 11B. High Level Output vs. Voltage
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© 2013 International Rectifier
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IR2103(S)PBF
Figure 12A. Low Level Output vs. Temperature
Figure 12B. Low Level Output vs. Voltage
Figure 13A. Offset Supply Current vs. Temperature
Figure 13B. Offset Supply Current vs. Voltage
Figure 14A. V
Supply Current vs. Temperature
Figure 14B. V Supply Current vs. Voltage
BS
BS
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© 2013 International Rectifier
April 18, 2013
IR2103(S)PBF
Figure 15A. V Supply Current vs. Temperature
Figure 15B. V Supply Current vs. Voltage
CC
CC
Figure 16A. Logic “1” Input Current vs. Temperature
Figure 16B. Logic “1” Input Current vs. Voltage
Figure 17A. Logic “0” Input Current vs. Temperature
Figure 17B. Logic “0” Input Current vs. Voltage
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© 2013 International Rectifier
April 18, 2013
IR2103(S)PBF
Figure 18A. V Undervoltage Threshold (+) vs.
Figure 18B. V Undervoltage Threshold (-) vs.
CC
CC
Temperature
Temperature
Figure 19A. Output Source Current vs. Temperature
Figure 19B. Output Source Current vs. Voltage
Figure 20A. Output Sink Current vs. Temperature
Figure 20A. Output Sink Current vs. Voltage
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© 2013 International Rectifier
April 18, 2013
IR2103(S)PBF
Package Details: PDIP8, SO8N
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© 2013 International Rectifier
April 18, 2013
IR2103(S)PBF
Tape and Reel Details: SO8N
LOADED TAPE FEED DIRECTION
A
B
H
D
F
C
NOTE : CONTROLLING
DIMENSION IN MM
E
G
CARRIER TAPE DIMENSION FOR 8SOICN
Metric Imperial
Code
A
B
C
D
E
F
G
H
Min
7.90
3.90
11.70
5.45
6.30
5.10
1.50
1.50
Max
8.10
4.10
12.30
5.55
6.50
5.30
n/a
Min
Max
0.318
0.161
0.484
0.218
0.255
0.208
n/a
0.311
0.153
0.46
0.214
0.248
0.200
0.059
0.059
1.60
0.062
F
D
B
C
A
E
G
H
REEL DIMENSIONS FOR 8SOICN
Metric
Imperial
Code
A
B
C
D
E
F
G
H
Min
329.60
20.95
12.80
1.95
98.00
n/a
14.50
12.40
Max
330.25
21.45
13.20
2.45
102.00
18.40
17.10
14.40
Min
12.976
0.824
0.503
0.767
3.858
n/a
Max
13.001
0.844
0.519
0.096
4.015
0.724
0.673
0.566
0.570
0.488
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© 2013 International Rectifier
April 18, 2013
IR2103(S)PBF
Part Marking Information
Part number
Date code
IRxxxxx
YWW ?
IR logo
Pin 1
Identifier
? XXXX
Lot Code
(Prod mode –
4 digit SPN code)
?
MARKING CODE
P
Lead Free Released
Non-Lead Free Released
Assembly site code
Per SCOP 200-002
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© 2013 International Rectifier
April 18, 2013
IR2103(S)PBF
Qualification Information†
Industrial††
(per JEDEC JESD 47)
Qualification Level
Comments: This family of ICs has passed JEDEC’s
Industrial qualification. IR’s Consumer qualification level is
granted by extension of the higher Industrial level.
MSL2†††
SOIC8N
(per IPC/JEDEC J-STD 020)
Moisture Sensitivity Level
RoHS Compliant
Not applicable
(non-surface mount package style)
PDIP8
Yes
†
Qualification standards can be found at International Rectifier’s web site http://www.irf.com/
†† Higher qualification ratings may be available should the user have such requirements. Please contact your
International Rectifier sales representative for further information.
††† Higher MSL ratings may be available for the specific package types listed here. Please contact your
International Rectifier sales representative for further information.
The information provided in this document is believed to be accurate and reliable. However, International Rectifier assumes no responsibility
for the consequences of the use of this information. International Rectifier assumes no responsibility for any infringement of patents or of
other rights of third parties which may result from the use of this information. No license is granted by implication or otherwise under any
patent or patent rights of International Rectifier. The specifications mentioned in this document are subject to change without notice. This
document supersedes and replaces all information previously supplied.
For technical support, please contact IR’s Technical Assistance Center
http://www.irf.com/technical-info/
WORLD HEADQUARTERS:
233 Kansas St., El Segundo, California 90245
Tel: (310) 252-7105
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April 18, 2013
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