IR2109 [INFINEON]
HALF-BRIDGE DRIVER; 半桥驱动器型号: | IR2109 |
厂家: | Infineon |
描述: | HALF-BRIDGE DRIVER |
文件: | 总9页 (文件大小:174K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
Data Sheet No. PD60163-P
( )
S
IR2109(4)
HALF-BRIDGE DRIVER
Features
Product Summary
Floating channel designed for bootstrap operation
•
Fully operational to +600V
Tolerant to negative transient voltage
dV/dt immune
V
600V max.
OFFSET
I +/-
120 mA / 250 mA
10 - 20V
Gate drive supply range from 10 to 20V
Undervoltage lockout for both channels
3.3V, 5V and 15V input logic compatible
Cross-conduction prevention logic
Matched propagation delay for both channels
High side output in phase with IN input
Logic and power ground +/- 5V offset.
Internal 540ns dead-time, and programmable
O
•
•
V
OUT
•
•
t
(typ.)
750 & 200 ns
540 ns
on/off
•
•
Dead Time
•
(programmable up to 5uS for IR21094)
•
up to 5us with one external R resistor (IR21094)
DT
Packages
Lower di/dt gate driver for better noise immunity
Shut down input turns off both channels.
•
•
Description
14 Lead SOIC
14 Lead PDIP
The IR2109(4)(S) are high voltage, high speed power
MOSFET and IGBT drivers with dependent high and
low side referenced output channels.Proprietary HVIC
and latch immune CMOS technologies enable rugge-
dized monolithic construction. The logic input is
compatible with standard CMOS or LSTTL output,
down to 3.3V logic. The output drivers feature a high
pulse current buffer stage designed for minimum driver
8 Lead SOIC
8 Lead PDIP
cross-conduction. The floating channel can be used to drive an N-channel power MOSFET or IGBT in the
high side configuration which operates up to 600 volts.
Typical Connection
up to 600V
VCC
VCC
IN
VB
HO
VS
IN
TO
LOAD
SD
SD
up to 600V
COM
LO
IR21094
HO
VB
VS
IR2109
VCC
IN
VCC
IN
TO
LOAD
SD
DT
VSS
SD
(Refer to Lead Assignments for correct
configuration).This/These diagram(s) show
electrical connections only. Please refer to our
Application Notes and DesignTips for proper
circuit board layout.
COM
LO
VSS
RDT
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IR2109 4
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage param-
eters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured
under board mounted and still air conditions.
Symbol
Definition
High side floating absolute voltage
High side floating supply offset voltage
High side floating output voltage
Min.
Max.
Units
V
-0.3
625
B
S
V
V
B
- 25
V
+ 0.3
+ 0.3
25
B
V
HO
V
CC
V
S
- 0.3
V
B
Low side and logic fixed supply voltage
Low side output voltage
-0.3
-0.3
V
V
LO
V
V
V
V
+ 0.3
+ 0.3
+ 0.3
+ 0.3
CC
CC
CC
CC
DT
Programmable dead-time pin voltage (IR21094 only)
Logic input voltage (IN & SD)
V
- 0.3
SS
SS
CC
V
IN
V
V
- 0.3
- 25
V
SS
Logic ground (IR21094/IR21894 only)
Allowable offset supply voltage transient
dV /dt
—
50
V/ns
W
S
P
D
Package power dissipation @ T ≤ +25°C (8 Lead PDIP)
—
—
—
—
—
—
—
—
—
-50
—
1.0
0.625
1.6
A
(8 Lead SOIC)
(14 lead PDIP)
(14 lead SOIC)
1.0
Rth
Thermal resistance, junction to ambient
(8 Lead PDIP)
(8 Lead SOIC)
(14 lead PDIP)
(14 lead SOIC)
125
200
75
JA
°C/W
°C
120
150
150
300
T
T
Junction temperature
J
Storage temperature
S
T
Lead temperature (soldering, 10 seconds)
L
2
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IR2109 4
Recommended Operating Conditions
The input/output logic timing diagram is shown in figure 1. For proper operation the device should be used within the
recommended conditions. The V and V offset rating are tested with all supplies biased at 15V differential.
S
SS
Symbol
Definition
Min.
Max.
Units
VB
High side floating supply absolute voltage
High side floating supply offset voltage
High side floating output voltage
V
+ 10
V + 20
S
S
V
Note 1
600
S
V
HO
V
V
B
S
V
Low side and logic fixed supply voltage
Low side output voltage
10
0
20
CC
V
V
V
LO
CC
CC
V
Logic input voltage (IN & SD)
V
V
V
IN
SS
SS
DT
Programmable dead-time pin voltage (IR21094 only)
Logic ground (IR21094 only)
V
CC
5
V
-5
SS
T
A
Ambient temperature
-40
125
°C
Note 1: Logic operational for V of -5 to +600V. Logic state held for V of -5V to -V . (Please refer to the Design Tip
S
S
BS
DT97-3 for more details).
Dynamic Electrical Characteristics
V
(V , V ) = 15V, V = COM, C = 1000 pF, T = 25°C, DT = VSS unless otherwise specified.
BIAS CC BS
L
A
SS
Symbol
Definition
Min. Typ. Max. Units Test Conditions
t
Turn-on propagation delay
—
—
—
—
—
—
750
200
200
0
950
280
280
70
V = 0V
S
on
off
t
Turn-off propagation delay
V
S
= 0V or 600V
t
sd
Shut-down propagation delay
MT
Delay matching, HS & LS turn-on/off
nsec
t
t
Turn-on rise time
150
50
220
80
V
V
= 0V
= 0V
r
S
S
Turn-off fall time
f
DT
Deadtime: LO turn-off to HO turn-on(DT
400
4
540
5
680
6
RDT= 0
LO-HO) &
HO turn-off to LO turn-on (DT
usec
nsec
RDT = 200k (IR21094)
RDT=0
HO-LO)
HO-LO
MDT
Deadtime matching = DT
- DT
—
0
60
LO - HO
—
0
600
RDT = 200k (IR21094)
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IR2109 4
Static Electrical Characteristics
V
(V , V ) = 15V, V = COM, DT= V
and T = 25°C unless otherwise specified. The V , V and I
SS A IL IH IN
BIAS
CC BS
SS
parameters are referenced to V /COM and are applicable to the respective input leads: IN and SD. The V , I and Ron
SS
O O
parameters are referenced to COM and are applicable to the respective output leads: HO and LO.
Symbol
Definition
Min. Typ. Max. Units Test Conditions
V
Logic “1” input voltage for HO & logic “0” for LO
2.9
—
—
0.8
—
V
V
V
V
= 10V to 20V
= 10V to 20V
= 10V to 20V
= 10V to 20V
IH
CC
CC
CC
CC
V
Logic “0” input voltage for HO & logic “1” for LO
—
—
IL
SD,TH+
V
—
SD input positive going threshold
SD input negative going threshold
2.9
—
V
V
—
0.8
1.4
0.6
50
SD,TH-
V
OH
High level output voltage, V
- V
—
—
0.8
0.3
—
I
I
= 20 mA
= 20 mA
BIAS
O
O
V
Low level output voltage, V
O
OL
LK
O
I
Offset supply leakage current
Quiescent V supply current
—
V = V = 600V
B S
µA
I
20
0.4
60
1.0
150
1.6
V
= 0V or 5V
= 0V or 5V
QBS
QCC
BS
IN
IN
I
Quiescent V
supply current
mA
V
CC
RDT = 0
I
Logic “1” input bias current
Logic “0” input bias current
—
—
5
1
20
2
IN = 5V, SD = 0V
IN = 0V, SD = 5V
IN+
µA
I
IN-
V
V
CC
and V supply undervoltage positive going
8.0
8.9
9.8
CCUV+
BS
V
threshold
BSUV+
V
V
and V supply undervoltage negative going
7.4
0.3
8.2
0.7
9.0
—
CCUV-
CC
BS
V
V
threshold
BSUV-
V
Hysteresis
CCUVH
V
BSUVH
I
Output high short circuit pulsed vurrent
Output low short circuit pulsed current
120
250
200
350
—
—
V
= 0V, PW ≤ 10 µs
V = 15V,PW ≤ 10 µs
O
O+
O
mA
I
O-
4
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IR2109 4
Functional Block Diagrams
VB
UV
DETECT
IR2109
HO
VS
R
R
Q
PULSE
FILTER
HV
LEVEL
SHIFTER
S
VSS/COM
LEVEL
SHIFT
IN
PULSE
GENERATOR
VCC
LO
DEADTIME
UV
DETECT
+5V
VSS/COM
LEVEL
SHIFT
DELAY
SD
COM
VB
UV
IR21094
DETECT
HO
R
R
S
Q
PULSE
FILTER
HV
LEVEL
SHIFTER
VSS/COM
LEVEL
SHIFT
IN
VS
PULSE
GENERATOR
VCC
LO
DEADTIME
DT
UV
DETECT
+5V
VSS/COM
LEVEL
SHIFT
DELAY
SD
C O M
VSS
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IR2109 4
Lead Definitions
Symbol Description
IN
Logic input for high and low side gate driver outputs (HO and LO), in phase with HO (referenced to COM
for IR2109 and VSS for IR21094)
Logic input for shutdown (referenced to COM for IR2109 and VSS for IR21094)
Programmable dead-time lead, referenced to VSS. (IR21094 only)
Logic Ground (21094 only)
SD
DT
VSS
V
High side floating supply
B
HO
High side gate drive output
V
V
High side floating supply return
S
Low side and logic fixed supply
CC
LO
Low side gate drive output
COM
Low side return
Lead Assignments
V
V
1
2
3
4
V
B
8
7
1
2
3
4
V
B
8
7
CC
CC
HO
HO
IN
IN
V
S
V
S
SD
6
5
SD
6
5
LO
LO
COM
COM
8 Lead PDIP
8 Lead SOIC
IR2109
IR2109S
14
13
12
11
10
9
14
13
12
11
10
9
1
2
3
4
5
6
7
V
1
2
3
4
5
6
7
V
CC
CC
V
V
IN
B
IN
B
HO
HO
SD
SD
V
S
V
S
DT
DT
VSS
VSS
COM
LO
COM
LO
8
8
14 Lead PDIP
14 Lead SOIC
IR21094
IR21094S
6
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IR2109 4
Case Outlines
01-6014
01-3003 01 (MS-001AB)
8 Lead PDIP
INCHES
MILLIMETERS
DIM
A
D
B
MIN
.0532
MAX
.0688
.0098
.020
MIN
1.35
0.10
0.33
0.19
4.80
3.80
MAX
1.75
0.25
0.51
0.25
5.00
4.00
FOOTPRINT
8X 0.72 [.028]
5
A
A1 .0040
b
c
.013
.0075
.189
.0098
.1968
.1574
8
1
7
2
6
3
5
6
D
E
e
H
E
.1497
0.25 [.010]
A
.050 BASIC
1.27 BASIC
6.46 [.255]
4
e 1 .025 BASIC
0.635 BASIC
H
K
L
y
.2284
.0099
.016
0°
.2440
.0196
.050
8°
5.80
0.25
0.40
0°
6.20
0.50
1.27
8°
3X 1.27 [.050]
e
6X
8X 1.78 [.070]
e1
K x 45°
A
C
y
0.10 [.004]
8X c
8X L
A1
B
8X b
7
0.25 [.010]
C A
5
6
7
DIMENS ION DOES NOT INCLUDE MOLD PROT RUS IONS .
MOLD PROTRUSIONS NOT TO EXCEED 0.15 [.006].
NOT ES :
1. DIMENSIONING & TOLERANCING PER ASME Y14.5M-1994.
2. CONTROLLING DIMENSION: MILLIMETER
DIMENS ION DOES NOT INCLUDE MOLD PROT RUS IONS .
MOLD PROTRUSIONS NOT TO EXCEED 0.25 [.010].
3. DIMENS IONS ARE S HOWN IN MILLIME TE RS [INCHES ].
4. OUTLINE CONFORMS TO JEDEC OUTLINE MS-012AA.
DIMENSION IS THE LENGTH OF LEAD FOR SOLDERING TO
A SUBSTRATE.
01-6027
01-0021 11 (MS-012AA)
8 Lead SOIC
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IR2109 4
01-6010
01-3002 03 (MS-001AC)
14 Lead PDIP
01-6019
01-3063 00 (MS-012AB)
14 Lead SOIC (narrow body)
8
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IR2109 4
IN
IN(LO)
50%
50%
t
SD
IN(HO)
t
t
t
f
on
off
90%
r
90%
HO
LO
LO
HO
10%
10%
Figure 1. Input/Output Timing Diagram
Figure 2. Switching Time Waveform Definitions
SD
50%
50%
50%
IN
t
sd
90%
HO
LO
90%
DT
10%
HO
LO
LO-HO
DT
HO-LO
10%
90%
Figure 3. Shutdown Waveform Definitions
IN(LO)
MDT=
DT
- DT
LO-HO
HO-LO
50%
50%
IN(HO)
Figure 4. Deadtime Waveform Definitions
LO
HO
10%
MT
MT
90%
LO
HO
Figure 5. Delay Matching Waveform Definitions
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105
Data and specifications subject to change without notice. 5/18/2001
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