IR21363STRPBF [INFINEON]
Half Bridge Based MOSFET Driver, 0.35A, PDSO28, MS-013AE, SOIC-28;
| 型号： | IR21363STRPBF |
| 厂家： | 
Infineon |
| 描述： | Half Bridge Based MOSFET Driver, 0.35A, PDSO28, MS-013AE, SOIC-28 驱动 光电二极管 接口集成电路 驱动器 |
| 文件： | 总27页 (文件大小：328K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Data Sheet No. PD60245
(
&
IR21363 J S)PbF
3-PHASE BRIDGE DRIVER
Features
Floating channel designed for bootstrap operation
•
Packages
Fully operational to +600V
Tolerant to negative transient voltage - dV/dt immune
Gate drive supply range from 12 to 20V
•
Undervoltage lockout for all channels
•
Over-current shutdown turns off all six drivers
•
Independent 3 half-bridge drivers
•
Matched propagation delay for all channels
•
28-Lead SOIC
Cross-conduction prevention logic
•
28-Lead PDIP
Lowside outputs out of phase with inputs. High side
•
outputs out of phase
3.3V logic compatible
•
Lower di/dt gate driver for better noise immunity
•
Externally programmable delay for automatic fault clear
•
44-Lead PLCC w/o 12 leads
Description
The IR21363(J&S) are high votage, high speed power MOSFET and IGBT drivers with three independent high and
low side referenced output channels for 3-phase applications. Proprietary HVIC technology enables ruggedized
monolithic construction. Logic inputs are compatible with CMOS or LSTTL outputs, down to 3.3V logic. A
current trip function which terminates all six outputs can be derived from an external current sense resistor. An
enable function is available to terminate all six outputs simultaneously. An open-drain FAULT signal is provided
to indicate that an overcurrent or undervoltage shutdown has occurred. Overcurrent fault conditions are cleared
automatically after a delay programmed externally via an RC network connected to the RCIN input. The output
drivers feature a high pulse current buffer stage designed for minimum driver cross-conduction. Propagation
delays are matched to simplify use in high frequency applications. The floating channel can be used to drive N-
channel power MOSFETs or IGBTs in the high side configuration which operates up to 600 volts.
Typical Connection
up to 600V
VCC
HHIN1,2,3
LIN1,2,3
FAULT
VCC
HIN1,2,3
LIN1,2,3
FAULT
EN
/
VB1,2,3
HO1,2,3
VS1,2,3
EN
TO
LOAD
RCIN
ITRIP
VSS
LO1,2,3
COM
GND
(Refer to Lead Assignments for correct pin configuration). This/These diagram(s) show electrical connections only.
Please refer to our Application Notes and DesignTips for proper circuit board layout.
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1
(
IR21363
J&S)PbF
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters
are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured under board
mounted and still air conditions.
Symbol
Definition
Min.
Max.
Units
V
S
High side offset voltage
V
V
- 25
V
V
+ 0.3
B1,2,3
B1,2,3
V
High side floating supply voltage
High side floating output voltage
Low side and logic fixed supply voltage
Logic ground
-0.3
625
+ 0.3
B1,2,3
BS
V
- 0.3
HO
S1,2,3
V
-0.3
25
CC
V
V
V
- 25
V
+ 0.3
SS
CC
CC
V
V
Low side output voltage
-0.3
- 0.3
SS
V
+ 0.3
LO1,2,3
CC
V
IN
Input voltage LIN,HIN,ITRIP, EN, RCIN
lower of
(V + 15) or
SS
V
CC
+ 0.3)
V
FLT
FAULT output voltage
V
SS
- 0.3
V
+ 0.3
CC
dV/dt
Allowable offset voltage slew rate
—
50
V/ns
P
D
Package power dissipation @ T ≤ +25°C (28 lead PDIP)
A
—
—
—
—
—
—
—
-55
—
1.5
1.6
2.0
83
(28 lead SOIC)
W
(44
Thermal resistance, junction to ambient
lead
PLCC)
Rth
JA
(28 lead PDIP)
(28 lead SOIC)
(44 lead PLCC)
78
°C/W
63
T
J
Junction temperature
150
150
300
T
S
Storage temperature
°C
T
L
Lead temperature (soldering, 10 seconds)
Recommended Operating Conditions
The Input/Output logic timing diagram is shown in figure 1. For proper operation the device should be used within the recom-
mended conditions. All voltage parameters are absolute referenced to COM. The V offset rating is tested with all supplies
S
biased at 15V differential.
Symbol
Definition
Min.
Max.
Units
V
B1,2,3
High side floating supply voltage
V
S1,2,3
+12
V
S1,2,3
+20
V
High side floating supply offset voltage
High side output voltage
Low side output voltage
Low side and logic fixed supply voltage
Logic ground
Note 1
600
S1,2,3
V
V
S1,2,3
V
B1,2,3
HO1,2,3
V
0
V
CC
LO1,2,3
V
V
12
-5
20
CC
V
5
SS
V
FLT
FAULT output voltage
V
SS
V
CC
V
RCIN
RCIN input voltage
V
SS
V
CC
V
ITRIP input voltage
V
V
+5
ITRIP
SS
SS
SS
V
Logic input voltage ꢀꢁꢂ, HIN
V
SS
V
+5
IN
o
T
Ambient temperature
-40
125
C
A
Note 1: Logic operational for V of COM -5V to COM +600V. Logic state held for V of COM -5V to COM -V .
S S BS
(Please refer to the Design Tip DT97-3 for more details).
Note 2: All input pins and the ITRIP pin are internally clamped with a 5.2V zener diode.
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IR21363
J&S)PbF
Static Electrical Characteristics
(V , V 1,2,3) = 15V unless otherwise specified. The V , V and I parameters are referenced to V and
IN TH IN SS
V
BIAS CC BS
are applicable to all six channels (H 1,2,3 and L 1,2,3). The V and I parameters are referenced to COM and V 1,2,3
S S O O S
and are applicable to the respective output leads: H
and L
O1,2,3.
O1,2,3
Symbol
Definition
Min. Typ. Max. Units Test Conditions
V
Logic “0” input voltage LIN1,2,3, HIN1,2,3
Logic “1” input voltage LIN1,2,3, HIN1,2,3
EN positive going threshold
3.0
—
—
—
—
0.8
3
IH
V
IL
V
—
—
EN,TH+
V
EN negative going threshold
ITRIP positive going threshold
ITRIP input hysteresis
0.8
0.37
—
—
—
EN,TH-
V
0.46
0.07
8
0.55
—
IT,TH+
V
IT,HYS
V
RCIN positive going threshold
RCIN input hysteresis
—
—
RCIN,TH+
V
—
3
—
RCIN,HYS
V
High level output voltage, V
- V
—
0.9
0.4
11.1
1.4
0.6
11.6
V
I
= 20 mA
I = 20 mA
O
OH
BIAS
O
O
V
Low level output voltage, V
—
OL
O
V
V
and V supply undervoltage
BS
10.6
CCUV+
CC
V
positive going threshold
BSUV+
V
V
and V supply undervoltage
BS
10.4
10.9
0.2
11.4
CCUV-
CC
V
BSUV-
negative going threshold
V
V
and V supply undervoltage
BS
—
—
CCUVH
CC
V
lockout hysteresis
BSUVH
I
Offset supply leakage current
—
—
—
70
50
120
—
V
=V
B1,2,3 S1,2,3=600V
LK
µA
I
Quiescent V supply current
BS
QBS
V
IN
= 0V or 5V
I
Quiescent V
supply current
CC
—
3.3
5.2
200
100
200
100
30
mA
V
QCC
V
4.9
—
5.5
300
220
300
220
100
1
I
IN,CLAMP
Input clamp voltage (HIN, LIN, ITRIP and EN)
Input bias current (LOUT = HI)
IN =100µA
V
LIN = 5V
I
LIN+
I
Input bias current (LOUT = LO)
Input bias current (HOUT = HI)
Input bias current (HOUT = LO)
“high” ITRIP input bias current
“low” ITRIP input bias current
“high” ENABLE input bias current
“low” ENABLE input bias current
RCIN input bias current
—
V
LIN-
LIN = 0V
I
—
V
HIN+
HIN = 5V
I
—
V
HIN-
HIN = 0V
µA
I
—
V
= 5V
=0V
ITRIP+
ITRIP
I
—
0
V
ITRIP
ITRIP-
I
—
30
100
1
V
= 5V
= 0V
EN+
ENABLE
I
—
0
V
ENABLE
EN-
I
—
0
1
V
=0Vor 15V
RCIN
RCIN
I
Output high short circuit pulsed current
Output low short circuit pulsed current
RCIN low on resistance
120
250
—
200
350
50
—
V =0V, PW ≤ 10 µs
O
O+
mA
I
—
V =15V, PW ≤10 µs
O
O-
R
100
100
ON,RCIN
Ω
R
FAULT low on resistance
—
50
ON,FLT
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(
IR21363
J&S)PbF
Dynamic Electrical Characteristics
V
= V = V
BS
= 15V, V
= V = COM, TA = 25oC and C = 1000 pF unless otherwise specified.
L
S1,2,3 SS
CC
BIAS
Symbol
Definition
Min. Typ. Max. Units Test Conditions
t
Turn-on propagation delay
Turn-off propagation delay
Turn-on rise time
370
310
—
525
500
125
50
680
690
190
75
on
V
= 0 & 5V
IN
t
off
t
r
t
f
Turn-off fall time
—
t
ENABLE low to output
300
450
600
V
V = 0V or 5V
IN, EN
EN
shutdown propagation delay
ITRIP to output shutdown propagation delay
ITRIP blanking time
t
500
100
750
150
1000
—
V
= 5V
= 0V or 5V
= 5V
ITRIP
ITRIP
nS
t
bl
V
V
IN
V
ITRIP
t
ITRIP to FAULT propagation delay
400
—
600
800
= 0V or 5V
IN
FLT
V
ITRIP
= 5V
t
Input filter time (HIN, LIN)
(EN)
310
200
1.65
—
—
2
V
= 0 & 5V
IN
FILIN
100
t
FAULT clear time RCIN: R=2meg, C=1nF
1.3
mS
V
= 0V or 5V
= 0V
FLTCLR
IN
V
ITRIP
DT
MT
Deadtime
220
—
290
40
360
75
V
= 0 & 5V
IN
Matching delay ON and OFF
Matching delay, max (t ,t ) - min (t ,t ),
External dead
time
nS
MDT
—
25
70
on off
on off
(ton,toff are applicable to all 3 channels)
>400nsec
PM
Output pulse width matching, PWin -PWout (fig.2)
—
40
75
NOTE: For high side PWM, HIN pulse width must be ≥ 1µsec
VCC
<UVCC
15V
VBS
X
ITRIP
X
ENABLE
FAULT
LO1,2,3
HO1,2,3
X
0 (note 1)
high imp
high imp
0 (note 2)
high imp
0
LIN1,2,3
LIN1,2,3
0
0
<UVBS
15V
0V
5V
5V
5V
0V
0
15V
0V
HIN1,2,3
15V
15V
>V
0
0
ITRIP
15V
15V
0V
0
Note: A shoot-through prevention logic prevents LO1,2,3 and HO1,2,3 for each channel from turning on simultaneously.
Note 1: UVCC is not latched, when VCC>UVCC, FAULT returns to high impedance.
Note 2: When ITRIP <V
, FAULT returns to high-impedance after RCIN pin becomes greater than 8V (@ VCC = 15V)
ITRIP
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(
IR21363
J&S)PbF
Functional Block Diagram
VB1
HO1
INPUT
NOISE
FILTER
HIN1
SET
LATCH
VSS/COM
LEVEL
HV
DEADTIME
&
SHOOT-THROUGH
PREVENTION
DRIVER
LEVEL
SHIFTER
RESET
UV
DETECT
SHIFTER
INPUT
NOISE
FILTER
LIN1
VS1
VB2
INPUT
NOISE
FILTER
HIN2
LIN2
SET
LATCH
VSS/COM
LEVEL
SHIFTER
HV
LEVEL
SHIFTER
DEADTIME
&
DRIVER
HO2
RESET
SHOOT-THROUGH
PREVENTION
UV
DETECT
INPUT
NOISE
FILTER
VS2
VB3
INPUT
NOISE
FILTER
HIN3
LIN3
VSS
SET
LATCH
VSS/COM
LEVEL
SHIFTER
HV
LEVEL
SHIFTER
DEADTIME
&
DRIVER
HO3
VS3
RESET
SHOOT-THROUGH
PREVENTION
UV
DETECT
INPUT
NOISE
FILTER
VCC
LO1
UV
INPUT
NOISE
FILTER
VSS/COM
LEVEL
DETECT
EN
DRIVER
DRIVER
DRIVER
DELAY
DELAY
DELAY
SHIFTER
INPUT
NOISE
FILTER
+
-
ITRIP
VSS/COM
LEVEL
0.5V
S
R
Q
LO2
SET
SHIFTER
DOMINANT
LATCH
RCIN
VSS/COM
LEVEL
SHIFTER
LO3
FAULT
COM
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(
IR21363
J&S)PbF
Lead Definitions
Symbol Description
V
Low side and logic fixed supply
Logic Ground
HIN1,2,3 Logic inputs for high side gate driver outputs (HO1,2,3), out of phase
LIN1,2,3 Logic inputs for low side gate driver outputs (LO1,2,3), out of phase
CC
VSS
FAULT
Indicates over-current (ITRIP) or low-side undervoltage lockout has occured. Negative logic,
open-drain output
EN
Logic input to enable I/O functionality. Positive logic, i.e. I/O logic functions when ENABLE is
high. No effect on FAULT and not latched
ITRIP
Analog input for overcurrent shutdown. When active, ITRIP shuts down outputs and activates
FAULT and RCIN low. When ITRIP becomes inactive, FAULT stays active low for an externally
set time TFLTCLR, then automatically becomes inactive (open-drain high impedance).
External RC network input used to define FAULT CLEAR delay, TFLTCLR, approximately equal
to R*C. When RCIN>8V, the FAULT pin goes back into open-drain high-impedance
Low side gate driver return
RCIN
COM
V 1,2,3 High side floating supply
B
HO1,2,3 High side gate driver outputs
V
High voltage floating supply returns
S1,2,3
LO1,2,3 Low side gate driver output
Note: All input pins and the ITRIP pin are internally clamped with a 5.2V zener diode.
Lead Assignments
1
2
28
27
26
25
VCC
HIN1
HIN2
HIN3
LIN1
LIN2
LIN3
FAULT
ITRIP
EN
VB1
HO1
VS1
1
2
28
27
26
25
24
23
22
21
20
19
18
17
VCC
HIN1
HIN2
HIN3
LIN1
LIN2
LIN3
FAULT
ITRIP
EN
VB1
HO1
VS1
3
3
6
5
4
3
43
42
41
4
7
4
LIN1
LIN2
LIN3
8
5
VB2 24
5
VB2
HO2
VS2
9
37
36
35
VB2
HO2
VS2
6
23
22
21
20
19
18
17
HO2
VS2
6
10
11
12
13
7
7
8
8
FAULT
9
VB3
HO3
VS3
9
VB3
HO3
VS3
ITRIP 14
15
10
11
12
10
11
12
31
30
29
VB3
HO3
VS3
RCIN
VSS
RCIN
VSS
EN 16
17
RCIN
13 COM
14
LO1 16
15
LO2
13 COM
14
LO1 16
15
LO2
18
19
20
21
22
23
24
25
LO3
LO3
28 Lead PDIP
44 Lead PLCC w/o 12 leads
28 lead SOIC (wide body)
IR21363
IR21363(J)
IR21363(S)
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(
IR21363
J&S)PbF
HIN1,2,3
HIN1,2,3
LIN1,2,3
EN
ITRIP
FAULT
RCIN
HO1,2,3
LO1,2,3
Figure 1. Input/Output Timing Diagram
LIN1,2,3
HIN1,2,3
50%
50%
50%
EN
PWIN
ten
LIN1,2,3
HIN1,2,3
50%
50%
90%
HO1,2,3
LO1,2,3
ton
tr
toff
tf
PWOUT
90%
90%
HO1,2,3
LO1,2,3
10%
10%
Figure 3. Output Enable Timing Waveform
Figure 2. Switching Time Waveforms
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IR21363
J&S)PbF
LIN1,2,3
HIN1,2,3
50%
50%
LIN1,2,3
HIN1,2,3
50%
50%
50%
50%
DT
LO1,2,3
HO1,2,3
DT
50%
50%
Figure 4. Internal Deadtime Timing Waveforms
Vrcin,th+
RCIN
ITRIP
50%
tflt
50%
50%
50%
FAULT
90%
tfltclr
Any
output
titrip
Figure 5. ITRIP/RCIN Timing Waveforms
tin,fil
tin,fil
U
HIN/LIN
on
on off
low
on off
high
off
HO/LO
Figure 5.5 Input Filter Function
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IR21363
J&S)PbF
400
300
200
100
0
400
300
200
100
0
Max.
Typ.
Max.
Typ.
10
12
14
16
18
20
-50
-25
0
25
50
75
100
125
Temperature (oC)
Supply Voltage (V)
Figure 6A. Turn-on Rise Time vs. Temperature
Figure 6B. Turn-on Rise Time vs. Supply Voltage
200
150
100
200
150
100
50
Max.
Typ.
Max.
50
Typ.
0
0
10
12
14
16
18
20
-50
-25
0
25
50
75
100
125
Temperature (oC)
Supply Voltage (V)
Figure 7A. Turn-off Fall Time vs. Temperature
Figure 7B. Turn-off Fall Time vs. Supply Voltage
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IR21363
J&S)PbF
1000
800
600
400
200
0
1000
800
Max.
Typ.
Min.
600
Max.
Typ.
400
Min.
200
0
10
12
14
16
18
20
-50
-25
0
25
50
75
100
125
Temperature (oC)
Supply Voltage (V)
Figure 8A. EN to Output Shutdown Time
vs. Temperature
Figure 8B. EN to Output Shutdown Time
vs. Supply Voltage
1000
1500
800
600
400
200
0
1200
900
600
300
0
Max.
Max.
Typ.
Typ.
Min.
Min.
-50
-25
0
25
50
75
100
125
3
3.5
4
4.5
5
Temperature (oC)
EN Voltage (V)
Figure 8C. EN to Output Shutdown Time
vs. EN Voltage
Figure 9A. ITRIP to Output Shutdown Time
vs. Temperature
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(
IR21363
J&S)PbF
1500
1200
900
600
300
0
1200
1000
800
600
400
200
0
Max.
Typ.
Max.
Typ.
Min.
Min.
10
12
14
16
18
20
-50
-25
0
25
50
75
100
125
Temperature (oC)
Supply Voltage (V)
Figure 9B. ITRIP to Output Shutdown
Time vs. Supply Voltage
Figure 10A. ITRIP to FAULT Indication Time
vs. Temperature
1200
1000
800
600
400
200
0
3.0
2.5
2.0
1.5
1.0
0.5
Max.
Typ.
Max.
Typ.
Min.
Min.
-50
-25
0
25
50
75
100
125
10
12
14
16
18
20
Temperature (oC)
Supply Voltage (V)
Figure 10B. ITRIP to FAULT Indication
Time vs. Supply Voltage
Figure 11A. FAULT Clear Time
vs. Temperature
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IR21363
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3.0
2.5
600
500
400
300
200
100
0
Max.
2.0
Max.
Typ.
Min.
Typ.
1.5
Min.
1.0
0.5
-50
-25
0
25
50
75
100
125
10
12
14
16
18
20
Temperature (oC)
Supply Voltage (V)
Figure 11B. FAULT Clear Time
vs. Supply Voltage
Figure 12A. Dead Time
vs. Temperature
600
500
400
300
200
100
0
6
5
4
3
2
1
0
Max.
Typ.
Min.
Max.
10
12
14
16
18
20
-50
-25
0
25
50
75
100
125
Temperature (oC)
Supply Voltage (V)
Figure 12B. Dead Time vs. Supply Voltage
Figure 13A. Logic “0” Input Threshold
vs. Temperature
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IR21363
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6
5
4
3
2
1
0
6
5
4
3
2
1
0
Max.
Min.
10
12
14
16
18
20
-50
-25
0
25
Temperature (oC)
Logic “1” Input Threshold
vs. Temperature
50
75
100
125
Supply Voltage (V)
Figure 13B. Logic “0” Input Threshold
vs. Supply Voltage
Figure 14A.
6
5
4
3
2
1
0
800
700
600
500
400
300
200
Max.
Typ.
Min.
Min.
10
12
14
16
18
20
-50
-25
0
25
50
75
100
125
Supply Voltage (V)
Temperature (oC)
Figure 14B. Logic “1” Input Threshold
vs. Supply Voltage
Figure 15A. ITRIP Positive Going Threshold
vs. Temperature
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IR21363
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3.0
2.5
2.0
1.5
1.0
0.5
0.0
800
700
600
Max.
500
Typ.
Max.
Typ.
Min.
400
300
200
10
12
14
Supply Voltage (V)
Figure 15B. ITRIP Positive Going
16
18
20
-50
-25
0
25
50
75
100
125
Temperature (oC)
Figure 16A. High Level Output
vs. Temperature
Threshold vs. Supply Voltage
3.0
2.5
2.0
1.5
1.0
0.5
0.0
1.2
1.0
0.8
0.6
0.4
0.2
0.0
Max.
Typ.
Max.
Typ.
10
12
14
16
18
20
-50
-25
0
25
Temperature (oC)
Figure 17A. Low Level Output
vs. Temperature
50
75
100
125
Supply Voltage (V)
Figure 16B. High Level Output
vs. Supply Voltage
www.irf.com
14
(
IR21363
J&S)PbF
1.2
1.0
0.8
0.6
0.4
0.2
0.0
13
12
11
10
Max.
Typ.
Max.
Typ.
Min.
10
12
14
16
18
20
-50 -25
0
25
50
75 100 125
Supply Voltage (V)
Temperature (oC)
Figure 17B. Low Level Output
vs. Supply Voltage
Figure 18. VCC or VBS Undervoltage (+)
vs. Temperature
13
12
11
10
9
500
400
300
200
100
0
Max.
Typ.
Min.
Max.
-50 -25
0
25
Temperature (oC)
Figure 19. VCC or VBS Undervoltage (-)
50
75 100 125
-50
-25
0
25
Temperature (oC)
Figure 20A. Offset Supply Leakage Current
vs. Temperature
50
75
100
125
vs. Temperature
www.irf.com
15
(
IR21363
J&S)PbF
500
400
300
200
250
200
150
100
50
Max.
Typ.
100
Max.
0
0
-50
-25
0
25
50
75
100
125
100
200
300
400
500
600
Temperature (oC)
V
B Boost Voltage (V)
Figure 20B. Offset Supply Leakage Current
vs. VB Boost Voltage
Figure 21A. VB Supply Current
vs. Temperature
800
600
400
200
0
250
200
150
100
50
Max.
Typ.
Max.
Typ.
0
-50
-25
0
25
50
75
100
125
10
12
14
16
18
20
Temperature (oC)
VBS Floating Supply Voltage (V)
Figure 22A. Input Current vs. Temperature
Figure 21B. VBS Supply Current
vs. VBS Floating Supply Voltage
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16
(
IR21363
J&S)PbF
800
600
400
200
0
600
500
400
300
200
100
0
Max.
Typ.
Max.
Typ.
-50
-25
0
25
50
75
100
125
10
12
14
16
18
20
Supply Voltage (V)
Temperature (oC)
Figure 22B. Logic “1” Input Current
vs. Supply Voltage
Figure 23A. Logic “0” Input Current
vs. Temperature
250
200
150
100
50
600
500
400
300
200
100
0
Max.
Typ.
Max.
Typ.
0
-50
-25
0
25
50
75
100
125
10
12
14
Supply Voltage (V)
Figure 23B. Logic “0” Input Current
vs. Supply Voltage
16
18
20
Temperature (oC)
Figure 24A. High ITRIP Current
vs. Temperature
www.irf.com
17
(
IR21363
J&S)PbF
250
200
150
4
3
2
1
0
Max.
100
Max.
Typ.
50
0
Typ.
10
12
14
16
18
20
-50
-25
0
25
50
75
100
125
Temperature (oC)
Supply Voltage (V)
Figure 24B. “High” ITRIP Current
vs. Supply Voltage
Figure 25A. “Low” ITRIP Current
vs. Temperature
200
150
100
50
4
3
2
1
0
Max.
Max.
Typ.
Typ.
0
10
12
14
16
18
20
-50
-25
0
25
50
75
100
125
Temperature (oC)
Supply Voltage (V)
Figure 25B. ITRIP Current
vs. Supply Voltage
Figure 26A. “High” IEN Current
vs. Temperature
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18
(
IR21363
J&S)PbF
250
200
150
100
50
4
3
2
1
0
Max.
Typ.
Max.
Typ.
0
-50
-25
0
25
50
75
100
125
10
12
14
16
18
20
Temperature (oC)
Supply Voltage (V)
Figure 26B. “High” IEN Current
vs. Supply Voltage
Figure 27A. “Low” IEN Current
vs. Temperature
4
3
2
1
0
4
3
2
1
0
Max.
Typ.
M ax.
Typ.
10
12
14
16
18
20
-50
-25
0
25
50
75
100
125
Temperature (oC)
Supply Voltage (V)
Figure 27B. IEN Current
vs. Supply Voltage
Figure 28A. RCIN Input Bias Current
vs. Temperature
www.irf.com
19
(
IR21363
J&S)PbF
4
3
2
400
300
200
100
0
Typ.
Min.
Max.
1
Typ.
0
10
12
14
16
18
20
-50
-25
0
25
50
75
100
125
Temperature (oC)
Supply Voltage (V)
Figure 28B. RCIN Input Bias Current
vs. Supply Voltage
Figure 29A. Output Source Current
vs. Temperature
500
500
400
300
200
100
0
400
300
200
100
0
Typ.
Min.
Typ.
Min.
10
12
14
16
18
20
-50
-25
0
25
50
75
100
125
Temperature (oC)
Supply Voltage (V)
Figure 29B. Output Source Current
vs. Supply Voltage
Figure 30A. Output Sink Current
vs. Temperature
www.irf.com
20
(
IR21363
J&S)PbF
600
500
400
300
200
100
0
250
200
150
100
50
Typ.
Min.
Max.
Typ.
0
10
12
14
16
18
20
-50
-25
0
25
50
75
100
125
Temperature (oC)
Supply Voltage (V)
Figure 30B. Output Sink Current
vs. Supply Voltage
Figure 31A. RCIN Low On-resistance
vs. Temperature
250
200
150
100
50
250
200
150
100
50
Max.
Max.
Typ.
Typ.
0
0
10
12
14
16
18
20
-50
-25
0
25
Temperature (oC)
Figure 32A. FAULT Low On-resistance
vs. Temperature
50
75
100
125
Supply Voltage (V)
Figure 31B. RCIN Low On-resistance
vs. Supply Voltage
www.irf.com
21
(
IR21363
J&S)PbF
0
-3
250
200
Typ.
150
-6
Max.
100
-9
Typ.
50
-12
-15
0
10
12
14
16
18
20
10
12
14
16
18
20
Supply Voltage (V)
Supply Voltage (V)
Figure 32B. FAULT Low On-resistance
vs. Supply Voltage
Figure 33. Maximum VS Negative Offset
vs. VBS Supply Voltage
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22
(
IR21363
J&S)PbF
120
100
80
120
100
80
60
60
300V
200V
100
300V
200V
40
40
100V
0V
0V
20
20
0.1
1
10
Frequency (KHz)
Figure 34. IR21363 vs.
Frequency (IRG4BC20W), R e=33Ω, Vcc=15V
100
0.1
1
10
Frequency (KHz)
100
Figure 35. IR21363 vs.
Frequency (IRG4BC30W), R
=15Ω, Vcc=15V
gat
gate
120
120
100
80
100
80
300V
200V
60
60
100
300V
200V
100
V
0V
40
40
0V
V
20
20
0.1
1
10
Frequency (KHz)
100
0.1
1
10
100
Frequency (KHz)
Figure 36. IR21363 vs.
Frequency (IRG4BC40W), R e=10Ω, Vcc=15V
Figure 37. IR21363 vs.
Frequency (IRG4PC50W), R
=5Ω, Vcc=15V
gat
gate
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23
(
IR21363
J&S)PbF
120
100
80
120
100
80
60
60
300V
200V
100V
0V
300V
200V
100V
0V
40
40
20
20
0.1
1
10
Frequency (KHz)
100
0.1
1
10
Frequency (KHz)
100
Figure 38. IR21363 (J) vs.
Frequency (IRG4BC20W), R e=33Ω, Vcc=15V
Figure 39. IR21363 (J) vs.
gat
Frequency (IRG4BC30W), R =15Ω, Vcc=15V
gate
120
100
80
120
100
80
60
40
20
60
300V
200V
300V
200V
100V
0V
40
100V
0V
20
0.1
1
10
Frequency (KHz)
100
0.1
1
10
Frequency (KHz)
100
Figure 40. IR21363 (J) vs.
Frequency (IRG4BC40W), R e=10Ω, Vcc=15V
Figure 41. IR21363 (J) vs.
Frequency (IRG4PC50W), R
=5Ω, Vcc=15V
gat
gate
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24
(
IR21363
J&S)PbF
120
100
80
120
100
80
60
60
300V
300V
200V
100
200V
100
0V
40
40
V
0V
20
20
0.1
1
10
Frequency (KHz)
100
0.1
1
10
100
Frequency (KHz)
Figure 42. IR21363 (S) vs.
Figure 43. IR21363 (S) vs.
vs. Frequency (IRG4BC20W), R e=33Ω, Vcc=15V
gat
vs. Frequency (IRG4BC30W), R =15Ω, Vcc=15V
gate
120
100
80
120
100
80
300V
200V
100
V
60
60
300V
0V
200V
100
0V
40
40
20
20
0.1
1
10
100
0.1
1
10
Frequency (KHz)
100
Frequency (KHz)
Figure 44. IR21363 (S) vs.
vs. Frequency (IRG4BC40W), R e=10Ω, Vcc=15V
Figure 45. IR21363 (S) vs.
vs. Frequency (IRG4PC50W), R
=5Ω, Vcc=15V
gat
gate
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25
(
IR21363
J&S)PbF
Case outlines
01-6011
28-Lead PDIP (wide body)
01-3024 02 (MS-011AB)
01-6013
28-Lead SOIC (wide body)
01-3040 02 (MS-013AE)
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26
(
IR21363
J&S)PbF
NOTES
01-600900
01-3004 02(mod.) (MS-018AC)
44-Lead PLCC w/o 12 leads
WORLD HEADQUARTERS: 233 Kansas Street, El Segundo, California 90245 Tel: (310) 252-7105
http://www.irf.com/ Data and specifications subject to change without notice.
11/3/2005
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27
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