IR2157_技术文档

ADVANCED INFORMATION

Data Sheet No. PD60108B

IR2157

FULLY INTEGRATED BALLAST CONTROL IC

Features

Thermal overload protection

Programmable deadtime

•

Programmable preheat time & frequency

•

Programmable ignition ramp

Protection from failure-to-strike

Lamp filament sensing & protection

Protection from operation below resonance

Protection from low-line condition & automatic

restart (mimics a magnetic ballast)

Integrated 600V level-shifting gate driver

Internal 15.6V zener clamp diode on VCC

True micropower startup (150uA)

Latch immunity protection on all leads

ESD protection on all leads

Packages

Description

The IR2157 is a fully integrated, fully protected 600V ballast control IC designed to

drive virtually all types of rapid start fluorescent lamp ballasts. Externally program-

mable features such as preheat time & frequency, ignition ramp characteristics, and

running mode operating frequency provide a high degree of flexibility for the ballast

design engineer. Comprehensive protection features such as protection from failure

of a lamp to strike, filament failures, low dc bus conditions, thermal overload, or lamp

failure during normal operation, as well as an automatic restart function, have been

included in the design. The heart of this control IC is a variable frequency oscillator

with externally programmmable deadtime. Precise control of a 50% duty cycle is

accomplished using a T-flip-flop. The IR2157 is available in both 16 pin DIP and 16

pin narrow body SOIC packages.

16 Lead SOIC

(narrow body)

16 Lead PDIP

Typical Connection

+ Rectified AC Line

+ V_BUS

R2

R1

C1

R_Supply

VDC

CPH

RPH

RT

HO

VS

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

Q1

R_GHS

C_BLOCK

L_RES

C_PH

C_BS

VB

C_SNUBBER

C_IGN

R_PH

N/C

VCC

COM

LO

D_BOOT

R_SNUBBER

R_T

R_RUN

RUN

CT

C_STARTR_START

C_RES

C_VCC

D1

D2

C_T

R_DT

DT

Q2

R_GLS

SD

CS

R4

R5

R3

C2

R _CS

V_BUSreturn

ADVANCEDINFORMATION

IR2157

Power Turned On

UVLO Mode

¹/₂-Bridge Off

I_QCC150

A

µ

C PH = 0V

Oscillator Off

(UV+)

VCC < 9.5V

(VCC Fault or Power Down)

VCC > 11.4V

SD > 2.0V

(Lamp Removal)

or

VCC < 9.5V

(Power Turned Off)

and

VDC > 5.1V

and

SD < 1.7V

and

(Bus OK)

or

VDC < 3.0V

(dc Bus/ac Line Fault or Powe

(Lamp OK)

or

(T_jmax

)

SD > 2.0V

T_J< 175C

(Lamp Fault or Lamp Remova

FAULT Mode

T_J> 175C

(Over-Temperature)

PREHEAT Mode

Fault Latch Set

¹/₂-Bridge Off

¹/₂-Bridge @ f _PH

C P H Charging @ I _PH= 1

RPH = 0V

µ

A

I_QCC150

µ

A

CPH = 0V

VCC = 15.6V

Oscillator Off

RUN = Open Circuit

CS Disabled

CPH > 4.0V

(End of PREHEAT Mode)

CS > 1.0V

(Failure to Strike Lamp

or Hard Switching)

or

T_J> 175C

(Over-Temperature)

IGNITION RAMP Mode

f_PHramps to f _MIN

C P H Charging @ I _PH= 1

RPH = Open Circuit

RUN = Open Circuit

µ

A

CS 1V Threshold Enabled

CS > 1.0V

(Over-Current or Hard Switching)

CPH > 5.1V

(End of IGNITION RAMP)

or

CS < 0.2V

(No-Load or Below Resonance)

or

RUN Mode

T_J> 175C

(Over-Temperature)

f_MINRamps to f _RUN

C P H Charges to 7.6V Clamp

RPH = Open Circuit

RUN

= 0V

CS 0.2V Threshold Enabled

2

ADVANCEDINFORMATION

IR2157

Absolute Maximum Ratings

Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage param-

eters are absolute voltages referenced to COM, all currents are defined positive into any lead. The thermal resistance and

power dissipation ratings are measured under board mounted and still air conditions.

Symbol Definition

Min.

Max.

Units

V

High side floating supply voltage

-0.3

625

B

S

V

High side floating supply offset voltage

High side floating output voltage

V

- 25

V + 0.3

B

S

V

HO

V

- 0.3

V + 0.3

B

V

LO

Low side output voltage

-0.3

V + 0.3

CC

I

Maximum allowable output current due to miller effect

-500

-5

500

OMAX

mA

I

RT

R

pin current

T

5

V

C pin voltage

T

-0.3

-5

V

+ 0.3

CC

V

CT

I

CPH pin current

5

mA

CPH

V

RPH pin voltage

-0.3

—

V

CC

V

CC

+ 0.3

RPH

V

RUN

RUN pin voltage

+ 0.3

V

Deadtime pin voltage

Current sense pin voltage

Shutdown pin voltage

Supply current (note 1)

Allowable offset voltage slew rate

5.5

DT

V

5.5

CS

V

SD

I

20

mA

CC

dV/dt

-50

—

50

V/ns

P

Package power dissipation @ T ≤ +25°C (16 lead PDIP)

1.60

1.25

75

D

A

(16 lead SOIC)

—

Rth

Thermal resistance, junction to ambient

(16 lead PDIP)

(16 lead SOIC)

—

JA

°C/W

—

100

150

300

T

Junction temperature

-55

—

J

T

Storage temperature

°C

S

L

T

Lead temperature (soldering, 10 seconds)

Note 1:

This IC contains a zener clamp structure between the chip V

and COM which has a nominal breakdown

CC

voltage of 15.6V. Please note that this supply pin should not be driven by a DC, low impedance power source

greater than the V

specified in the Electrical Characteristics section.

CLAMP

3

ADVANCEDINFORMATION

IR2157

Recommended Operating Conditions

For proper operation the device should be used within the recommended conditions.

Symbol Definition

Min.

Max.

Units

V

High side floating supply voltage

Steady state high side floating supply offset voltage

Supply voltage

V

- 0.7

V

Bs

CC

CLAMP

600

V

-3.0

S

V

CC

V

CCUV+

CLAMP

I

Supply current

note 2

10

mA

V

CC

V

DC

lead voltage

0

220

1.0

-500

0

VCC

—

DC

C

C lead capacitance

T

pF

T

R

Deadtime resistance

—

-50

450

1

DT

kΩ

uA

I

RT

R

T

lead current (note 3)

I

RPH lead current (note 3)

RUN lead current (note 3)

Shutdown lead current

Current sense lead current

Junction temperature

uA

RPH

I

0

RUN

I

-1

mA

^oC

SD

I

-1

1

CS

T

-40

125

J

Electrical Characteristics

V

CC

= V = V

= 15V +/- 0.25V, R = 40.0kΩ, C = 470 pF, RPH and RUN leads no connection, V

= 0.0V, R

=

DT

BS

BIAS

T

CPH

6.1kΩ, V = 0.5V, V = 0.0V, C = 1000pF, T = 25^oC unless otherwise specified.

CS

SD

L

A

Supply Characteristics

Symbol Definition

Min.

Typ.

Max. Units Test Conditions

V

CC

supply undervoltage positive going

—

11.4

—

V

rising from 0V

CCUV+

CC

threshold

V

CCUV-

V

CC

supply undervoltage positive going

—

9.6

—

V

falling from 15V

V

CC

threshold

V

I

V

supply undervoltage lockout hysteresis

—

1.8

150

200

—

HYSTUV

QCCUV

CC

UVLO mode quiescent current

V

= 10V rising

CC

I

Fault-mode quiescent current (undervoltage

lockout, shutdown, over-current, over-temp)

µA

QCCFLT

I

Quiescent V supply current

—

3.8

—

R

no connection, C

T T

QCC

CC

connected to COM

=36kΩ, R

mA

V

I

V

CC

supply current, f= 50kHz

4.5

R

=

DT

QCC50K

T

5.6kΩ, C =220pF

T

V

CC

zener clamp voltage

15.6

I

= 10mA

CC

CLAMP

Note 2: Enough current should be supplied into the VCC lead to keep the internal 15.6V zener clamp diode on this lead

regulating its voltage.

Note 3: Due to the fact that the RT input is a voltage-controlled current source, the total RT pin current is sum of all of

the parallel current sources connected to that pin. For optimum oscillator current mirror performance, this total

current should be kept between 50mA and 500mA. During the preheat mode, the total current flowing out of

the RT pin consists of the RPH pin current plus the current due to the RT resistor. During the run mode, the

total RT pin current consists of the RUN pin current plus the the current due to the RT resistor.

4

ADVANCEDINFORMATION

IR2157

Electrical Characteristics (cont.)

Floating Supply Characteristics

Symbol Definition

Min. Typ.

Max. Units Test Conditions

I

Quiescent V supply current

BS

Quiescent V supply current

BS

—

0

—

5

V

= V

QBS0

HO

S

B

µA

30

4

QBS1

HO

VBSMIN Minimum required VBS voltage for proper

HO functionality

V

µA

I

Offset supply leakage current

—

50

V = V = 600V

B S

LK

Oscillator I/O Characteristics

Symbol Definition

Min.

Typ.

Max. Units Test Conditions

f

Oscillator frequency

—

30

—

R

T

= 32kΩ, R

=

osc

DT

6.1kΩ, C =470pF

T

kHz

—

R = 6.1kΩ, R

=

100

T

DT

6.1kΩ, C =470pF

T

—

df/dV

df/dT

d

Oscillator frequency voltage stability

Oscillator frequency temperature stability

Oscillator duty cycle

0.5

0.02

50

%/V

%/C

%

V

CCUV

+ < V

< 15V

CC

-40^oC < Tj < 125^oC

V

CT+

Upper C ramp voltage threshold

4.0

2.0

T

V

CT-

Lower C ramp voltage threshold

T

mV

SD = 5V, CS = 2V,

or Tj > TSD

V

Fault-mode C pin voltage

0

CTFLT

T

—

2.0

0

—

V

R pin voltage

T

Fault-mode R pin voltage

T

RT

SD = 5V, CS = 2V,

or Tj > TSD

V

RTFLT

mV

—

2.0

0.5

0.02

—

tdlo

LO output deadtime

µsec

toho

HO output deadtime

dtd/dV

dtd/dT

Deadtime voltage stability

Deadtime temperature stability

%/V

%/C

V

CCUV

+ < V

< 15V

CC

-40^oC < Tj < 125^oC

Preheat Characteristics

Symbol Definition

Min.

Typ.

Max. Units Test Conditions

I

CPH pin charging current

—

1.0

4.0

—

µA

V

= 0V

CPH

V

CPH pin lgnition mode threshold voltage

CPH pin run mode threshold voltage

CPHIGN

CPHRUN

CPHCLMP

CPHFLT

V

5.15

7.6

0

I

= 1mA

CPH pin clamp voltage

Fault-mode CPH pin voltage

—

CPH

mV

SD = 5V, CS = 2V,

or Tj > TSD

5

ADVANCEDINFORMATION

IR2157

Electrical Characteristics (cont.)

RPH Characteristics

Symbol Definition

Min.

Typ.

Max. Units Test Conditions

I

V

Open circuit RPH pin leakage current

Fault-mode RPH pin voltage

—

0.1

0

—

µA

mV

V

= 5V,V

SD = 5V, CS = 2V,

or Tj > TSD

= 5V

RPH

RPHLK

RPH

RPHFLT

RUN Characteristics

Symbol Definition

Min.

Typ.

Max. Units Test Conditions

I

Open circuit RUN pin leakage current

Fault-mode RUN pin voltage

—

0.1

0

—

µA

V

= 5V

RUNLK

RUN

V

mV

SD = 5V, CS = 2V,

or Tj > TSD

RUNFLT

Protection Circuitry Characteristics

Symbol Definition

Min.

Typ.

Max. Units Test Conditions

V

Rising shutdown pin threshold voltage

Shutdown pin threshold hysteresis

Over-current sense threshold voltage

Under-current sense threshold voltage

Over-current sense propogation delay

—

2.0

150

1.0

0.2

160

—

V

SDTH+

V

mV

SDHYS

V

CSTH+

V

CSTH-

CS

T

nsec Delay from CS to LO

or HO

V

Low V

/rectified line input upper threshold

/rectified line input lower threshold

—

5.15

3.0

—

DC+

BUS

V

DC-

BUS

T

Thermal shutdown junction temperature

175

^oC

SD

Gate Driver Output Characteristics

Symbol Definition

Min.

Typ.

Max. Units Test Conditions

VOL

Low-level output voltage

High level output voltage

Turn-on rise time

—

0

100

150

100

I

= 0

o

mV

V

0

85

45

V

- V I = 0

O, o

OH

BIAS

t

r

f

nsec

t

Turn-off fall time

Note 4: When the IC senses an overtemperature condition (Tj > 175ºC), the IC is latched off. In order to reset this Fault

Latch, the SD pin must be cycled high and then low, or the VCC supply to the IC must be cycled below the

falling undervoltage lockout threshold (VCCUV-).

6

ADVANCEDINFORMATION

IR2157

Lead Assignments & Definitions

Lead # Symbol Description

1

V

DC bus sensing input

DC

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

V D C

C P H

R P H

R T

H O

VS

2

C

R

Preheat timing capacitor

Preheat frequency resistor & ignition capacitor

Oscillator timing resistor

Run frequency resistor

PH

T

3

4

R

5

RUN

VB

6

C

Oscillator timing capacitor

Deadtime programming

Shutdown input

T

N/C

V C C

C O M

LO

7

D

T

SD

8

R U N

C T

9

CS

Current sensing input

10

11

12

13

14

15

16

LO

Low-side gate driver output

IC Power & signal ground

Logic & low-side gate driver supply

Unused

COM

V

CC

N/C

D T

V

B

V

S

HO

High-side gate driver floating supply

High voltage floating return

High-side gate driver output

S D

C S

Functional Block Diagram

3.0V

1 4

VB

HO

VS

1

VDC

S

R

Q

P U L S E

L E V E L

SHIFT

FILTER

LATCH

&

1 6

1 5

5.1V

1.0uA

CPH

2

7.6V

5.1V

4.0V

T

S

Q

4.0V

2.0V

1 2

1 0

VCC

LO

R1

R2

R

3

4

5

RPH

RT

I_RT

15.6V

2.0V

1 1

COM

RUN

0.2V

Q

D

CLK

R

I_CT= I _RT

9

CS

6

7

CT

DT

SD

Q

S

R

1.0V

8

UNDER-

VOLTAGE

DETECT

OVER-

T E M P

DETECT

2.0V

7

ADVANCEDINFORMATION

IR2157

16 Lead SOIC (narrow body)

01-3064 00

16 Lead PDIP

01-3065 00

8

ADVANCEDINFORMATION

IR2157

Description of Operation & Component Selection Tips

Supply Bypassing and PC Board Layout

Rules

Connecting the IC Ground (COM) to the

Power Ground

Component selection and placement on the pc

board is extremely important when using power

control ICs VCC should be bypassed to COM as close

to the IC terminals as possible with a low ESR/ESL

capacitor, as shown in Figure 1 below.

Both the low power control circuitry and low side

gate driver output stage grounds return to this pin

within the IC. The COM pin should be connected to

the bottom terminal of the current sense resistor in

the source of the low side power MOSFET using an

individual pc board trace, as shown in Figure 2. In

addition, the ground return path of the timing

components and VCC decoupling capacitor should

be connected directly to the IC COM pin, and not via

separate traces or jumpers to other ground traces on

the board.

pin 1

C_BOOT(surface mount)

D_Boot(surface mount)

IR2157 pin

1

C_VCC(through hole)

C_VCC(surface mount)

Figure 1: Supply bypassing PCB layout example

timing

components

C_VCC(through hole)

R_{C S}(through hole)

A rule of thumb for the value of this bypass capacitor

is to keep its minimum value at least 2500 times the

value of the total input capacitance (Ciss) of the

power transistors being driven. This decoupling

capacitor can be split between a higher valued

electrolytic type and a lower valued ceramic type

connected in parallel, although a good quality

electrolytic (e.g., 10mF) placed immediately adjacent

to the VCC and COM terminals will work well.

V_BUSreturn

Figure 2: COM pin connection PCB layout example

These connection technique prevents high current

ground loops from interfering with sensitive timing

component operation, and allows the entire control

circuit to reject common-mode noise due to output

switching.

In a typical application circuit, the supply voltage to

the IC is normally derived by means of a high value

startup resistor (1/4W) from the rectified line voltage,

in combination with a charge pump from the output

of the half-bridge. With this type of supply

arrangement, the internal 15.6V zener clamp diode

from VCC to COM will determine the steady state IC

supply voltage.

9

ADVANCEDINFORMATION

IR2157

The heart of this controller is an oscillator which

resembles those found in many popular PWM voltage

regulator ICs. In its simplest form, this oscillator

consists of a timing resistor and capacitor connected

to ground. The voltage across the timing capacitor

CT is a sawtooth, where the rising portion of the ramp

is determined by the current in the RT pin, and the

falling portion of the ramp is determined by an external

deadtime resistor RDT. The oscillograph in Figure 4

illustrates the relationship between the oscillator

capacitor waveform and the gate driver outputs.

The Control Sequence & Timing

Component Selection

The IR2157 uses the following control sequence

(Figure 3) to drive rapid start fluorescent lamps.

f_Start

f_PH

f_Run

f_min

t

5V

V_CPH

2V

V_RPH

2V

V_RUN

Ignition

R a m p

m o d e

Preheat mode

Run mode

Figure 3: IR2157 control sequence

Figure 4

The control sequence used in the IR2157 allows

the Run Mode operating frequency of the ballast to

be higher than the ignition frequency (i.e., fstart >

fph > frun > fign). This control sequence is

recommended for lamp types where the ignition

frequency is too close to the run frequency to ensure

proper lamp striking for all production resonant LC

component tolerances (please note that it is possible

to use the IR2157 in systems where fstart > fph >

fign > frun, simply by leaving the RUN pin open).

The deadtime can be programmed by means of the

external RDT resistor, given a certain range of CT

capacitor values, using the graph shown in Figure 5.

The RT input is a voltage-controlled current source,

where the voltage is regulated to be approximately

2.0V. In order to maintain proper linearity between

the RT pin current and the CT capacitor charging

current, the value of the RT pin current should be

kept between 50µA and 500µA. The RT pin can

also be used as a feedback point for closed loop

control.

Six pins in the IC are used to control the Startup,

Preheat, Ignition Ramp, and Run modes of

operation, and to allow ballast and lamp engineers

the flexibility to optimize their designs for virtually

any lamp type.

10

ADVANCEDINFORMATION

IR2157

During the Startup Mode, the operating frequency is

determined by the parallel combination of RPH,

RSTART , and RT , combined with the values of

CSTART, CT and RDT , as shown in Figure 6. This

frequency is normally chosen to ensure that the

instantaneous voltage across the lamp during the

first few cycles of operation does not exceed the

strike potential of the lamp. As the voltage across

CSTART charges up to the RT pin voltage, the output

frequency exponentially decays to the preheat

frequency.

10

tDEAD

(usec)

CT = 220 pF

CT = 470 pF

CT = 1 nF

1

During the Preheat Mode, the operating frequency

is determined by the parallel combination of RPH

and RT , combined with the value of CT and RDT .

This frequency, along with the Preheat Time, is

normally chosen to ensure that adequate heating of

the lamp filaments occurs. Typically, a 4.5:1 ratio of

0.1

1

10

100

RDT (Kohms)

Figure 5: Deadtime versus R

DT

1.0uA

CPH

2

7.6V

C_PH

5.1V

S

Q

4.0V

2.0V

4.0V

R 1

R 2

RPH

RT

3

4

5

C_IGN

R_PH

I_RT

2.0V

R_T

R _RUN

RUN

C_STARTR_START

I_CT

= I_RT

CT

DT

6

7

C_T

R_DT

UNDER-

VOLTAGE

DETECT

Figure 6: Oscillator section block diagram with external component connection

11

ADVANCEDINFORMATION

IR2157

The following graphs, Figures 8 and 9, illustrate the

relationship between the effective RT resistance (i.e.,

the parallel combination of resistors which programs

the CT capacitor charging current) and the operating

frequency.

the hot filament-to-cold filament resistance is desired

for maximum lamp life, as shown in Figure 7

150

FREQ

(KHz)

CT=220pF,RDT=11K

CT=470pF,RDT=6.2K

CT=1nF,RDT=3K

100

50

0

Figure 7: Lamp filament voltage during the

preheat, ignition ramp and run modes.

0

5

10

15

20

25

30

35

40

RT (K ohms)

The Preheat Time is programmed by means of the

preheat capacitor, CPH, an internal 1mA current

source, and an internal threshold on the CPH pin of

4.0V, according to the following formula:

Figure 8: fosc versus effective RT (tDEAD = 2.0 usec)

t

C

^PH= 4E6 C^PH

^PH= 250E-9 t^PH

,

or

250

200

At the end of the Preheat Time, the internal, open-

drain transistor holding the RPH pin to ground turns

off, and the voltage on this pin charges exponentially

up to the RT pin potential. During this Ignition Ramp

Mode, the output frequency exponentially decays to

a minimum value. The rate of decay of this frequency

is a function of the RPH * CPH time constant. Because

the Ignition Ramp Mode ends when the voltage on

the CPH pin reaches 5.15V, the ignition ramp is

always 1/4th as long as the preheat time.

When the CPH pin reaches 5.15V, an open-drain

transistor on the RUN pin turns on, and the external

RRUN resistor is then in parallel with the RT resistor.

The Run Mode operating frequency is therefore a

function of the parallel combination of RRUN and

RT , and this means that the operating power of the

lamp can be programmed by means of RRUN .

CT=220pF, RDT=5.6K

CT=470pF, RDT=2.7K

CT=1nF, RDT=1.2K

150

FREQ

(KHz)

100

50

0

5

10

15

20

25

30

35

40

RT (K ohms)

Figure 9: fosc versus effective RT (tDEAD = 1.0 usec)

12

ADVANCEDINFORMATION

IR2157

Lamp Protection & Automatic Restart Circuitry Operation

Three pins on the IR2157 are used for protection, as shown in Figure 10 below. These are VDC (dc bus

monitor), SD (unlatched shutdown), and CS (latched shutdown).

+ V _BUS

3.0V

V D C

R2

1

S

R

Q

5.1V

R1

C1

from oscillator

section

1.0uA

T

Q

C P H

2

R

7.6V

Q2

5.1V

4.0V

Q

D

0.2V

C S

R4

CLK

R

9

DT

S D

S

R

Q

from lamp

lower cathode

R3

7

8

R5

C2

R_CS

1.0V

UNDER-

OVER-

TEMP

DETECT

2.0V

VOLTAGE

DETECT

Figure 10: Lamp protection & automatic restart circuitry block diagram with external component connection.

Sensing the DC Bus Voltage

pump off of the output of the half-bridge). In this

case, the voltage on the VDC pin will shut the oscillator

off, thereby protecting the power transistors from

potentially hazardous hard switching. Approximately

2V of hysteresis has been designed into the internal

comparator sensing the VDC pin, in order to account

for variations in the dc bus voltage under varying

load conditions. When the dc bus recovers, the chip

restarts from the beginning of the control sequence,

as shown in timing diagram 11 below.

The first of these protection pins senses the voltage

on the DC bus by means of an external resistor

divider and an internal comparator with hysteresis.

When power is first supplied to the IC at system

startup, 3 conditions are required before oscillation

is initiated: 1.) the voltage on the VCC pin must

exceed the rising undervoltage lockout threshold

(11.5V), 2.) the voltage at the VDC pin must exceed

5.1V, and 3.) the voltage on the SD pin must be below

approximately 1.85V. If a low dc bus condition occurs

during normal operation, or if power to the ballast is

shut off, the dc bus will collapse prior to the VCC of

the chip (assuming the VCC is derived from a charge

13

ADVANCEDINFORMATION

IR2157

rectified

AC line

+V_B

U

S

V

C

R

D

P

R

U

C

D

C

H

T

H O

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

Q1

R _G

5

H

S

V S

V B

C _B

L_R

E S

V D C

L

O

B

C

B

K

E

3

R _S

C _{B O O T}

U

P P L Y

R _S

N

U

R

N / C

D _{B O O T}

D 1

C

C_S

N U

B B E R

R

N

T

V

C

L

C

O

C

4

C _R

E S

M

C_V

C

D 2

CT

T

Q2

R _C

R _G

L

S

D

C S

R3

R 4

R 5

8

C 2

S

C P H

V_{B S}return

U

15

L O

Figure 12: Lamp presence detection circuit

connection (shaded area)

15

H O - V S

2

S D

Restart

RUN mode

Low VDC

4

8

Figure 11: VDC pin fault and auto restart

CT

C P H

Lamp Presence Detection and

Automatic Restart

15

The second protection pin, SD, is used for both

unlatched shutdown and automatic restart functions.

The SD pin would normally be connected to an

external circuit which senses the presence of the

lamp (or lamps), as shown in Figure 12.

L O

15

H O - V S

When the SD pin exceeds 2.0V (approximately

150mV of hysteresis is included to increase noise

immunity), signaling either a lamp fault or lamp

removal, the oscillator is disabled, both gate driver

outputs are pulled low, and the chip is put into the

micropower mode. Since a lamp fault would normally

lead to a lamp exchange, when a new lamp is

inserted into the fixture, the SD pin would be pulled

back to near the ground potential. Under these

Restart

RUN mode

SD mode

Figure 13: SD pin fault and auto restart

conditions a reset signal would restart the chip from

the beginning of the control sequence, as shown in

the timing diagram in Figure 13.

14

ADVANCEDINFORMATION

IR2157

and under-resonance conditions, there is a negative-

going threshold of 0.2V which is enabled at the onset

of the run mode. The sensing of this 0.2V threshold

is synchronized with the falling edge of the LO output.

Thus, for a lamp removal and replacement, the ballast

automatically restarts the lamp in the proper manner,

maximizing lamp life and minimizing stress on the

power MOSFETs or IGBTs. The SD pin contains an

internal 7.5V zener diode clamp, thereby reducing

the number of external components required.

Figures 15, 16 and 17 are oscillographs of fault

conditions. Figure 15 shows a failure of the lamp to

strike, Figure 16 shows a hard switching condition

and Figure 17 shows an under-current condition.

Half-Bridge Current Sensing and

Protection

The third pin used for protection is the CS pin, which

is normally connected to a resistor in the source of

the lower power MOSFET, as shown in Figure 14.

The CS pin is used to sense fault conditions such a

failure of a lamp to strike, over-current during normal

operation, hard switching, no load, and operation

below resonance. If any one of these conditions is

sensed, the fault latch is set, the oscillator is disabled,

the gate driver outputs go low, and the chip is put

into the micropower mode. The CS pin performs its

sensing functions on a cycle-by-cycle basis in order

to maximize ballast reliability. failure-to-strike, and

For the over-current, hard switching fault conditions,

the 1V, positive-going CS threshold is enabled at

the end of the preheat time. For the under-current

Figure 15: Lamp failure to strike

rectified

AC line

+V _BUS

V D C

C P H

RPH

RT

HO

V S

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

Q1

R_GHS

1

/

Bridge output

2

V B

R_SUPPLY

C_{B O O T}

R_SNUBBER

N/C

V C C

C O M

LO

D_{B O O T}

D1

C_SNUBBER

RUN

CT

C_{V C C}

D2

DT

Q2

R_{G L S}

S D

C S

R3

R_{C S}

V_BUSreturn

Figure 14: Half-bridge current sensing circuit

connection (shaded area)

Figure 16: Hard switching condition

15

ADVANCEDINFORMATION

IR2157

Recovery from such a fault condition is accomplished

by cycling either SD pin or the VCC pin. When a

lamp is removed, the SD pin goes high, the fault

latch is reset, and the chip is held off in an unlatched

state. Lamp replacement causes the SD pin to go

low again, reinitiating the startup sequence. The

fault latch can also be reset by the undervoltage

lockout signal, if VCC falls below the lower

undervoltage threshold.

Bootstrap Supply Considerations

Power is normally supplied to the high-side circuitry

by means of a simple charge pump from VCC, as

shown in Figure 19 below.

rectified

AC line

+V _BUS

V D C

C P H

RPH

RT

HO

V S

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

Q1

Figure 17: Operation below resonance

R_GHS

1

/

Bridge output

2

V B

R_SUPPLY

C_{B O O T}

R_SNUBBER

N/C

V C C

C O M

LO

D_{B O O T}

D1

C_SNUBBER

RUN

CT

C_{V C C}

D2

DT

Q2

R_{G L S}

S D

C S

R3

R_{C S}

V_BUSreturn

Figure 19: Typical bootstrap supply connection

with VCC charge pump from half-bridge output

(shaded area)

A high voltage, fast recovery diode DBOOT (the so-

called bootstrap diode) is connected between VCC

(anode) and VB (cathode), and a capacitor CBOOT

(the so-called bootstrap capacitor) is connected

between the VB and VS pins. During half-bridge

switching, when MOSFET Q2 is on and Q1 is off, the

bootstrap capacitor CBOOT is charged from the VCC

decoupling capacitor, through the bootstrap diode

DBOOT, and through Q2. Alternately, when Q2 is off

and Q1 is on, the bootstrap diode is reverse-biased,

Figure 18: Auto restart for lamp replacement

16

ADVANCEDINFORMATION

IR2157

and the bootstrap capacitor (which ‘floats’ on the

source of the upper power MOSFET) serves as the

power supply to the upper gate driver CMOS circuitry.

Since the quiescent current in this CMOS circuitry is

very low (typically 45mA in the on-state), the majority

of the drop in the VBS voltage when Q1 is on occurs

due to the transfer of charge from the bootstrap

capacitor to the gate of the power MOSFET.

1

C _BOOT(surface mount)

D _Boot(surface mount)

C _VCC(through hole)

C_VCC(surface mount)

VB should be bypassed to VS as close as possible

to the pins of the IC with a low ESR/ESL capacitor. A

PCB layout example is shown in figure 20. A rule of

thumb for the value of this capacitor is to keep its

minimum value at least 50 times the value of the total

input capacitance (Ciss) of the MOSFET or IGBT being

driven. In addition, the VS pin should be connected

directly to the high side power MOSFET source.

Figure 20: Supply bypassing PCB layout example

Characteristic Curves

0.15

100

10

1

T = -25

0.125

T = 25C

T = 75C

T = 125C

0.1

Iqcc

(mA)

0.075

Iqcc

(mA)

0.1

0.05

0.025

0

0.01

0.001

0

2

4

6

8

10

12

0

2

4

6

8

10

12

14

16

VCC (volts)

Figure 22: I

versus V

(V < V

CC

and temperature

)

CC+

QCC

CC

Figure 21: I

versus V

QCC

CC

4

30

25

20

15

10

5

T = -25

T = 25C

T = 75C

T = 125C

3.5

Iqcc

(mA)

Iqcc

(mA)

3

T = -25

T = 25C

T = 75C

T = 125C

2.5

11.5

0

12.5

13.5

14.5

15

15.5

VCC (volts)

16

16.5

VCC (volts)

Figure 24: V

versus I

and temperature

QCC

Figure 23: I

versus V

and temperature

)

CLAMP

QCC

CC

(V > V

CC

CC+

17

ADVANCEDINFORMATION

IR2157

80

70

60

50

12

11.5

11

T = -25C

T = 25C

T = 75C

T = 125C

Vccuv+

Vccuv-

Vccuv

(V)

Iqbs1

40

10.5

10

(uA)

30

20

10

0

9.5

9

0

2

4

6

8

10

12

14

16

18

20

-25

0

25

50

Temperature (C)

75

100

125

VBS (volts)

Figure 26: I

versus V

BS

Figure 25: V

and V

versus temperature

QBS1

CCUV+

CCUV-

54

53.75

53.5

210

207.5

205

T = -25C

T = 25C

T = 75C

T = 125C

53.25

202.5

200

fOSC

(KHz)

fOSC

(KHz)

53

52.75

52.5

52.25

52

197.5

195

T = -25C

T = 25C

T = 75C

T = 125C

192.5

190

11

11.5

12

12.5

13

13.5

14

14.5

15

11

11.5

12

12.5

13

VCC (volts)

13.5

14

14.5

15

VCC (volts)

Figure 27: f

versus V and temperature

Figure 28: f versus V and temperature

OSC CC

OSC

CC

(RT=330kΩ, CT=300pF)

(RT=6.2kΩ, CT=300pF)

1000

990

980

970

960

950

940

930

920

910

900

80

T = -25C

T = 25C

T = 75C

T = -25C

T = 25C

T = 75C

T = 125C

70

60

50

40

30

20

T = 125C

tDEAD

(nsec)

tfall

(nsec)

11

11.5

12

12.5

13

13.5

14

14.5

15

11

11.5

12

12.5

13

13.5

14

14.5

15

VCC (volts)

Figure 29: t

versus V and temperature

Figure 30: t

versus V and temperature

fall CC

DEAD

CC

18

ADVANCEDINFORMATION

IR2157

1.1

160

140

120

100

80

T = -25C

T = 25C

T = 75C

T = -25C

T = 25C

T = 75C

T = 125C

1.08

T = 125C

1.06

CS+

(volts)

trise

(nsec)

1.04

1.02

1

60

40

11

11.5

12

12.5

13

13.5

14

14.5

15

11

11.5

12

12.5

13

13.5

14

14.5

15

VCC (volts)

Figure 32: CS+ threshold versus V

and temperature

Figure 31: t

versus V

and temperature

CC

rise

0.235

2.15

2.125

2.1

T = -25C

T = 25C

T = 75C

T = 125C

T = -25C

T = 25C

T = 75C

T = 125C

0.23

0.225

0.22

SD+

(volts)

CS-

(volts)

2.075

2.05

2.025

2

0.215

0.21

0.205

0.2

11

11.5

12

12.5

13

13.5

14

14.5

15

11

11.5

12

12.5

13

13.5

14

14.5

15

VCC (volts)

Figure 33: CS- threshold versus V

and temperature

Figure 34: SD+ threshold versus V

and temperature

CC

0.25

5.4

5.35

5.3

T = -25C

T = 25C

T = 75C

T = 125C

T = -25C

T = 25C

T = 75C

T = 125C

0.225

0.2

SD

5.25

hysterisis

VDC+

(volts)

0.175

5.2

5.15

5.1

5.05

5

0.15

0.125

0.1

11

11.5

12

12.5

13

VCC (volts)

13.5

14

14.5

15

11

11.5

12

12.5

13

13.5

14

14.5

15

VCC (volts)

Figure 35: SD hysterisis versus V and temperature

Figure 36: VDC+ threshold versus V and temperature

CC

19

ADVANCEDINFORMATION

IR2157

3.3

3.25

3.2

4.15

T = -25C

T = 25C

T = 75C

T = 125C

T = -25C

T = 25C

T = 75C

4.1

T = 125C

4.05

VCPHIGN

(volts)

VDC-

3.15

(volts)

4

3.95

3.9

3.1

3.05

3

11

11.5

12

12.5

13

13.5

14

14.5

15

11

11.5

12

12.5

13

13.5

14

14.5

15

VCC (volts)

Figure 38: V

threshold versus V and

CC

temperature

CPHIGN

Figure 37: VDC- threshold versus V

and temperature

CC

5.25

5.2

1.2

1.15

1.1

T = -25C

T = 25C

T = 75C

T = 125C

5.15

1.05

1

VCPHRUN

(volts)

ICPH

(uA)

5.1

5.05

5

0.95

0.9

T = -25C

T = 25C

T = 75C

T = 125C

0.85

0.8

11

11.5

12

12.5

13

13.5

14

14.5

15

11

11.5

12

12.5

13

13.5

14

14.5

15

VCC (volts)

Figure 39: V

threshold versus V and

CC

temperature

CPHRUN

Figure 40: I

versus V

and temperature

CC

CPH

WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 322 3331

IR GREAT BRITAIN: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: ++ 44 1883 732020

IR CANADA: 15 Lincoln Court, Brampton, Ontario L6T 3Z2 Tel: (905) 453-2200

IR GERMANY: Saalburgstrasse 157, 61350 Bad Homburg Tel: ++ 49 6172 96590

IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: ++ 39 11 451 0111

IR FAR EAST: K&H Bldg., 2F, 30-4 Nishi-Ikebukuro 3-Chome, Toshima-Ku, Tokyo, Japan 171 Tel: 81 3 3983 0086

IR SOUTHEAST ASIA: 1 Kim Seng Promenade, Great World City West Tower, 13-11, Singapore 237994 Tel: 65 838 4630

IR TAIWAN: 16 Fl. Suite D..207, Sec.2, Tun Haw South Road, Taipei, 10673, Taiwan Tel: 886-2-2377-9936

http://www.irf.com/

Data and specifications subject to change without notice. 3/1/99

20


型号：	IR2157
厂家：	Infineon
描述：	FULLY INTEGRATED BALLAST CONTROL IC 完全集成的镇流器控制IC
文件：	总20页 (文件大小：309K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

IR2157 [INFINEON]

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