IR2302PBF [INFINEON]
HALF-BRIDGE DRIVER; 半桥驱动器
| 型号： | IR2302PBF |
| 厂家： | 
Infineon |
| 描述： | HALF-BRIDGE DRIVER |
| 文件： | 总22页 (文件大小：205K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Data Sheet No. PD60207 Rev.A
( )
S & (PbF)
IR2302
HALF-BRIDGE DRIVER
Packages
Features
Floating channel designed for bootstrap operation
•
Fully operational to +600V
Tolerant to negative transient voltage
dV/dt immune
Gate drive supply range from 5 to 20V
8-Lead SOIC
IR2302(S)
•
Undervoltage lockout for both channels
•
(Also available LEAD-FREE (PbF))
3.3V, 5V and 15V input logic compatible
•
8-Lead PDIP
IR2302
Cross-conduction prevention logic
•
Matched propagation delay for both channels
•
High side output in phase with IN input
•
2106/2301//2108//2109/2302/2304 Feature Comparison
Logic and power ground +/- 5V offset.
•
ꢍꢂꢉꢎꢎꢏ
Internal 540ns dead-time
•
ꢄꢅꢆꢇꢃ
ꢈꢉꢊꢋꢌ
ꢌꢉꢅꢐꢇꢌꢃꢋꢉꢅ
ꢆꢂꢑꢒꢑꢅꢃꢋꢉꢅ
ꢈꢉꢊꢋꢌ
Lower di/dt gate driver for better noise
ꢀꢁꢂꢃ
ꢓꢑꢁꢐꢏꢔꢋꢕꢑ
ꢖꢂꢉꢇꢅꢐꢗꢀꢋꢅꢎ
•
immunity
ꢘꢙꢚꢛꢜꢘꢝꢚꢙ
ꢘꢙꢚꢛ"
Shut down input turns off both channels
ꢍꢞ!
&''ꢜꢍꢞ!
ꢍꢞ!
•
#ꢄ$ꢜ%ꢄ$
#ꢄ$ꢜ%ꢄ$
ꢅꢉ
ꢅꢉꢅꢑ
8-Lead SOIC also available LEAD-FREE (PbF).
•
ꢘꢙꢚ*
ꢄꢅꢃꢑꢂꢅꢁꢈꢗ7"ꢚꢅꢎ
ꢀꢂꢉꢊꢂꢁꢕꢕꢁ:ꢈꢑꢗꢚ;7"ꢠ7ꢗµꢎ
ꢄꢅꢃꢑꢂꢅꢁꢈꢗ7"ꢚꢅꢎ
ꢟꢑꢎ
ꢘꢙꢚ*"
&''ꢜꢍꢞ!
ꢍꢞ!
Description
ꢘꢙꢚ=ꢜꢘꢝꢚꢘ
ꢘꢙꢚ="
ꢄ$ꢜ'ꢓ
ꢟꢑꢎ
ꢟꢑꢎ
The IR2302(S) are high voltage, high speed
power MOSFET and IGBT drivers with depen-
dent high and low side referenced output
ꢀꢂꢉꢊꢂꢁꢕꢕꢁ:ꢈꢑꢗꢚ;7"ꢠ7ꢗµꢎ
&''ꢜꢍꢞ!
#ꢄ$ꢜ%ꢄ$
ꢄꢅꢃꢑꢂꢅꢁꢈꢗꢙꢚꢚꢅꢎ
ꢘꢝꢚ"
ꢍꢞ!
channels. Proprietary HVIC and latch immune CMOS technologies enable ruggedized monolithic construction.
The logic input is compatible with standard CMOS or LSTTL output, down to 3.3V logic. The output drivers
feature a high pulse current buffer stage designed for minimum driver cross-conduction. The floating channel can
be used to drive an N-channel power MOSFET or IGBT in the high side configuration which operates up to
600 volts.
Typical Connection
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IR2302
(Refer to Lead Assignments for
correct configuration). This/
These diagram(s) show elec-
trical connections only. Please refer to our Application Notes
and DesignTips for proper circuit board layout.
www.irf.com
1
IR2302( )
S
& (PbF)
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage param-
eters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured
under board mounted and still air conditions.
Symbol
Definition
High side floating absolute voltage
High side floating supply offset voltage
High side floating output voltage
Low side and logic fixed supply voltage
Low side output voltage
Min.
Max.
Units
V
B
-0.3
625
V
S
V
B
- 25
V
+ 0.3
+ 0.3
25
B
V
V
- 0.3
V
HO
S
B
V
V
CC
-0.3
-0.3
V
V
V
+ 0.3
CC
LO
V
IN
Logic input voltage (IN ꢣ SD)
COM - 0.3
+ 0.3
CC
dV /dt
S
Allowable offset supply voltage transient
—
—
—
—
—
—
-50
—
50
V/ns
W
P
D
Package power dissipation @ T ≤ +25°C (8 Lead PDIP)
A
1.0
0.625
125
200
150
150
300
(8 Lead SOIC)
Rth
JA
Thermal resistance, junction to ambient
(8 Lead PDIP)
(8 Lead SOIC)
°C/W
T
J
Junction temperature
T
S
Storage temperature
°C
T
L
Lead temperature (soldering, 10 seconds)
Recommended Operating Conditions
The input/output logic timing diagram is shown in figure 1. For proper operation the device should be used within the
recommended conditions. The V offset rating is tested with all supplies biased at 15V differential.
S
Symbol
Definition
High side floating supply absolute voltage
High side floating supply offset voltage
High side floating output voltage
Low side and logic fixed supply voltage
Low side output voltage
Min.
Max.
Units
VB
V
+ 5
V + 20
S
S
V
S
Note 1
600
V
HO
V
S
V
B
V
V
5
0
20
CC
V
LO
V
CC
V
Logic input voltage (IN ꢣ SD)
COM
-40
V
IN
CC
T
A
Ambient temperature
150
°C
Note 1ꢡ Logic operational for V of -5 to +600V. Logic state held for V of -5V to -V . (Please refer to the Design Tip
S S BS
DT9ꢢ-3 for more details).
2
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IR2302( )
S
& (PbF)
Dynamic Electrical Characteristics
V
(V , V ) ꢤ 15V, C ꢤ 1000 pF, and T ꢤ 25°C unless otherwise specified.
BIAS CC BS
L
A
Symbol
Definition
Turn-on propagation delay
Turn-off propagation delay
Min. Typ. Max. Units Test Conditions
t
550
—
ꢢ50
200
200
0
950
280
280
50
V ꢤ 0V
S
on
t
V ꢤ 0V or 600V
S
off
t
—
sd
Shut-down propagation delay
MT
Delay matching, HS ꢣ LS turn-on/off
Turn-on rise time
—
nsec
t
—
130
50
220
80
V
V
ꢤ 0V
ꢤ 0V
r
S
S
t
f
Turn-off fall time
—
DT
Deadtimeꢡ LO turn-off to HO turn-on(DT
400
540
680
LO-HO) ꢣ
HO turn-off to LO turn-on (DT
HO-LO)
MDT
Deadtime matching ꢤ DT
- DT
—
0
60
LO - HO
HO-LO
Static Electrical Characteristics
V
(V , V ) ꢤ 15V and T ꢤ 25°C unless otherwise specified. The V , V and I parameters are referenced to
BIAS
CC BS
A
IL IH
IN
COM and are applicable to the respective input leadsꢡ IN and SD. The V , I and Ron parameters are referenced to COM
O
O
and are applicable to the respective output leadsꢡ HO and LO.
Symbol
Definition
Min. Typ. Max. Units Test Conditions
V
Logic “1” input voltage for HO ꢣ logic “0” for LO
Logic “0” input voltage for HO ꢣ logic “1” for LO
2.9
—
—
—
—
0.8
—
V
V
V
V
ꢤ 10V to 20V
ꢤ 10V to 20V
ꢤ 10V to 20V
ꢤ 10V to 20V
ꢤ 20 mA
IH
CC
CC
CC
V
IL
V
—
SD,TH+
SD input positive going threshold
SD input negative going threshold
2.9
—
V
V
—
0.8
1.4
0.6
50
100
1.6
20
2
SD,TH-
CC
I
V
OH
High level output voltage, V
- V
—
—
0.8
0.3
—
BIAS
O
O
V
OL
Low level output voltage, V
I
ꢤ 20 mA
O
O
I
Offset supply leakage current
—
V
ꢤ V ꢤ 600V
B S
LK
µA
mA
µA
I
Quiescent V supply current
BS
20
0.4
—
60
1.0
5
V
ꢤ 0V or 5V
QBS
IN
I
Quiescent V
supply current
V
ꢤ 0V or 5V
IN
QCC
CC
I
Logic “1” input bias current
Logic “0” input bias current
IN ꢤ 5V, SD ꢤ 0V
IN ꢤ 0V, SD ꢤ 5V
IN+
I
—
—
IN-
V
V
and V supply undervoltage
BS
3.3
4.1
5
CCUV+
CC
V
positive going threshold
BSUV+
V
V
and V supply undervoltage
BS
3
3.8
0.3
4.ꢢ
—
CCUV-
CC
V
V
negative going threshold
Hysteresis
BSUV-
V
0.1
CCUVH
V
BSUVH
I
Output high short circuit pulsed vurrent
Output low short circuit pulsed current
120
250
200
350
—
—
V
ꢤ 0V, PW ≤ 10 µs
O+
O
mA
I
V
O
ꢤ 15V,PW ≤ 10 µs
O-
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3
IR2302( )
S
& (PbF)
Functional Block Diagrams
VB
UV
DETECT
HO
R
R
Q
PULSE
FILTER
HV
LEVEL
SHIFTER
S
VSS/COM
LEVEL
SHIFT
IN
VS
PULSE
GENERATOR
VCC
LO
DEADTIME
UV
DETECT
+5V
VSS/COM
LEVEL
SHIFT
DELAY
SD
COM
4
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IR2302( )
S
& (PbF)
Lead Definitions
Symbol Description
IN
Logic input for high and low side gate driver outputs (HO and LO), in phase with HO
Logic input for shutdown
SD
V
High side floating supply
B
HO
High side gate drive output
V
High side floating supply return
Low side and logic fixed supply
Low side gate drive output
S
V
CC
LO
COM
Low side return
Lead Assignments
V
V
1
2
3
4
V
B
8
ꢢ
1
2
3
4
V
B
8
CC
CC
HO
HO
IN
IN
ꢢ
V
S
V
S
SD
6
5
SD
6
5
LO
LO
COM
COM
8 Lead PDIP
8 Lead SOIC
(Also available LEAD-FREE (PbF)
IR2302
IR2302S
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5
IR2302( )
S
& (PbF)
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7ꢚ]
7ꢚ]
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ꢃ
ꢃ
ꢃ
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ꢃ
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ꢂ
#ꢞ
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Figure 1. Input/Output Timing Diagram
Figure 2. Switching Time Waveform Definitions
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Figure 4. Deadtime Waveform Definitions
Figure 3. Shutdown Waveform Definitions
6
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IR2302( )
S
& (PbF)
ꢄ$_%ꢞ`
7ꢚ]
7ꢚ]
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Figure 5. Delay Matching Waveform Definitions
1500
1300
1300
1100
900
Max.
1100
Max.
Typ.
900
Typ.
Min.
700
Min.
700
500
500
300
300
-50 -25
0
25 50 75 100 125
5
10
15
20
Temperature (oC)
Supply Voltage (V)
Figure 6A. Turn-on Propagation Delay
vs. Temperature
Figure 6B. Turn-on Propagation Delay
vs. Supply Voltage
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ꢢ
IR2302( )
S
& (PbF)
1300
500
400
300
200
100
0
1100
Max.
900
Typ.
Max.
Typ.
700
Min.
500
300
3
6
9
12
15
-50 -25
0
25 50
75 100 125
Temperature (oC)
Input Voltage (V)
Figure 6C. Turn-on Propagation Delay
vs. Input Voltage
Figure 7A. Turn-off Propagation Delay
vs. Temperature
700
600
500
400
300
200
100
400
350
300
250
200
150
100
Max.
Typ.
Max.
Typ.
3
6
9
12
15
5
10
15
20
Input Voltage (V)
Supply Voltage (V)
Figure 7C. Turn-off Propagation Delay
vs. Input Voltage
Figure 7B. Turn-off Propagation Delay
vs. Supply Voltage
8
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IR2302( )
S
& (PbF)
500
400
300
200
100
0
700
600
500
400
300
200
100
Max.
Max.
Typ.
Typ.
5
10
15
20
-50 -25
0
25 50
75 100 125
Supply Voltage (V)
Temperature (oC)
Figure 8A. Shut-down Propagation Delay
vs. Temperature
Figure 8B. Shut-down Propagation Delay
vs. Supply Voltage
400
350
500
400
300
300
Max.
250
200
Max.
Typ.
200
100
150
100
Typ.
0
-50 -25
0
25 50
75 100 125
3
6
9
12
15
Temperature (oC)
Input Voltage (V)
Figure 8C. Shut-down Propagation Delay
vs. Input Voltage
Figure 9A. Turn-on Rise Time
vs. Temperature
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9
IR2302( )
S
& (PbF)
700
600
200
150
100
50
500
Max.
400
300
Typ.
Max.
Typ.
200
100
0
0
5
-50 -25
0
25
50 75 100 125
10
15
20
Supply Voltage (V)
Temperature (oC)
Figure 9B. Turn-on Rise Time
vs. Supply Voltage
Figure 10A. Turn-off Fall Time
vs. Temperature
200
150
100
50
1000
800
600
400
200
Max.
Max.
Typ.
Min.
Typ.
0
-50 -25
0
25 50 75 100 125
5
10
15
20
Temperature (oC)
Supply Voltage (V)
Figure 10B. Turn-off Fall Time
vs. Supply Voltage
Figure 11A. Deadtime
vs. Temperature
10
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IR2302( )
S
& (PbF)
1000
800
600
400
200
0
7
6
5
4
3
2
1
0
Max.
Max.
Typ.
Min.
Typ.
Min.
0
50
100
RDT (K )
150
200
5
10
15
20
Ω
Supply Voltage (V)
Figure 11B. Deadtime
vs. Supply Voltage
Figure 11C. Deadtime vs. RDT
6
6
5
4
3
2
1
0
5
4
3
2
1
0
Max.
Max.
-50 -25
0
25
50
75 100 125
5
10
15
20
Temperature (oC)
Supply Voltage (V)
Figure 12A. Logic "1" Input Voltage
vs. Temperature
Figure 12B. Logic "1" Input Voltage
vs. Supply Voltage
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11
IR2302( )
S
& (PbF)
6
5
4
3
2
1
0
6
5
4
3
2
Min.
Min.
1
0
5
10
15
20
-50 -25
0
25
50
75 100 125
Supply Voltage (V)
Temperature (oC)
Figure 13B. Logic "0" Input Voltage
vs. Supply Voltage
Figure 13A. Logic "0" Input Voltage
vs. Temperature
6
5
4
3
2
1
0
6
5
4
3
2
1
0
Max.
Max.
-50 -25
0
25
50
75 100 125
5
10
15
20
Temperature (oC)
Supply Voltage (V)
Figure 14A. SD Input Positive Going Threshold
vs. Temperature
Figure 14B. SD Input Positive Going Threshold
vs. Supply Voltage
12
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IR2302( )
S
& (PbF)
6
5
4
3
2
1
0
6
5
4
3
2
1
0
Min.
Min.
-50 -25
0
25
50
75 100 125
5
10
15
20
Temperature (oC)
Supply Voltage (V)
Figure 15A. SD Input Negative Going Threshold
vs. Temperature
Figure 15B. SD Input Negative Going Threshold
vs. Supply Voltage
4
3
2
6
5
4
Max.
3
2
Max.
1
Typ.
1
0
Typ.
0
-50 -25
0
25
50
75 100 125
5
10
15
20
Temperature (oC)
Supply Voltage (V)
Figure 16B. High Level Output Voltage
vs. Supply Voltage
Figure 16A. High Level Output Voltage
vs. Temperature
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13
IR2302( )
S
& (PbF)
2.0
1.5
1.0
2.0
1.5
1.0
0.5
0.0
Max.
Max.
0.5
Typ.
Typ.
0.0
5
10
15
20
-50 -25
0
25
50
75 100 125
Temperature (oC)
Supply Voltage (V)
Figure 17B. Low Level Output Voltage
vs. Supply Voltage
Figure 17A. Low Level Output Voltage
vs. Temperature
500
400
300
200
100
0
500
400
300
200
100
0
Max.
Max.
-50 -25
0
25 50
75 100 125
100
200
300
400
500
600
Temperature (oC)
Offset Supply Voltage (V)
Figure 18A. Offset Supply Leakage Current
vs. Temperature
Figure 18B. Offset Supply Leakage Current
vs. Offset Supply Voltage
14
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IR2302( )
S
& (PbF)
200
150
100
50
200
150
100
50
Max.
Typ.
Max.
Typ.
Min.
Min.
0
0
-50 -25
0
25 50
75 100 125
5
10
15
20
Temperature (oC)
V
BS Supply Voltage (V)
Figure 19A. Quiescent VBS Supply Current
vs. Temperature
Figure 19B. Quiescent VBS Supply Current
vs. VBS Supply Voltage
3.0
3
2.5
2.0
1.5
1.0
0.5
0.0
2.5
2
1.5
1
Max
Typ.
Min.
Max.
Typ.
0.5
0
Min.
-50 -25
0
25
50
75 100 125
5
10
15
20
Temperature (oC)
V
CC Supply Voltage (V)
Figure 20B. Quiescent VCC Supply Current
vs. VCC Supply Voltage
Figure 20A. Quiescent VCC Supply Current
vs. Temperature
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15
IR2302( )
S
& (PbF)
60
50
40
30
20
50
40
30
20
10
0
Max.
Typ.
Max.
10
Typ.
0
-50 -25
0
25
50
75 100 125
5
10
15
20
Temperature (oC)
Supply Voltage (V)
Figure 21A. Logic "1" Input Bias Current
vs. Temperature
Figure 21B. Logic "1" Input Bias Current
vs. Supply Voltage
5
4
3
2
1
0
5
4
3
Max.
Max.
2
1
0
-50 -25
0
25
50
75 100 125
5
10
15
20
Temperature (oC)
Supply Voltage (V)
Figure 22B. Logic "0" Input Bias Current
vs. Supply Voltage
Figure 22A. Logic "0" Input Bias Current
vs. Temperature
16
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IR2302( )
S
& (PbF)
6
5
4
3
2
6
5
4
3
2
Max.
Max.
Typ.
Min.
Typ.
Min.
-50 -25
0
25 50 75 100 125
-50 -25
0
25 50 75 100 125
Temperature (oC)
Temperature (oC)
Figure 23. VCC and VBS Undervoltage
Threshold (+) vs. Temperature
Figure 24. VCC and VBS Undervoltage
Threshold (-) vs. Temperature
400
300
200
100
0
400
300
200
100
0
Typ.
Min.
Typ.
Min.
-50 -25
0
25
50 75 100 125
5
10
15
20
Temperature (oC)
Supply Voltage (V)
Figure 25A. Output Source Current
vs. Temperature
Figure 25B. Output Source Current
vs. Supply Voltage
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1ꢢ
IR2302( )
S
& (PbF)
600
500
400
300
200
100
0
600
500
Typ.
400
300
Min.
200
100
0
Typ.
Min.
-50 -25
0
25
50 75 100 125
5
10
15
20
Temperature (oC)
Supply Voltage (V)
Figure 26B. Output Sink Current
vs. Supply Voltage
Figure 26A. Output Sink Current
vs. Temperature
0
-2
140
120
100
80
Typ.
-4
140V
70V
0V
-6
-8
60
-10
-12
40
20
5
10
15
20
1
10
Frequency (KHz)
Figure 28. IR2302 vs. Frequency (IRFBC20),
=33 , VCC=15V
100
1000
V
BS Floating Supply Voltage (V)
Figure 27. Maximum VS Negative Offset
vs. VBS Floating Supply Voltage
R
Ω
gate
18
www.irf.com
IR2302( )
S
& (PbF)
140
120
100
80
140
120
100
80
140V
70V
0V
140V
70V
0V
60
60
40
40
20
20
1
10
100
1000
1
10
100
1000
Frequency (KHz)
Frequency (KHz)
Figure 29. IR2302 vs. Frequency (IRFBC30),
Figure 30. IR2302 vs. Frequency (IRFBC40),
Rgate=15 , VCC=15V
Rgate=22Ω, VCC=15V
Ω
140V 70V
0V
140
120
100
80
140
120
100
80
140V
70V
0V
60
60
40
40
20
20
1
10
100
1000
1
10
100
1000
Frequency (KHz)
Frequency (KHz)
Figure 31. IR2302 vs. Frequency (IRFPE50),
Rgate=10 , VCC=15V
Figure 32. IR2302S vs. Frequency (IRFBC20),
Rgate=33 , VCC=15V
Ω
Ω
www.irf.com
19
IR2302( )
S
& (PbF)
140V70V
140
120
100
80
140
120
100
80
140V
70V
0V
0V
60
60
40
40
20
20
1
1
10
100
1000
10
Frequency (KHz)
Figure 33. IR2302S vs. Frequency (IRFBC30),
Rgate=22 , VCC=15V
100
1000
Frequency (KHz)
Figure 34. IR2302S vs. Frequency (IRFBC40),
=15 , VCC=15V
Ω
R
gate
Ω
140V70V 0V
140
120
100
80
60
40
20
1
10
100
1000
Frequency (KHz)
Figure 35. IR2302S vs. Frequency
(IRFPE50), Rgate=10 , VCC=15V
Ω
20
www.irf.com
IR2302( )
S
& (PbF)
Case Outlines
01-6014
8 Lead PDIP
01-3003 01 (MS-001AB)
IN C H E S
MILLIMETERS
DIM
A
D
B
MIN
.0532
MAX
.0688
.0098
.020
MIN
1.35
0.10
0.33
0.19
4.80
3.80
MAX
1.75
0.25
0.51
0.25
5.00
4.00
FOOTPRINT
8X 0.72 [.028]
5
A
A1 .0040
b
c
.013
.0075
.189
.0098
.1968
.1574
8
1
7
2
6
3
5
6
D
E
e
H
E
.1497
0.25 [.010]
A
.050 BASIC
1.27 BASIC
6.46 [.255]
4
e 1 .025 BASIC
0.635 BASIC
H
K
L
y
.2284
.0099
.016
0°
.2440
.0196
.050
8°
5.80
0.25
0.40
0°
6.20
0.50
1.27
8°
3X 1.27 [.050]
e
6X
8X 1.78 [.070]
K x 45°
e1
A
C
y
0.10 [.004]
8X c
8X L
A1
B
8X b
7
0.25 [.010]
C A
5
6
7
DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS.
MOLD PROTRUSIONS NOT TO EXCEED 0.15 [.006].
NOTES:
1. DIMENSIONING & TOLERANCING PER ASME Y14.5M-1994.
2. CONTROLLING DIMENSION: MILLIMETER
DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS.
MOLD PROTRUSIONS NOT TO EXCEED 0.25 [.010].
3. DIMENSIONS ARE SHOWN IN MILLIMETERS [INCHES].
4. OUTLINE CONFORMS TO JEDEC OUTLINE MS-012AA.
DIMENSION IS THE LENGTH OF LEAD FOR SOLDERING TO
A SUBSTRATE.
01-602ꢢ
01-0021 11 (MS-012AA)
8 Lead SOIC
www.irf.com
21
IR2302( )
S
& (PbF)
LEADFREE PART MARKING INFORMATION
Part number
IRxxxxxx
Date code
IR logo
YWW?
?XXXX
Pin 1
Identifier
Lot Code
(Prod mode - 4 digit SPN code)
?
MARKING CODE
P
Lead Free Released
Non-Lead Free
Released
Assembly site code
Per SCOP 200-002
ORDER INFORMATION
Basic Part (Non-Lead Free)
Leadfree Part
8-Lead PDIP IR2302 order IR2302
8-Lead SOIC IR2302S order IR2302S
8-Lead PDIP R2302 not available
8-Lead SOIC IR2302S order IR2302SPbF
Thisproduct has been designed and qualified for the Automotive market.
Qualification Standards can be found on IR’s Web Site http://www.irf.com
Data and specifications subject to change without notice.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105
8/16/2004
22
www.irf.com
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