IR3103 [INFINEON]
i Motion Series; 我的运动系列
| 型号： | IR3103 |
| 厂家： | 
Infineon |
| 描述： | i Motion Series |
| 文件： | 总11页 (文件大小：198K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PD-96992Rev.A
IR3103
Series
0.75A, 500V
Half-Bridge FredFET
and Integrated Driver
Description
The IR3103 is a gate driver IC integrated with a half bridge FredFET designed for motor drive applications
up to 180W (heatsink-less). The sleek and compact single-in-line package is optimized for electronic motor
control in appliance applications such as fans and compressors for refrigerators. The IR3103 offers an
extremely compact, high performance half-bridge inverter in a single isolated package for two-phase and
three-phase motor drivers.
Proprietary HVIC and latch immune CMOS technologies, along with the HEXFET® power FredFET
technology (HEXFET® MOSFET with ultra-fast recovery body diode characteristics), enable efficient and
rugged single package construction. Propagation delays for the high and low side power FredFETs are
matched thanks to advanced IC technology.
Features
• Output Power FredFET in Half-Bridge Configuration
• High Side Gate Drive Designed for Bootstrap Operation
• Bootstrap Diode Integrated into Package
• Lower Power Level-Shifting Circuit
• Lower di/dt Gate Drive for Better Noise Immunity
• Excellent Latch Immunity on All Inputs and Outputs
• ESD Protection on All Leads
• Isolation 1500 VRMS min.
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage
parameters are absolute voltages referenced to COM. Power dissipation is measured under board mounted and still air
conditions.
Parameter
Description
Max. Value
500
Units
V
VDS
Drain to Source Blocking Voltage
DC Bus Supply Voltage (No Switching Operation)
Continuous Output Current (1)
Continuous Output Current (1)
Pulsed Output Current (2)
VDD
500
V
IO (TA=25°C)
0.7
A
IO (TA=55°C)
0.6
A
IO (TA=25°C)
2.7
A
Pd
Package Power Dissipation @TA ≤ 55°C (3)
Isolation Voltage (1min)
1.4
W
VISO
TJ
VRMS
°C
°C
°C
°C
1500
Junction Temperature (Power MOSFET)
Storage Temperature
-40 to +150
-40 to +150
300
TS
TL
Lead Temperature (soldering, 10 seconds)
Storage Temperature
TS
-40 to +150
Note 1: See figure 3, fPWM=16kHz
Note 2: TP=100ms, other conditions as per Figure 3, fPWM=16kHz
Note 3: Single Device Operating
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1
IR3103
Absolute Maximum Ratings (Continued)
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters
are absolute voltages referenced to COM.
Symbol
Parameter
Min
Max
Units Conditions
Bootstrap Continuous Diode
Forward Current
IBDF
TJ = 150°C, TA=55°C
---
0.3
A
V
V
V
V
V
High Side Floating Supply
Absolute Voltage
VB
-0.3
VB - 25
-0.3
525
VB +0.3
25
High Side Floating Supply Offset
Voltage
VO
Low Side and Logic Fixed Supply
Voltage
VCC
VIN
VSS
Input Voltage LIN, HIN
Logic Ground
VSS-0.3
VCC-25
VCC+0.3V
VCC+0.3V
Recommended Operating Conditions Driver Function
For proper operation the device should be used within the recommended conditions. All voltages are absolute
referenced to COM. The VS and VO offset are tested with all supplies biased at 15V differential.
Symbol
VB
Definition
Min
VO+10
Note 4
10
Max
VO+20
400
20
Units
High Side Floating Supply Absolute Voltage
High Voltage Supply
V
V
V
V
V
VDD
VCC
Low Side and Logic Fixed Supply Voltage
Logic Input Voltage
VIN
VSS
VCC
VSS
Logic Ground
-5
5
Note 4: Logic operation for VO of -5 to +500V. Logic state held for VO of -5V to -VBO. (Please refer to the Design Tip
DT97-3 for more details).
2
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IR3103
Half Bridge Electrical Characteristics @TJ= 25°C
VCC=VBO=15V and TJ=25°C unless otherwise specified. VDD and VIN parameters referenced to COM
Conditions
Max Units
Symbol
Parameter
Min
Typ
Drain-to-Source Breakdown
Voltage
V(BR)DSS
VIN=0V, IDD/IO=250µA
500
---
---
V
VDS=500V, VIN=0V
---
---
---
---
---
---
---
---
---
---
---
---
---
5
80
5
50
---
IHS-LK
Low Side Leakage Current
Low Side Leakage Current
µA
VDS=500V, VIN=0V, TJ=150°C
VDS=500V, VIN=0V
105
---
ILS-LK
µA
VDS=500V, VIN=0V, TJ=150°C
IO = 0.75A, VIN=5V
100
1.9
0.8
4.3
0.6
---
---
55
4
RDS(ON)
VSD
RDS(ON)
VSD
Drain-to-Source ON Resistance
Diode Forward Voltage
2.5
0.9
6.5
0.75
1.25
1.10
75
Ω
V
Ω
V
IO = 0.75A, VIN=0V
IO = 0.75A, VIN=5V, TJ=150°C
IO = 0.75A, VIN=0V, TJ=150°C
IF=1A
Drain-to-Source ON Resistance
Diode Forward Voltage
Bootstrap Diode Forward
Voltage Drop
VBDFM
V
IF=1A, TJ=125°C
EON
Turn-On Energy Losses
Turn-Off Energy Losses
Total Energy Losses
µJ
µJ
µJ
IDD/IO = 0.75A, VDD=300V,
VBO/VCC=15V, L= 6.3mH
EOFF
ETOT
10
59
85
Body-Diode Reverse Recovery
Losses
EREC
---
2
5
µJ
Energy Losses include Body-Diode
Reverse Recovery
tRR
Reverse Recovery Time
Turn-On Energy Losses
Turn-Off Energy Losses
Total Energy Losses
---
---
---
---
70
85
5
---
115
11
ns
µJ
µJ
µJ
EON
EOFF
ETOT
IDD/IO = 0.75A, VDD=300V,
VBO/VCC=15V, L=6.3mH
TJ=150°C
90
126
Body-Diode Reverse Recovery
Losses
EREC
---
6
11
µJ
Energy Losses include Body-Diode
Reverse Recovery
tRR
Reverse Recovery Time
Turn-ON MOSFET Gate Charge
Output Capacitance
---
---
---
---
90
15
12
30
---
21
---
---
ns
nC
pF
pF
V
DD=250V, IO=3.2A. Note 5
DD=400V, f=1MHz. Note 5
QG
V
COSS
VDD=0V to 400V. Note 5,6
COSS eff.
Effective Output Capacitance
TJ=150°C, VP=450V,
V+= 320V,VCC=+15V
Short Circuit Safe Operating
Area
SCSOA
ISC
10
---
---
---
---
µs
A
TJ=150°C, VP=450V, tSC<10µs
V+= 320V, VGE=15V, VCC=+15V
Short Circuit Drain Current
18.5
Note 5: Characterized on FREDFET die level, not measured at EOL
Note 6: COSS eff. is a fixed capacitance that gives same charging time as COSS while VDS is rising from 0 to 80% VDSS
.
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3
IR3103
Thermal Resistance
Thermal Resistance is measured under board mounted and still air conditions.
Symbol
Parameter
Min
Typ
Max Units Conditions
Self Thermal resistance,
junction to ambient (note 7,8)
RthJA self
---
---
70
45
°C/W
°C/W
No airflow
Mutual Thermal resistance,
junction to ambient (note 7,8)
RthJA mutual
---
---
Note 7: under normal operational conditions: both power devices working, no heatsink
Note 8: TJ=RthJA_self*PA+RthJA_mutual*PB
Static Electrical Characteristics Driver Function
VBIAS (VCC, VO)=15V, VSS=COM and TA=25°C, unless otherwise specified. VDD and VIN parameters are referenced to COM.
Symbol
VIN,th
Definition
Min
2.9
---
Typ
---
Max Units
Conditions
Logic "1" Input Voltage
Logic "0" Input Voltage
---
V
V
VIN,th
---
0.8
VCCUV+
VBO
VCC and VBO Supply Undervoltage
Positive Going Threshold
8.0
7.4
0.3
8.9
8.2
0.7
9.8
9.0
---
V
V
V
VCCUV-
VBO
VCC and VBO Supply Undervoltage
Negative Going Threshold
VCCUVH
VBO
VCC and VBO Supply Undervoltage
Lock-Out Hysteresis
ILK
VB=VO=600V
Offset Supply Leakage Current
Quiescent VBO Supply Current
Quiescent VCC Supply current
Input Bias Current
---
---
---
---
---
---
75
120
5
50
130
180
20
µA
µA
mA
µA
µA
IQBS
IQCC
IIN+
IIN-
VIN=0V to 5V
VIN=0V to 5V
VIN=0V to 5V
VIN=0V
Input Bias Current
---
2
Dynamic Electrical Characteristics Driver Function
Driver only timing unless otherwise specified.
Symbol
Definition
Min
Typ
Max Units Conditions
Input to Output Propagation Turn-
on Delay Time (see fig. 2)
TON
---
300
---
---
30
ns
ns
ns
VCC=VBO= 15V, IO=0.75A,
DD=300V
V
Input to Output Propagation Turn-
off Delay Time (see fig. 2)
TOFF
MT
---
---
400
0
Matching Propagation Delay Time
(On & Off)
VCC= VBO= 15V
4
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IR3103
Pin-Out Description
Pin
Name
VCC
HIN
LIN
Description
1
Logic and Internal Gate Drive Supply
Logic Input for High Side Gate Output
Logic Input For Low Side Gate Output
Not Connected
2
3
4
NC
VSS
COM
NC
5
Logic Ground
6
Low Side MOSFET Gate Return
Not Connected
7
VB
8
High Side Gate Drive Floating Supply
Half Bridge Output
VO
9
10
11
NC
Not Connected
VDD
High Voltage Supply
1
VB
VDD
8
11
11
1
2
3
5
VCC
HIN
LIN
9
Vo
IC Driver
HIN
0
LIN
1
VO
0
VSS
1
0
VDD
Shoot-Through
condition
1
X
1
X
6
X
COM
Figure 1: Driver Input/Output relation
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IR3103
Typical Application Connection IR3103
M
V+
BUS
VBUS
11
VBUS
11
VBUS
11
IR3103
IR3103
IR3103
8
8
8
VCC
HIN
VCC
HIN
VCC
1
1
1
9
9
HIN
LIN
9
2
3
2
3
2
3
IC Driver
IC Driver
IC Driver
LIN
LIN
VSS
VSS
VSS
4
4
4
6
6
6
COM
COM
COM
V-BUS
1. Electrolytic bus capacitors should be mounted as close as possible to the module bus terminals to reduce ringing and
EMI problems. High frequency ceramic capacitors mounted close to the module pins will further improve performance.
2. In order to provide good decoupling between Vcc-VSS and VB-VO terminals, a capacitor connected between these
terminals is recommended and should be located very close to the module pins. Additional high frequency capacitors,
typically 0.1mF, are strongly recommended.
3. Low inductance shunt resistor should be used for phase leg current sensing. Similarly, the length of the traces from
the pin to the corresponding shunt resistor should be kept as small as possible.
4. Value of the bootstrap capacitors depends upon the switching frequency. Their selection should be made based on
IR design tip DN 98-2a or Figure 8.
5. Application conditions should guarantee minimum dead-time of 400ns
IC
VCE
90% IC
VCE
IC
90% IC
50% HIN/LIN
HIN/LIN
50%
HIN/LIN
50% VCE
HIN/LIN
50% VCE
10% IC
10% IC
tr
TOFF
tf
TON
Figure 2. TON and TOFF Definitions.
6
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IR3103
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
TJ = 150°C
Trapezoidal Modulation
TA = 25°C
TA = 55°C
TA = 75°C
HS
LS
IO
0
2
4
6
8
10
12
14
16
18
20
PWM Frequency - kHz
Figure 3. Maximum RMS Phase Current vs. PWM Switching Frequency
VDD=300V , TJ=150°C, Modulation Depth=0.5, PF=0.99
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
TJ = 150°C
HS
Trapezoidal Modulation
LS
IOUT = 0.75 ARMS
IO
IOUT = 0.60 ARMS
IOUT = 0.45 ARMS
0
2
4
6
8
10
12
14
16
18
20
PWM Switching Frequency - kHz
Figure 4. Total Power Losses as Function of Switching Frequency
VDD=300V, TJ=150°C, Modulation Depth=0.5, PF=0.99
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IR3103
10
9
8
7
6
5
4
3
2
1
0
FPWM = 12 kHz
PWM = 16 kHz
FPWM = 20 kHz
TJ = 150°C
F
Trapezoidal Modulation
HS
LS
IO
0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5
Output Phase Current - ARMS
Figure 5. Total Power Losses as Function of Output Phase Current
VDD=300V, TJ=150°C, Modulation Depth=0.5, PF=0.99
150
140
130
120
110
100
90
TJ = 150°C
HS
Trapezoidal Modulation
LS
IO
80
70
60
50
40
30
20
FPWM = 12 kHz
F
F
PWM = 16 kHz
PWM = 20 kHz
10
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
Output Phase Current - ARMS
Figure 6. Maximum Allowable Ambient Temperature vs. Output Phase Current
VDD=300V, TJ=150°C, Modulation Depth=0.5, PF=0.99
8
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IR3103
2.5
2.4
2.3
2.2
2.1
2.0
1.9
1.8
1.7
1.6
1.5
1.4
1.3
1.2
1.1
1.0
0.9
0.8
0.7
0.6
0.5
-40 -30 -20 -10
0
10 20 30 40 50 60 70 80 90 100 110 120 130 140 150
TJ - Junction Temperature (°C)
Figure 7. Normalized Drain to Source Resistance vs Junction Temperature
10000
1000
100
10
TJ=-40°C
TJ=25°C
TJ=150°C
1
5
6
7
8
9
10
11
12
13
14
15
VGS (V)
Figure 8. Normalized Drain to Source Resistance vs Gate Source Voltage
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IR3103
75.0
70.0
65.0
60.0
55.0
50.0
45.0
40.0
35.0
30.0
25.0
20.0
15.0
10.0
5.0
Z
Z
th(J-A) self
th(J-A) mutual
0.0
1E-4
1E-3
0.01
0.1
1
10
100
1000
10000
Time - s
Figure 9. Thermal Impedance vs. Time
12.0
11.0
10.0
9.0
8.0
7.0
6.0
5.0
4.0
3.0
2.0
1.0
VDD
10µF
DBS
CBS
v
B
+15V
VCC
H
O
H
H
IN
IN
Vo
VS
L
L
IN
IN
6.8µF
LO
VSS
COM
VSS
COM
4.7µF
3.3µF
2.2µF
1.0µF
0
5
10
PWM Frequency - kHz
15
20
Figure 10. Recommended Bootstrap Capacitor Value vs. Switching Frequency
10
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IR3103
Package Outline
-B-
-A-
27
3.35
3.15
8.6
-C-
1
11
1.80
0.25
1.20
1.35
1.05
9X
0.40
0.20
2.54 [0.10]
10X
0.65
0.45
C A S
0.25 M
B
9X
Note 1: Marking for pin 1 identification
Note 2: Product Part Number
Note 3: Lot and Date code marking
Dimensioning and Tolerancing per ANSY Y14.5M-1992
Controlling Dimensions: INCH
Dimensions are shown in millimeters [inches]
Data and Specifications are subject to change without notice
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information
04/05
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