IRF1302LTRRPBF [INFINEON]

Power Field-Effect Transistor, 75A I(D), 20V, 0.004ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-262AA, TO-262, 3 PIN;
IRF1302LTRRPBF
型号: IRF1302LTRRPBF
厂家: Infineon    Infineon
描述:

Power Field-Effect Transistor, 75A I(D), 20V, 0.004ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-262AA, TO-262, 3 PIN

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文件: 总11页 (文件大小:229K)
中文:  中文翻译
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PD - 94520  
AUTOMOTIVE MOSFET  
IRF1302S  
IRF1302L  
Benefits  
HEXFET® Power MOSFET  
Advanced Process Technology  
Ultra Low On-Resistance  
Dynamic dv/dt Rating  
175°C Operating Temperature  
Fast Switching  
D
VDSS = 20V  
Repetitive Avalanche Allowed up to Tjmax  
R
DS(on) = 4.0mΩ  
G
ID = 174A†  
S
Description  
Specifically designed for Automotive applications, this Stripe Planar  
design of HEXFET® Power MOSFET utilizes the lastest processing  
techniques to achieve extremely low on-resistance per silicon area.  
Additional features of this design are a 175°C junction operating  
temperature, fast switching speed and improved repetitive avalanche  
rating. These benefits combine to make this design an extremely efficient  
and reliable device for use in Automotive applications and a wide variety  
of other applications.  
D2Pak  
IRF1302S  
TO-262  
IRF1302L  
Absolute Maximum Ratings  
Parameter  
Max.  
174†  
120†  
700  
Units  
ID @ TC = 25°C  
ID @ TC = 100°C  
IDM  
Continuous Drain Current, VGS @ 10V  
Continuous Drain Current, VGS @ 10V  
Pulsed Drain Current   
A
PD @TC = 25°C  
Power Dissipation  
200  
W
W/°C  
V
Linear Derating Factor  
1.4  
VGS  
EAS  
IAR  
Gate-to-Source Voltage  
± 20  
350  
Single Pulse Avalanche Energy‚  
Avalanche Current  
mJ  
A
See Fig.12a, 12b, 15, 16  
EAR  
dv/dt  
TJ  
Repetitive Avalanche Energy‡  
Peak Diode Recovery dv/dt ƒ  
Operating Junction and  
mJ  
V/ns  
TBD  
-55 to + 175  
TSTG  
Storage Temperature Range  
Soldering Temperature, for 10 seconds  
°C  
300 (1.6mm from case )  
Thermal Resistance  
Parameter  
Junction-to-Case  
Typ.  
–––  
Max.  
0.74  
Units  
°C/W  
RθJC  
RθJA  
Junction-to-Ambient (PCB mount)ˆ  
–––  
40  
www.irf.com  
1
07/16/02  
IRF1302S/IRF1302L  
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)  
Parameter  
Min. Typ. Max. Units  
20 ––– –––  
Conditions  
VGS = 0V, ID = 250µA  
V(BR)DSS  
Drain-to-Source Breakdown Voltage  
V
V(BR)DSS/TJ Breakdown Voltage Temp. Coefficient ––– 0.021 ––– V/°C Reference to 25°C, ID = 1mA  
RDS(on)  
VGS(th)  
gfs  
Static Drain-to-Source On-Resistance  
Gate Threshold Voltage  
–––  
2.0  
59  
3.3  
4.0  
mVGS = 10V, ID = 104A „  
––– 4.0  
––– –––  
V
S
VDS = 10V, ID = 250µA  
VDS = 15V, ID = 104A  
VDS = 20V, VGS = 0V  
VDS = 16V, VGS = 0V, TJ = 150°C  
VGS = 20V  
Forward Transconductance  
––– ––– 20  
––– ––– 250  
––– ––– 200  
––– ––– -200  
IDSS  
Drain-to-Source Leakage Current  
µA  
nA  
Gate-to-Source Forward Leakage  
Gate-to-Source Reverse Leakage  
Total Gate Charge  
IGSS  
VGS = -20V  
Qg  
–––  
–––  
–––  
–––  
79 120  
ID = 104A  
Qgs  
Qgd  
td(on)  
tr  
Gate-to-Source Charge  
Gate-to-Drain ("Miller") Charge  
Turn-On Delay Time  
Rise Time  
18  
31  
27  
46  
nC VDS = 16V  
VGS = 10V„  
VDD = 11V  
28 –––  
––– 130 –––  
ID = 104A  
ns  
td(off)  
tf  
Turn-Off Delay Time  
Fall Time  
–––  
–––  
47 –––  
16 –––  
RG = 4.5Ω  
VGS = 10V „  
D
Between lead,  
4ꢀ5  
LD  
LS  
Internal Drain Inductance  
Internal Source Inductance  
–––  
–––  
–––  
–––  
6mm (0.25in.)  
nH  
G
from package  
7ꢀ5  
and center of die contact  
S
Ciss  
Input Capacitance  
––– 3600 –––  
––– 2370 –––  
––– 520 –––  
––– 5710 –––  
––– 2370 –––  
––– 3540 –––  
VGS = 0V  
Coss  
Output Capacitance  
pF  
VDS = 25V  
Crss  
Reverse Transfer Capacitance  
Output Capacitance  
ƒ = 1.0MHz, See Fig. 5  
Coss  
VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz  
VGS = 0V, VDS = 16V, ƒ = 1.0MHz  
VGS = 0V, VDS = 0V to 16V  
Coss  
Output Capacitance  
Coss eff.  
Effective Output Capacitance ꢀ  
Source-Drain Ratings and Characteristics  
Parameter  
Continuous Source Current  
(Body Diode)  
Min. Typ. Max. Units  
Conditions  
D
IS  
MOSFET symbol  
––– –––  
174†  
showing the  
A
G
ISM  
Pulsed Source Current  
(Body Diode)   
integral reverse  
––– ––– 700  
S
p-n junction diode.  
VSD  
trr  
Diode Forward Voltage  
Reverse Recovery Time  
Reverse RecoveryCharge  
Forward Turn-On Time  
––– ––– 1.3  
––– 66 100  
––– 130 200  
V
TJ = 25°C, IS = 104A, VGS = 0V „  
ns  
TJ = 25°C, IF = 104A  
Qrr  
ton  
nC di/dt = 100A/µs „  
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)  
2
www.irf.com  
IRF1302S/IRF1302L  
10000  
1000  
100  
10  
10000  
VGS  
15V  
10V  
8.0V  
7.0V  
6.0V  
5.5V  
5.0V  
VGS  
15V  
10V  
8.0V  
7.0V  
6.0V  
5.5V  
5.0V  
TOP  
TOP  
1000  
100  
10  
BOTTOM 4.5V  
BOTTOM 4.5V  
4.5V  
4.5V  
20µs PULSE WIDTH  
Tj = 175°C  
20µs PULSE WIDTH  
Tj = 25°C  
1
1
0.1  
1
10  
100  
0.1  
1
10  
100  
V
, Drain-to-Source Voltage (V)  
V
, Drain-to-Source Voltage (V)  
DS  
DS  
Fig 1. Typical Output Characteristics  
Fig 2. Typical Output Characteristics  
2.0  
1000.00  
174A  
=
I
D
1.5  
1.0  
0.5  
0.0  
T = 175°C  
J
100.00  
T = 25°C  
J
V
= 15V  
DS  
20µs PULSE WIDTH  
V
= 10V  
GS  
10.00  
-60 -40 -20  
0
20 40 60 80 100 120 140 160 180  
°
4.0  
5.0  
6.0 7.0  
T , Junction Temperature  
(
C)  
J
V
, Gate-to-Source Voltage (V)  
GS  
Fig 3. Typical Transfer Characteristics  
Fig 4. Normalized On-Resistance  
Vs. Temperature  
www.irf.com  
3
IRF1302S/IRF1302L  
12  
10  
7
100000  
D
I
= 104A  
V
= 0V,  
f = 1 MHZ  
V
= 16V  
GS  
DS  
C
= C + C  
,
C
SHORTED  
iss  
gs  
gd  
ds  
C
= C  
rss  
gd  
C
= C + C  
oss  
ds  
gd  
10000  
1000  
100  
Ciss  
Coss  
5
Crss  
10  
2
0
0
20  
40  
60  
80  
100  
1
100  
Q
, Total Gate Charge (nC)  
G
V
, Drain-to-Source Voltage (V)  
DS  
Fig 6. Typical Gate Charge Vs.  
Fig 5. Typical Capacitance Vs.  
Gate-to-Source Voltage  
Drain-to-Source Voltage  
1000  
10000  
OPERATION IN THIS AREA  
LIMITED BY R (on)  
DS  
°
T = 175  
J
C
100  
1000  
100  
10  
100µsec  
1msec  
10  
°
T = 25  
C
J
1
10msec  
Tc = 25°C  
Tj = 175°C  
Single Pulse  
V
= 0 V  
GS  
0.1  
1
0.2  
0.7  
1.2  
1.7  
2.2  
1
10  
100  
V
,Source-to-Drain Voltage (V)  
SD  
V
, Drain-toSource Voltage (V)  
DS  
Fig 8. Maximum Safe Operating Area  
Fig 7. Typical Source-Drain Diode  
Forward Voltage  
4
www.irf.com  
IRF1302S/IRF1302L  
175  
131  
88  
RD  
VDS  
LIMITED BY PACKAGE  
VGS  
DꢀUꢀTꢀ  
RG  
+VDD  
-
10V  
Pulse Width ≤ 1 µs  
Duty Factor ≤ 0.1 %  
Fig 10a. Switching Time Test Circuit  
44  
V
DS  
90%  
0
25  
50  
75  
100  
125  
150  
C)  
175  
°
(
T
, Case Temperature  
C
10%  
V
GS  
Fig 9. Maximum Drain Current Vs.  
t
t
r
t
t
f
d(on)  
d(off)  
Case Temperature  
Fig 10b. Switching Time Waveforms  
1
D = 0.50  
0.20  
0.10  
0.1  
P
DM  
0.05  
t
SINGLE PULSE  
1
0.02  
(THERMAL RESPONSE)  
t
2
0.01  
Notes:  
1. Duty factor D =  
t / t  
1
2
2. Peak T  
= P  
x Z  
+ T  
J
DM  
thJC  
C
0.01  
0.00001  
0.0001  
0.001  
0.01  
0.1  
1
t , Rectangular Pulse Duration (sec)  
1
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case  
www.irf.com  
5
IRF1302S/IRF1302L  
700  
560  
420  
280  
140  
0
15V  
I
D
TOP  
43A  
74A  
BOTTOM  
104A  
DRIVER  
+
L
V
DS  
D.U.T  
AS  
R
G
V
DD  
-
I
A
20V  
0.01  
t
p
Fig 12a. Unclamped Inductive Test Circuit  
V
(BR)DSS  
t
p
25  
50  
75  
100  
125  
°
( C)  
150  
175  
Starting Tj, Junction Temperature  
I
AS  
Fig 12c. Maximum Avalanche Energy  
Fig 12b. Unclamped Inductive Waveforms  
Vs. Drain Current  
Q
G
10 V  
Q
Q
GD  
GS  
4.0  
V
G
3.0  
2.0  
1.0  
Charge  
I
= 250µA  
D
Fig 13a. Basic Gate Charge Waveform  
Current Regulator  
Same Type as D.U.T.  
50KΩ  
.2µF  
12V  
.3µF  
+
V
DS  
D.U.T.  
-
V
GS  
-75 -50 -25  
0
25 50 75 100 125 150 175  
, Temperature ( °C )  
3mA  
T
J
I
I
D
G
Current Sampling Resistors  
Fig 14. Threshold Voltage Vs. Temperature  
Fig 13b. Gate Charge Test Circuit  
6
www.irf.com  
IRF1302S/IRF1302L  
1000  
100  
10  
Duty Cycle = Single Pulse  
0.01  
Allowed avalanche Current vs  
avalanche pulsewidth, tav  
assuming  
Tj = 25°C due to  
0.05  
0.10  
avalanche losses  
1
1.0E-07  
1.0E-06  
1.0E-05  
1.0E-04  
1.0E-03  
1.0E-02  
1.0E-01  
tav (sec)  
Fig 15. Typical Avalanche Current Vs.Pulsewidth  
Notes on Repetitive Avalanche Curves , Figures 15, 16:  
(For further info, see AN-1005 at www.irf.com)  
1. Avalanche failures assumption:  
Purely a thermal phenomenon and failure occurs at a  
temperature far in excess of Tjmax. This is validated for  
every part type.  
2. Safe operation in Avalanche is allowed as long asTjmax is  
not exceeded.  
3. Equation below based on circuit and waveforms shown in  
Figures 12a, 12b.  
4. PD (ave) = Average power dissipation per single  
avalanche pulse.  
5. BV = Rated breakdown voltage (1.3 factor accounts for  
voltage increase during avalanche).  
6. Iav = Allowable avalanche current.  
410  
360  
310  
260  
210  
160  
110  
60  
TOP  
BOTTOM 10% Duty Cycle  
= 104A  
Single Pulse  
I
D
7. T = Allowable rise in junction temperature, not to exceed  
Tjmax (assumed as 25°C in Figure 15, 16).  
tav = Average time in avalanche.  
10  
25  
50  
75  
100  
125  
150  
D = Duty cycle in avalanche = tav ·f  
ZthJC(D, tav) = Transient thermal resistance, see figure 11)  
Starting T , Junction Temperature (°C)  
J
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC  
Iav = 2DT/ [1.3·BV·Zth]  
Fig 16. Maximum Avalanche Energy  
EAS (AR) = PD (ave)·tav  
Vs. Temperature  
www.irf.com  
7
IRF1302S/IRF1302L  
Peak Diode Recovery dv/dt Test Circuit  
+
Circuit Layout Considerations  
Low Stray Inductance  
Ground Plane  
Low Leakage Inductance  
Current Transformer  
DꢀUꢀT*  
ƒ
-
+
‚
-
„
-
+

RG  
dv/dt controlled by RG  
ISD controlled by Duty Factor "D"  
DꢀUꢀTꢀ - Device Under Test  
+
-
VDD  
VGS  
* Reverse Polarity of DꢀUꢀT for P-Channel  
Driver Gate Drive  
P.W.  
Period  
Period  
D =  
P.W.  
V
[
=10V  
] ***  
GS  
D.U.T. I Waveform  
SD  
Reverse  
Recovery  
Current  
Body Diode Forward  
Current  
di/dt  
D.U.T. V Waveform  
DS  
Diode Recovery  
dv/dt  
V
DD  
]
[
Re-Applied  
Voltage  
Body Diode  
Forward Drop  
Inductor Curent  
I
[
]
SD  
Ripple 5%  
*** VGS = 5ꢀ0V for Logic Level and 3V Drive Devices  
Fig 17ꢀ For N-channel HEXFET® power MOSFETs  
8
www.irf.com  
IRF1302S/IRF1302L  
D2Pak Package Outline  
D2Pak Part Marking Information  
THIS IS AN IRF530S WITH  
PART NUM  
BER  
L
OT CODE 8024  
INTERNATIONAL  
RECTIFIER  
LOGO  
ASSEM  
BLED ON WW 02, 2000  
IN THE AS  
F530S  
SEMBLY LINE "L"  
DATE CODE  
YEAR 0 = 20  
WEEK 02  
LINE L  
00  
ASSEMBLY  
LOT CODE  
www.irf.com  
9
IRF1302S/IRF1302L  
TO-262 Package Outline  
TO-262 Part Marking Information  
EXA  
MPLE:  
THIS  
IS AN IRL3103L  
LOT CODE 178  
PART NUMBER  
9
INTERNATIONAL  
RECTIFI  
ASSEMBLED ON WW 19, 1  
997  
ER  
IN THE ASSEMBLY LINE "C"  
LOGO  
DATE CODE  
YEAR 7 = 1997  
WEEK 19  
ASSEMB  
LOT CODE  
LY  
L
INE C  
10  
www.irf.com  
IRF1302S/IRF1302L  
D2Pak Tape & Reel Information  
TRR  
1.60 (.063)  
1.50 (.059)  
1.60 (.063)  
1.50 (.059)  
4.10 (.161)  
3.90 (.153)  
0.368 (.0145)  
0.342 (.0135)  
FEED DIRECTION  
TRL  
11.60 (.457)  
11.40 (.449)  
1.85 (.073)  
1.65 (.065)  
24.30 (.957)  
23.90 (.941)  
15.42 (.609)  
15.22 (.601)  
1.75 (.069)  
1.25 (.049)  
10.90 (.429)  
10.70 (.421)  
4.72 (.136)  
4.52 (.178)  
16.10 (.634)  
15.90 (.626)  
FEED DIRECTION  
13.50 (.532)  
12.80 (.504)  
27.40 (1.079)  
23.90 (.941)  
4
330.00  
(14.173)  
MAX.  
60.00 (2.362)  
MIN.  
30.40 (1.197)  
MAX.  
NOTES :  
1. COMFORMS TO EIA-418.  
2. CONTROLLING DIMENSION: MILLIMETER.  
3. DIMENSION MEASURED @ HUB.  
4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.  
26.40 (1.039)  
24.40 (.961)  
4
3
Notes:  
 Repetitive rating; pulse width limited by  
max. junction temperature. (See fig. 11).  
‚ Starting TJ = 25°C, L = 0.063mH  
Coss eff. is a fixed capacitance that gives the same charging time  
as Coss while VDS is rising from 0 to 80% VDSS  
.
†
Calculated continuous current based on maximum allowable  
junction temperature. Package limitation current is 75A.  
Limited by TJmax , see Fig.12a, 12b, 15, 16 for typical repetitive  
avalanche performance.  
RG = 25, IAS = 104A. (See Figure 12).  
ƒ ISD 104A, di/dt 100A/µs, VDD V(BR)DSS  
TJ 175°C.  
„ Pulse width 400µs; duty cycle 2%.  
,
‡
ˆ This is applied to D2Pak, when mounted on 1" square PCB ( FR-4 or G-10 Material ).  
For recommended footprint and soldering techniques refer to application note #AN-994.  
Data and specifications subject to change without notice.  
This product has been designed and qualified for the Industrial market.  
Qualification Standards can be found on IR’s Web site.  
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105  
TAC Fax: (310) 252-7903  
Visit us at www.irf.com for sales contact information.07/02  
www.irf.com  
11  

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