IRF1310STRR [INFINEON]

Power Field-Effect Transistor, 43A I(D), 100V, 0.04ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET,;


型号：	IRF1310STRR
厂家：	Infineon
描述：	Power Field-Effect Transistor, 43A I(D), 100V, 0.04ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, 开关晶体管
文件：	总8页 (文件大小：182K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

PD - 9.1221

IRF1310S

HEXFET^®Power MOSFET

Advanced Process Technology

Ultra Low On-Resistance

Surface Mount

Available in Tape & Reel

Dynamic dv/dt Rating

V_DSS= 100V

R_DS(on)= 0.04Ω

I_D= 41A

Repetitive Avalanche Rated

175°C Operating Temperature

Description

Fourth Generation HEXFETs from International Rectifier utilize advanced

processing techniques to achieve the lowest possible on-resistance per silicon

area. This benefit, combined with the fast switching speed and ruggedized device

design that HEXFET Power MOSFETs are well known for, provides the designer

with an extremely efficient device for use in a wide variety of applications.

The SMD-220 is a surface mount power package capable of accommodating die

sizes up to HEX-4. It provides the highest power capability and the lowest possible

on-resistance in any existing surface mount package. The SMD-220 is suitable for

high current applications because of its low internal connection resistance and can

dissipate up to 2.0W in a typical surface mount application.

SMD-220

Absolute Maximum Ratings

Parameter

Max.

Units

I_D@ T_C= 25°C

I_D@ T_C= 100°C

I_DM

Continuous Drain Current, V_GS@ 10V

Pulsed Drain Current

160

P_D@T_C= 25°C

Power Dissipation

170

Power Dissipation (PCB Mount)**

Linear Derating Factor

3.8

1.1

W/°C

Linear Derating Factor (PCB Mount)**

Gate-to-Source Voltage

0.025

V_GS

±20

E_AS

Single Pulse Avalanche Energy

Avalanche Current

230

I_AR

E_AR

Repetitive Avalanche Energy

Peak Diode Recovery dv/dt

5.5

V/ns

dv/dt

T_J,T_STG

Junction and Storage Temperature Range

Soldering Temperature, for 10 seconds

-55 to + 175

300 (1.6mm from case)

°C

Thermal Resistance

Parameter

Junction-to-Case

Min.

––––

Typ.

––––

Max.

0.90

Units

R_θJC

R_θJA

Junction-to-Ambient (PCB Mount)**

Junction-to-Ambient

°C/W

** When mounted on 1" square PCB (FR-4 or G-10 Material).

For recommended footprint and soldering techniques refer to application note #AN-994.

Revision 0

IRF1310S

Electrical Characteristics @ T = 25°C (unless otherwise specified)

Parameter

Min. Typ. Max. Units

100 ––– –––

––– 0.10 ––– V/°C Reference to 25°C, I_D= 1mA

Conditions

V_(BR)DSS

Drain-to-Source Breakdown Voltage

V_GS= 0V, ID = 250µA

∆V_(BR)DSS/∆T_JBreakdown Voltage Temp. Coefficient

R_DS(ON)

V_GS(th)

g_fs

Static Drain-to-Source On-Resistance

Gate Threshold Voltage

––– ––– 0.04

2.0 ––– 4.0

12 ––– –––

––– ––– 25

––– ––– 250

––– ––– 100

––– ––– -100

––– ––– 110

––– ––– 18

––– ––– 42

––– 13 –––

––– 77 –––

––– 82 –––

––– 64 –––

Ω

V_GS= 10V, I_D= 25A

V_DS= V_GS, I_D= 250µA

V_DS= 50V, I_D= 25A

V_DS= 100V, V_GS= 0V

V_DS= 80V, V_GS= 0V, T_J= 150°C

V_GS= 20V

Forward Transconductance

I_DSS

I_GSS

Drain-to-Source Leakage Current

µA

Gate-to-Source Forward Leakage

Gate-to-Source Reverse Leakage

Total Gate Charge

V_GS= -20V

Q_g

I_D= 25A

Q_gs

Q_gd

t_d(on)

t_r

Gate-to-Source Charge

Gate-to-Drain ("Miller") Charge

Turn-On Delay Time

Rise Time

V_DS= 80V

V_GS= 10V, See Fig. 6 and 13

V_DD= 50V

I_D= 25A

t_d(off)

t_f

Turn-Off Delay Time

Fall Time

R_G= 9.1Ω

R_D= 2.0Ω, See Fig. 10

Between lead,

L_D

L_S

Internal Drain Inductance

Internal Source Inductance

––– 4.5 –––

––– 7.5 –––

6mm (0.25in.)

from package

and center of die contact

V_GS= 0V

C_iss

C_oss

C_rss

Input Capacitance

––– 2500 –––

––– 630 –––

––– 130 –––

Output Capacitance

V_DS= 25V

Reverse Transfer Capacitance

ƒ = 1.0MHz, See Fig. 5

Source-Drain Ratings and Characteristics

Parameter

Continuous Source Current

(Body Diode)

Min. Typ. Max. Units

Conditions

MOSFET symbol

I_S

––– ––– 41

showing the

I_SM

Pulsed Source Current

(Body Diode)

integral reverse

––– ––– 160

p-n junction diode.

T_J= 25°C, I_S= 25A, V_GS= 0V

T_J= 25°C, I_F= 25A

V_SD

t_rr

Diode Forward Voltage

Reverse Recovery Time

Reverse RecoveryCharge

Forward Turn-On Time

––– ––– 2.5

––– 140 210

––– 0.79 1.2

Q_rr

t_on

µC di/dt = 100A/µs

Intrinsic turn-on time is negligible (turn-on is dominated by L_S+L_D)

Notes:

Repetitive rating; pulse width limited by

max. junction temperature. ( See fig. 11 )

_SD≤ 25A, di/dt ≤ 170A/µs, V_DD≤ V_(BR)DSS,

T_J≤ 175°C

V_DD= 25V, starting T_J= 25°C, L = 3.1mH

Pulse width ≤ 300µs; duty cycle ≤ 2%.

R_G= 25Ω, I_AS= 25A. (See Figure 12)

IRF1310S

100 0

10 0

1 0

1000

100

VGS

15V

VGS

15V

TOP

10V

8.0V

7.0V

6.0V

5.5V

5.0V

8.0V

7.0V

6.0V

5.5V

5.0V

BOTTOM 4.5V

4.5V

20µs PULSE WIDTH

= 175°C

= 25°C

0.1

100

0.1

100

, Drain-to-Source Voltage (V)

Fig 1. Typical Output Characteristics,

Fig 2. Typical Output Characteristics,

T_C= 25^oC

T_C= 175^oC

1000

100

3.0

2.5

2.0

1.5

1.0

0.5

0.0

= 25A

= 25°C

= 175°C

= 50V

D S

20µ s PULS E W ID TH

= 10V

1 0

-6 0 -4 0 -20

20 40 60 80 100 120 140 160 180

, G ate-to-Source V oltage (V)

, Junction Temperature (°C)

G S

Fig 3. Typical Transfer Characteristics

Fig 4. Normalized On-Resistance

Vs. Temperature

IRF1310S

4000

= 0V,

f = 1MHz

= 25A

iss

rss

oss

= C + C

SHORTED

= 80V

= 50V

= 20V

= C

= C + C

3000

2000

1000

iss

oss

rss

FOR TEST CIRCUIT

SEE FIGURE 13

100

120

, Drain-to-Source Voltage (V)

, Total Gate Charge (nC)

Fig 5. Typical Capacitance Vs.

Fig 6. Typical Gate Charge Vs.

Drain-to-Source Voltage

Gate-to-Source Voltage

1000

100

1000

100

OPERATION IN THIS AREA LIMITED

BY R

DS(on)

10µs

T = 175°C

100µs

1ms

T = 25°C

10ms

= 25°C

= 175°C

100ms

= 0V

Single Pulse

100

1000

0.5

1.5

2.5

, Drain-to-Source Voltage (V)

, Source-to-Drain Voltage (V)

Fig 7. Typical Source-Drain Diode

Fig 8. Maximum Safe Operating Area

Forward Voltage

IRF1310S

R_D

V_DS

V_GS

D.U.T.

R_G

V_DD

10 V

Pulse Width≤ 1 µs

Duty Factor≤ 0.1 %

Fig 10a. Switching Time Test Circuit

100

125

150

175

, Case Temperature (°C)

Fig 9. Maximum Drain Current Vs.

Fig 10b. Switching Time Waveforms

Case Temperature

= 0.5 0

0 .20

0 .10

0.0 5

0.1

SING L E PUL SE

0 .02

0.01

(T HERM AL RESPO NSE)

N o tes:

1. D uty fa ctor D =

/ t

2. P e ak T = P

x Z

+ T

D M

thJC

0.01

0.00001

0.0001

0 .001

0.01

0.1

t₁, Rectangular Pulse Duration (sec)

Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case

IRF1310S

600

500

400

300

200

100

TOP

10A

18A

BOTTOM 25A

10 V

Fig 12a. Unclamped Inductive Test Circuit

= 50V

100

125

150

175

Starting T , Junction Temperature (°C)

Fig 12c. Maximum Avalanche Energy

Vs. Drain Current

Fig 12b. Unclamped Inductive Waveforms

10 V

Fig 13a. Basic Gate Charge Waveform

Fig 13b. Gate Charge Test Circuit

IRF1310S

Package Outline

SMD-220 Outline

IRF1310S

Part Marking Information

Package Outline

SMD-220 Tape and Reel

WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331

EUROPEAN HEADQUARTERS: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: (44) 0883 713215

IR CANADA: 7321 Victoria Park Ave., Suite 201, Markham, Ontario L3R 3L1, Tel: (905) 475 1897 IR GERMANY:

Saalburgstrasse 157, 61350 Bad Homburg Tel: 6172 37066 IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: (39) 1145

10111 IR FAR EAST: K&H Bldg., 2F, 3-30-4 Nishi-Ikeburo 3-Chome, Toshima-Ki, Tokyo 171 Tel: (03)3983 0641 IR

SOUTHEAST ASIA: 315 Outram Road, #10-02 Tan Boon Liat Building, 0316 Tel: 65 221 8371

Data and specifications subject to change without notice.

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