IRF1404STRR [INFINEON]
Power Field-Effect Transistor, 75A I(D), 40V, 0.004ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, PLASTIC, D2PAK-3;
| 型号： | IRF1404STRR |
| 厂家： | 
Infineon |
| 描述： | Power Field-Effect Transistor, 75A I(D), 40V, 0.004ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, PLASTIC, D2PAK-3 |
| 文件： | 总8页 (文件大小：107K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PD -91896E
IRF1404
HEXFET® Power MOSFET
l Advanced Process Technology
l Ultra Low On-Resistance
l Dynamic dv/dt Rating
D
VDSS = 40V
l 175°C Operating Temperature
l Fast Switching
RDS(on) = 0.004Ω
G
l Fully Avalanche Rated
ID = 162A
S
Description
Seventh Generation HEXFET® Power MOSFETs from
International Rectifier utilize advanced processing
techniques to achieve extremely low on-resistance per
silicon area. This benefit, combined with the fast
switching speed and ruggedized device design that
HEXFET power MOSFETs are well known for, provides
the designer with an extremely efficient and reliable
device for use in a wide variety of applications.
The TO-220 package is universally preferred for all
commercial-industrial applications at power dissipation
levels to approximately 50 watts. The low thermal
resistance and low package cost of the TO-220
contributetoitswideacceptancethroughouttheindustry.
TO-220AB
Absolute Maximum Ratings
Parameter
Max.
162
115
650
200
1.3
Units
ID @ TC = 25°C
ID @ TC = 100°C
IDM
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
A
PD @TC = 25°C
Power Dissipation
W
W/°C
V
Linear Derating Factor
VGS
EAS
IAR
Gate-to-Source Voltage
± 20
519
95
Single Pulse Avalanche Energy
Avalanche Current
mJ
A
EAR
dv/dt
TJ
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Operating Junction and
20
mJ
V/ns
5.0
-55 to + 175
-55 to + 175
TSTG
Storage Temperature Range
Soldering Temperature, for 10 seconds
Mounting Torque, 6-32 or M3 screw
°C
300 (1.6mm from case )
10 lbf•in (1.1N•m)
Thermal Resistance
Parameter
Junction-to-Case
Typ.
–––
Max.
Units
RθJC
RθCS
RθJA
0.75
–––
62
Case-to-Sink, Flat, Greased Surface
Junction-to-Ambient
0.50
–––
°C/W
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1
10/20/00
IRF1404
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter
Min. Typ. Max. Units
40 ––– –––
Conditions
VGS = 0V, ID = 250µA
V(BR)DSS
Drain-to-Source Breakdown Voltage
V
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient ––– 0.036 ––– V/°C Reference to 25°C, ID = 1mA
RDS(on)
VGS(th)
gfs
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
––– 0.0035 0.004
2.0 ––– 4.0
Ω
V
S
VGS = 10V, ID = 95A
VDS = 10V, ID = 250µA
VDS = 25V, ID = 60A
VDS = 40V, VGS = 0V
VDS = 32V, VGS = 0V, TJ = 150°C
VGS = 20V
Forward Transconductance
106 ––– –––
––– ––– 20
––– ––– 250
––– ––– 200
––– ––– -200
––– 160 200
IDSS
Drain-to-Source Leakage Current
µA
nA
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
IGSS
VGS = -20V
Qg
ID = 95A
Qgs
Qgd
td(on)
tr
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
–––
–––
–––
35 –––
42 60
17 –––
nC VDS = 32V
VGS = 10V
VDD = 20V
––– 140 –––
ID = 95A
ns
td(off)
tf
Turn-Off Delay Time
Fall Time
–––
–––
72 –––
26 –––
RG = 2.5Ω
RD = 0.21Ω
D
Between lead,
4.5
LD
LS
Internal Drain Inductance
Internal Source Inductance
–––
–––
–––
–––
6mm (0.25in.)
nH
G
from package
7.5
and center of die contact
S
Ciss
Input Capacitance
––– 7360 –––
––– 1680 –––
––– 240 –––
––– 6630 –––
––– 1490 –––
––– 1540 –––
VGS = 0V
Coss
Output Capacitance
pF
VDS = 25V
Crss
Reverse Transfer Capacitance
Output Capacitance
ƒ = 1.0MHz, See Fig. 5
Coss
VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
VGS = 0V, VDS = 32V, ƒ = 1.0MHz
VGS = 0V, VDS = 0V to 32V
Coss
Output Capacitance
Coss eff.
Effective Output Capacitance ꢀ
Source-Drain Ratings and Characteristics
Parameter
Continuous Source Current
(Body Diode)
Min. Typ. Max. Units
Conditions
D
IS
MOSFET symbol
––– –––
162
showing the
A
G
ISM
Pulsed Source Current
(Body Diode)
integral reverse
––– ––– 650
S
p-n junction diode.
VSD
trr
Diode Forward Voltage
Reverse Recovery Time
Reverse RecoveryCharge
Forward Turn-On Time
––– ––– 1.3
––– 71 110
––– 180 270
V
TJ = 25°C, IS = 95A, VGS = 0V
ns
TJ = 25°C, IF = 95A
Qrr
ton
nC di/dt = 100A/µs
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
Repetitive rating; pulse width limited by
Pulse width ≤ 300µs; duty cycle ≤ 2%.
max. junction temperature. (See fig. 11)
ꢀCoss eff. is a fixed capacitance that gives the same charging time
Starting TJ = 25°C, L = 0.12mH
RG = 25Ω, IAS = 95A. (See Figure 12)
as Coss while VDS is rising from 0 to 80% VDSS
Calculated continuous current based on maximum allowable
junction temperature. Package limitation current is 75A
ISD ≤ 95A, di/dt ≤ 150A/µs, VDD ≤ V(BR)DSS
TJ ≤ 175°C
,
2
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IRF1404
1000
100
10
1000
100
10
VGS
15V
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
TOP
TOP
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
BOTTOM 4.5V
4.5V
4.5V
20µs PULSE WIDTH
T = 175 C
J
20µs PULSE WIDTH
T = 25 C
J
°
°
0.1
1
10
100
0.1
1
10
100
V
, Drain-to-Source Voltage (V)
V
, Drain-to-Source Voltage (V)
DS
DS
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000
2.5
159A
=
I
D
°
T = 25 C
J
°
2.0
1.5
1.0
0.5
0.0
T = 175 C
J
100
V
= 25V
DS
V
= 10V
GS
20µs PULSE WIDTH
10
4.0
-60 -40 -20
0
20 40 60 80 100 120 140 160 180
°
5.0
6.0
7.0 8.0 9.0
T , Junction Temperature ( C)
J
V
, Gate-to-Source Voltage (V)
GS
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance
Vs. Temperature
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3
IRF1404
20
16
12
8
12000
V
I
D
= 95A
= 0V,
f = 1MHz
C
GS
C
= C + C
SHORTED
ds
iss
gs
gd ,
gd
C
= C
gd
V
V
= 32V
= 20V
rss
DS
DS
10000
8000
6000
4000
2000
0
C
= C + C
oss
ds
C
iss
C
oss
4
FOR TEST CIRCUIT
SEE FIGURE 13
C
rss
0
1
10
100
0
40
80
120
160
200
240
V
, Drain-to-Source Voltage (V)
Q
, Total Gate Charge (nC)
DS
G
Fig 6. Typical Gate Charge Vs.
Fig 5. Typical Capacitance Vs.
Gate-to-Source Voltage
Drain-to-Source Voltage
1000
10000
1000
100
10
OPERATION IN THIS AREA LIMITED
BY R
DS(on)
°
T = 175 C
J
100
10
1
10us
100us
°
T = 25 C
J
1ms
10ms
°
= 25 C
T
C
°
T
= 175 C
J
V
= 0 V
Single Pulse
GS
2.0
1
0.4
0.8
1.2
1.6
2.4
1
10
100
V
,Source-to-Drain Voltage (V)
V
, Drain-to-Source Voltage (V)
SD
DS
Fig 8. Maximum Safe Operating Area
Fig 7. Typical Source-Drain Diode
Forward Voltage
4
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IRF1404
RD
200
160
120
80
VDS
LIMITED BY PACKAGE
VGS
10V
D.U.T.
RG
+VDD
-
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 10a. Switching Time Test Circuit
40
V
DS
90%
0
25
50
75
100
125
150
175
°
, Case Temperature ( C)
T
C
10%
V
GS
Fig 9. Maximum Drain Current Vs.
t
t
r
t
t
f
d(on)
d(off)
Case Temperature
Fig 10b. Switching Time Waveforms
1
D = 0.50
0.20
0.1
0.10
0.05
P
DM
t
1
0.02
0.01
t
2
SINGLE PULSE
(THERMAL RESPONSE)
Notes:
1. Duty factor D =
t / t
1 2
2. Peak T = P
x Z
+ T
C
J
DM
thJC
0.01
0.00001
0.0001
0.001
0.01
0.1
1
t , Rectangular Pulse Duration (sec)
1
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRF1404
1200
1000
800
600
400
200
0
1 5V
I
D
TOP
39A
67A
BOTTOM 95A
DRIVER
L
V
G
DS
D.U.T
R
+
V
D D
-
I
A
AS
20V
0.01
t
Ω
p
Fig 12a. Unclamped Inductive Test Circuit
V
(BR)DSS
t
p
25
50
75
100
125
150
175
°
Starting T , Junction Temperature( C)
J
I
AS
Fig 12c. Maximum Avalanche Energy
Fig 12b. Unclamped Inductive Waveforms
Vs. Drain Current
Q
G
10 V
50
Q
Q
GD
GS
V
48
46
44
42
40
G
Charge
Fig 13a. Basic Gate Charge Waveform
Current Regulator
Same Type as D.U.T.
50KΩ
.2µF
12V
.3µF
+
V
DS
D.U.T.
-
0
20
I
40
60
80
100
V
GS
, Avalanche Current ( A)
3mA
AV
I
I
D
G
Current Sampling Resistors
Fig 12d. Typical Drain-to-Source Voltage
Vs. Avalanche Current
Fig 13b. Gate Charge Test Circuit
6
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IRF1404
Peak Diode Recovery dv/dt Test Circuit
+
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
D.U.T
-
+
-
-
+
RG
• dv/dt controlled by RG
+
-
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
VDD
Driver Gate Drive
P.W.
P.W.
Period
Period
D =
V
=10V
*
GS
D.U.T. I Waveform
SD
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. V Waveform
DS
Diode Recovery
dv/dt
V
DD
Re-Applied
Voltage
Body Diode
Forward Drop
Inductor Curent
I
SD
Ripple ≤ 5%
* VGS = 5V for Logic Level Devices
Fig 14. For N-channel HEXFET® Power MOSFETs
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7
IRF1404
TO-220AB Package Outline
Dimensions are shown in millimeters (inches)
10.54 (.415)
10.29 (.405)
- B
-
3.78 (.149)
3.54 (.139)
2.87 (.113)
2.62 (.103)
4.69 (.185)
4.20 (.165)
1.32 (.052)
1.22 (.048)
- A
-
6.47 (.255)
6.10 (.240)
4
15.24 (.600)
14.84 (.584)
1.15 (.045)
M IN
LEAD ASSIG NM ENTS
1
2
3
4
- GATE
1
2
3
- DRAIN
- SOU RC E
- DRAIN
14.09 (.555)
13.47 (.530)
4.06 (.160)
3.55 (.140)
0.93 (.037)
0.69 (.027)
0.55 (.022)
0.46 (.018)
3X
3X
1.40 (.055)
3X
1.15 (.045)
0.36 (.014)
M
B
A
M
2.92 (.115)
2.64 (.104)
2.54 (.100)
2X
N OTES:
1
2
D IM ENSIONING
&
TOLERANCING PER ANSI Y14.5M , 1982.
3
4
OUTLINE CONFORM S TO JEDEC OUTLINE TO-220AB.
HEATSINK LEAD M EASUREM ENTS DO NOT INCLU DE BURRS.
C ONTROLLING DIM ENSION : INCH
&
TO-220AB Part Marking Information
EXAMPLE : THIS IS AN IR F1010
W ITH ASSEM BLY
A
INTERNATIONAL
RECTIFIER
LOGO
PART NU M BER
LOT C ODE 9B1M
IR F1010
9246
9B
1M
D ATE COD E
(YYW W )
ASSEMBLY
LOT
CO DE
YY
=
YEAR
= W EEK
W W
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
IR EUROPEAN REGIONAL CENTRE: 439/445 Godstone Rd, Whyteleafe, Surrey CR3 OBL, UK Tel: ++ 44 (0)20 8645 8000
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Data and specifications subject to change without notice. 10/00
8
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