IRF1405ZL-7PPBF [INFINEON]
HEXFET㈢ Power MOSFET ( VDSS = 55V , RDS(on) = 4.9mヘ , ID = 120A ); HEXFET㈢功率MOSFET ( VDSS = 55V , RDS ( ON) = 4.9米ヘ, ID = 120A )型号: | IRF1405ZL-7PPBF |
厂家: | Infineon |
描述: | HEXFET㈢ Power MOSFET ( VDSS = 55V , RDS(on) = 4.9mヘ , ID = 120A ) |
文件: | 总12页 (文件大小:693K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
PD - 97206A
AUTOMOTIVE MOSFET
IRF1405ZS-7PPbF
IRF1405ZL-7PPbF
HEXFET® Power MOSFET
Features
l
l
l
l
l
l
Advanced Process Technology
D
VDSS = 55V
UltraLowOn-Resistance
175°COperatingTemperature
Fast Switching
Repetitive Avalanche Allowed up to Tjmax
Lead-Free
RDS(on) = 4.9mΩ
G
S
ID = 120A
S (Pin 2, 3, 5, 6, 7)
G (Pin 1)
Description
SpecificallydesignedforAutomotiveapplications,
this HEXFET® Power MOSFET utilizes the latest
processing techniques to achieve extremely low
on-resistancepersiliconarea. Additionalfeatures
of this design are a 175°C junction operating
temperature, fast switching speed and improved
repetitiveavalancherating. Thesefeaturescom-
bine to make this design an extremely efficient
andreliabledeviceforuseinAutomotiveapplica-
tions and a wide variety of other applications.
D2Pak7Pin
TO-263CA 7 Pin
Absolute Maximum Ratings
Parameter
Max.
150
100
120
590
230
Units
A
I
I
I
I
@ TC = 25°C
@ TC = 100°C
@ TC = 25°C
Continuous Drain Current, VGS @ 10V (Silicon Limited)
D
D
D
Continuous Drain Current, VGS @ 10V (See Fig. 9)
(Package Limited)
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
DM
P
@TC = 25°C
W
Maximum Power Dissipation
Linear Derating Factor
D
1.5
± 20
W/°C
V
V
Gate-to-Source Voltage
GS
EAS
250
810
mJ
Single Pulse Avalanche Energy (Thermally Limited)
Single Pulse Avalanche Energy Tested Value
Avalanche Current
EAS (tested)
IAR
See Fig.12a,12b,15,16
A
EAR
mJ
°C
Repetitive Avalanche Energy
T
J
-55 to + 175
Operating Junction and
T
Storage Temperature Range
STG
Soldering Temperature, for 10 seconds
Mounting torque, 6-32 or M3 screw
300 (1.6mm from case )
10 lbf•in (1.1N•m)
Thermal Resistance
Parameter
Typ.
–––
Max.
0.65
–––
62
Units
°C/W
RθJC
Junction-to-Case
RθCS
RθJA
RθJA
0.50
–––
Case-to-Sink, Flat, Greased Surface
Junction-to-Ambient
–––
40
Junction-to-Ambient (PCB Mount, steady state)
HEXFET® is a registered trademark of International Rectifier.
www.irf.com
1
12/07/06
IRF1405ZS/L-7PPbF
Static @ TJ = 25°C (unless otherwise specified)
Parameter
Drain-to-Source Breakdown Voltage
Min. Typ. Max. Units
55 ––– –––
Conditions
VGS = 0V, ID = 250µA
V(BR)DSS
∆Β
V
∆
V
DSS/ TJ
Breakdown Voltage Temp. Coefficient ––– 0.054 ––– V/°C Reference to 25°C, ID = 1mA
R
DS(on) SMD
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
–––
2.0
V
GS = 10V, ID = 88A
3.7
–––
–––
–––
–––
–––
–––
150
37
4.9
4.0
mΩ
V
VGS(th)
VDS = VGS, ID = 150µA
gfs
IDSS
150
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
20
S
VDS = 25V, ID = 88A
Forward Transconductance
Drain-to-Source Leakage Current
µA
nA
V
V
V
V
DS = 55V, VGS = 0V
DS = 55V, VGS = 0V, TJ = 125°C
GS = 20V
250
200
-200
230
–––
–––
–––
–––
–––
–––
–––
IGSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
GS = -20V
Qg
Qgs
Qgd
td(on)
tr
nC ID = 88A
DS = 44V
VGS = 10V
DD = 28V
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
V
64
16
ns
V
Rise Time
140
170
130
4.5
ID = 88A
td(off)
tf
Turn-Off Delay Time
RG = 5.0Ω
VGS = 10V
Fall Time
LD
D
S
Internal Drain Inductance
nH Between lead,
6mm (0.25in.)
from package
G
LS
Internal Source Inductance
–––
7.5
–––
and center of die contact
VGS = 0V
Ciss
Input Capacitance
––– 5360 –––
––– 1310 –––
pF
Coss
Output Capacitance
VDS = 25V
Crss
Reverse Transfer Capacitance
Output Capacitance
–––
––– 6080 –––
––– 920 –––
––– 1700 –––
340
–––
ƒ = 1.0MHz, See Fig. 5
Coss
VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
VGS = 0V, VDS = 44V, ƒ = 1.0MHz
VGS = 0V, VDS = 0V to 44V
Coss
Output Capacitance
Coss eff.
Effective Output Capacitance
Diode Characteristics
Parameter
Min. Typ. Max. Units
Conditions
D
IS
Continuous Source Current
–––
–––
150
MOSFET symbol
(Body Diode)
Pulsed Source Current
A
showing the
integral reverse
G
ISM
–––
–––
590
S
(Body Diode)
p-n junction diode.
VSD
T = 25°C, I = 88A, V = 0V
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
–––
–––
1.3
V
J
S
GS
trr
Qrr
T = 25°C, I = 88A, VDD = 28V
–––
–––
63
160
95
240
ns
nC
J
F
di/dt = 100A/µs
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. (See fig. 11).
Limited by TJmax, starting TJ = 25°C,
L=0.064mH, RG = 25Ω, IAS = 88A, VGS =10V.
Part not recommended for use above this value.
Pulse width ≤ 1.0ms; duty cycle ≤ 2%.
ꢀ Limited by TJmax , see Fig.12a, 12b, 15, 16 for typical repetitive
avalanche performance.
This value determined from sample failure population. 100%
tested to this value in production.
This is applied to D2Pak, when mounted on 1" square PCB
( FR-4 or G-10 Material ). For recommended footprint and
soldering techniques refer to application note #AN-994.
Coss eff. is a fixed capacitance that gives the same
charging time as Coss while VDS is rising from 0 to 80%
R is measured at TJ of approximately 90°C.
θ
VDSS
.
Solder mounted on IMS substrate.
2
www.irf.com
IRF1405ZS/L-7PPbF
1000
100
10
1000
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
TOP
TOP
100
10
1
BOTTOM
BOTTOM
4.5V
4.5V
60µs PULSE WIDTH
≤
60µs PULSE WIDTH
≤
Tj = 175°C
Tj = 25°C
1
0.1
1
10
100
1000
0.1
1
10
100
1000
V
, Drain-to-Source Voltage (V)
DS
V
, Drain-to-Source Voltage (V)
DS
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000
150
125
T
= 25°C
J
100
10
1
100
75
50
25
0
T
= 175°C
J
T
= 175°C
J
T
= 25°C
J
V
= 10V
DS
300µs PULSE WIDTH
V
= 25V
DS
≤
60µs PULSE WIDTH
0.1
0
2
4
6
8
10 12
0
25 50 75 100 125 150 175 200
I ,Drain-to-Source Current (A)
D
V
, Gate-to-Source Voltage (V)
GS
Fig 3. Typical Transfer Characteristics
Fig 4. Typical Forward Transconductance
vs. Drain Current
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3
IRF1405ZS/L-7PPbF
100000
12.0
10.0
8.0
V
= 0V,
= C
f = 1 MHZ
GS
I = 88A
D
C
C
C
+ C , C
SHORTED
ds
iss
gs
gd
V
V
= 44V
= 28V
= C
DS
DS
rss
oss
gd
= C + C
ds
gd
10000
1000
100
C
iss
6.0
C
oss
C
4.0
rss
2.0
0.0
1
10
, Drain-to-Source Voltage (V)
100
0
50
100
150
200
V
Q
Total Gate Charge (nC)
DS
G
Fig 6. Typical Gate Charge vs.
Fig 5. Typical Capacitance vs.
Gate-to-SourceVoltage
Drain-to-SourceVoltage
10000
1000
100
10
1000
100
10
OPERATION IN THIS AREA
LIMITED BY R
(on)
DS
T
= 175°C
100µsec
1msec
J
T
= 25°C
J
DC
1
10msec
100
Tc = 25°C
Tj = 175°C
Single Pulse
0.1
V
= 0V
GS
0.01
1
1
10
1000
0.0
0.5
1.0
1.5
2.0
2.5
V
, Drain-to-Source Voltage (V)
V
, Source-to-Drain Voltage (V)
DS
SD
Fig 8. Maximum Safe Operating Area
Fig 7. Typical Source-Drain Diode
Forward Voltage
4
www.irf.com
IRF1405ZS/L-7PPbF
150
125
100
75
2.5
I
= 88A
D
V
= 10V
GS
2.0
1.5
1.0
0.5
50
25
0
25
50
75
100
125
150
175
-60 -40 -20
T
0
20 40 60 80 100 120 140 160 180
T
, Case Temperature (°C)
C
, Junction Temperature (°C)
J
Fig 10. Normalized On-Resistance
Fig 9. Maximum Drain Current vs.
vs.Temperature
CaseTemperature
1
D = 0.50
0.20
0.1
0.10
0.05
R1
R1
R2
R2
R3
R3
Ri (°C/W) τi (sec)
0.02
0.01
τ
J τJ
τ
τ
Cτ
0.1707
0.1923
0.2885
0.000235
0.000791
0.008193
0.01
0.001
τ
1τ1
τ
2 τ2
3τ3
Ci= τi/Ri
SINGLE PULSE
( THERMAL RESPONSE )
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.0001
1E-006
1E-005
0.0001
0.001
0.01
0.1
1
t
, Rectangular Pulse Duration (sec)
1
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRF1405ZS/L-7PPbF
15V
1000
800
600
400
200
0
I
D
TOP
14A
23A
DRIVER
+
L
V
DS
BOTTOM 88A
D.U.T
AS
R
G
V
DD
-
I
A
V
20V
GS
Ω
0.01
t
p
Fig 12a. Unclamped Inductive Test Circuit
V
(BR)DSS
t
p
25
50
75
100
125
150
175
Starting T , Junction Temperature (°C)
J
I
AS
Fig 12c. Maximum Avalanche Energy
Fig 12b. Unclamped Inductive Waveforms
vs. Drain Current
Q
G
10 V
Q
Q
GD
GS
4.5
V
G
4.0
3.5
3.0
2.5
2.0
1.5
1.0
Charge
Fig 13a. Basic Gate Charge Waveform
I
I
I
I
= 150µA
= 250µA
= 1.0mA
= 1.0A
D
D
D
D
Current Regulator
Same Type as D.U.T.
50KΩ
.2µF
12V
.3µF
+
V
DS
D.U.T.
-
-75 -50 -25
0
25 50 75 100 125 150 175 200
, Temperature ( °C )
V
GS
3mA
T
J
I
I
D
G
Current Sampling Resistors
Fig 14. Threshold Voltage vs. Temperature
Fig 13b. Gate Charge Test Circuit
6
www.irf.com
IRF1405ZS/L-7PPbF
1000
100
10
Duty Cycle = Single Pulse
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming ∆Tj = 150°C and
Tstart =25°C (Single Pulse)
0.01
0.05
0.10
Allowed avalanche Current vs avalanche
1
pulsewidth, tav, assuming ∆Τj = 25°C and
Tstart = 150°C.
0.1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 15. Typical Avalanche Current vs.Pulsewidth
Notes on Repetitive Avalanche Curves , Figures 15, 16:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a
temperature far in excess of Tjmax. This is validated for
every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is
not exceeded.
3. Equation below based on circuit and waveforms shown in
Figures 12a, 12b.
300
250
200
150
100
50
TOP
BOTTOM 1% Duty Cycle
= 88A
Single Pulse
I
D
4. PD (ave) = Average power dissipation per single
avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for
voltage increase during avalanche).
6. Iav = Allowable avalanche current.
7. ∆T = Allowable rise in junction temperature, not to exceed
Tjmax (assumed as 25°C in Figure 15, 16).
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see figure 11)
0
25
50
75
100
125
150
175
Starting T , Junction Temperature (°C)
J
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
Iav = 2DT/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav
Fig 16. Maximum Avalanche Energy
vs.Temperature
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7
IRF1405ZS/L-7PPbF
Driver Gate Drive
P.W.
P.W.
Period
Period
D =
D.U.T
+
*
=10V
V
GS
CircuitLayoutConsiderations
• LowStrayInductance
• Ground Plane
• LowLeakageInductance
Current Transformer
-
D.U.T. I Waveform
SD
+
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
-
+
-
D.U.T. V Waveform
DS
Diode Recovery
dv/dt
V
DD
VDD
Re-Applied
Voltage
• dv/dtcontrolledbyRG
RG
+
-
Body Diode
Forward Drop
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
Inductor Curent
I
SD
Ripple ≤ 5%
* VGS = 5V for Logic Level Devices
Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
RD
VDS
VGS
D.U.T.
RG
+VDD
-
10V
PulseWidth ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 18a. Switching Time Test Circuit
V
DS
90%
10%
V
GS
t
t
r
t
t
f
d(on)
d(off)
Fig 18b. Switching Time Waveforms
8
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IRF1405ZS/L-7PPbF
D2Pak - 7 Pin Package Outline
Dimensions are shown in millimeters (inches)
www.irf.com
9
IRF1405ZS/L-7PPbF
D2Pak - 7 Pin Part Marking Information
D2Pak - 7 Pin Tape and Reel
10
www.irf.com
IRF1405ZS/L-7PPbF
TO-263CA 7 Pin Long Leads Package Outline
Dimensions are shown in millimeters (inches)
Data and specifications subject to change without notice.
This product has been designed and qualified for the Automotive [Q101] market.
Qualification Standards can be found on IRs Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 12/06
www.irf.com
11
Note: For the most current drawings please refer to the IR website at:
http://www.irf.com/package/
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