IRF2907ZS-7PPBF_技术文档

PD - 97031

IRF2907ZS-7PPbF

Features

HEXFET^®Power MOSFET

l

Advanced Process Technology

UltraLowOn-Resistance

175°COperatingTemperature

Fast Switching

D

V_DSS= 75V

Repetitive Avalanche Allowed up to Tjmax

R_DS(on)= 3.8mΩ

G

S

Description

I_D= 160A

S (Pin 2, 3, 5, 6, 7)

G (Pin 1)

Specificallydesignedforhighcurrent,highreliabil-

ity applications, this HEXFET^®Power MOSFET

utilizes the latest processing techniques and ad-

vancedpackagingtechnologytoachieveextremely

lowon-resistanceandworld-classcurrentratings.

Additional features of this design are a 175°C

junctionoperatingtemperature,fastswitchingspeed

and improved repetitive avalanche rating . These

featurescombinetomakethisdesignanextremely

efficient and reliable device for use in Server &

TelecomOR'ing,AutomotiveandlowvoltageMotor

Drive Applications.

Absolute Maximum Ratings

Parameter

Max.

180

120

160

700

300

Units

A

I

@ T_C= 25°C

@ T_C= 100°C

@ T_C= 25°C

Continuous Drain Current, V_GS@ 10V (Silicon Limited)

D

Continuous Drain Current, V_GS@ 10V (See Fig. 9)

(Package Limited)

Continuous Drain Current, V_GS@ 10V

Pulsed Drain Current

DM

P

@T_C= 25°C

W

Maximum Power Dissipation

Linear Derating Factor

D

2.0

± 20

W/°C

V

Gate-to-Source Voltage

GS

E_AS

160

410

mJ

Single Pulse Avalanche Energy (Thermally Limited)

Single Pulse Avalanche Energy Tested Value

Avalanche Current

E

_AS(tested)

I_AR

E_AR

See Fig.12a,12b,15,16

A

mJ

°C

Repetitive Avalanche Energy

T

J

-55 to + 175

Operating Junction and

T

Storage Temperature Range

STG

Soldering Temperature, for 10 seconds

Mounting torque, 6-32 or M3 screw

300 (1.6mm from case )

10 lbf•in (1.1N•m)

Thermal Resistance

Parameter

Typ.

–––

Max.

0.50

–––

62

Units

°C/W

R_θJC

Junction-to-Case

R_θCS

R_θJA

0.50

–––

Case-to-Sink, Flat, Greased Surface

Junction-to-Ambient

–––

40

Junction-to-Ambient (PCB Mount, steady state)

HEXFET^®is a registered trademark of International Rectifier.

www.irf.com

1

08/03/05

IRF2907ZS-7PPbF

Static @ T_J= 25°C (unless otherwise specified)

Parameter

Drain-to-Source Breakdown Voltage

Min. Typ. Max. Units

75 ––– –––

Conditions

V_GS= 0V, I_D= 250µA

V_(BR)DSS

∆Β

V

∆

V_DSS/ T_J

Breakdown Voltage Temp. Coefficient ––– 0.066 ––– V/°C Reference to 25°C, I_D= 1mA

R

_DS(on)SMD

Static Drain-to-Source On-Resistance

Gate Threshold Voltage

–––

2.0

V

_GS= 10V, I_D= 110A

_DS= V_GS, I_D= 250µA

3.0

–––

170

55

3.8

4.0

mΩ

V

V_GS(th)

V

gfs

I_DSS

94

–––

20

S

V_DS= 25V, I_D= 110A

Forward Transconductance

Drain-to-Source Leakage Current

–––

µA

nA

V

_DS= 75V, V_GS= 0V

_DS= 75V, V_GS= 0V, T_J= 125°C

_GS= 20V

250

200

-200

260

–––

I_GSS

Gate-to-Source Forward Leakage

Gate-to-Source Reverse Leakage

Total Gate Charge

_GS= -20V

Q_g

Q_gs

Q_gd

t_d(on)

t_r

nC I_D= 110A

Gate-to-Source Charge

Gate-to-Drain ("Miller") Charge

Turn-On Delay Time

V

_DS= 60V

_GS= 10V

66

V

21

ns V_DD= 38V

I_D= 110A

Rise Time

90

t_d(off)

t_f

Turn-Off Delay Time

92

R_G= 2.6Ω

V_GS= 10V

Fall Time

44

D

S

L_D

Internal Drain Inductance

4.5

nH Between lead,

6mm (0.25in.)

from package

G

L_S

Internal Source Inductance

–––

7.5

–––

and center of die contact

V_GS= 0V

C_iss

Input Capacitance

––– 7580 –––

pF

C_oss

Output Capacitance

–––

970

540

–––

V_DS= 25V

C_rss

Reverse Transfer Capacitance

Output Capacitance

ƒ = 1.0MHz, See Fig. 5

C_oss

––– 3750 –––

––– 650 –––

––– 1110 –––

V_GS= 0V, V_DS= 1.0V, ƒ = 1.0MHz

V_GS= 0V, V_DS= 60V, ƒ = 1.0MHz

V_GS= 0V, V_DS= 0V to 60V

C_oss

Output Capacitance

C_osseff.

Effective Output Capacitance

Diode Characteristics

Parameter

Min. Typ. Max. Units

Conditions

D

I_S

Continuous Source Current

–––

160

MOSFET symbol

(Body Diode)

Pulsed Source Current

A

showing the

integral reverse

G

I_SM

–––

700

S

(Body Diode)

p-n junction diode.

V_SD

T = 25°C, I = 110A, V = 0V

Diode Forward Voltage

Reverse Recovery Time

Reverse Recovery Charge

–––

1.3

V

J

S

GS

t_rr

Q_rr

T = 25°C, I = 110A, V_DD= 38V

–––

35

40

53

60

ns

nC

J

F

di/dt = 100A/µs

Notes:

Repetitive rating; pulse width limited by

max. junction temperature. (See fig. 11).

Limited by T_Jmax, starting T_J= 25°C,

L=0.026mH, R_G= 25Ω, I_AS= 110A, V_GS=10V.

Part not recommended for use above this value.

Pulse width ≤ 1.0ms; duty cycle ≤ 2%.

ꢀ Limited by T_Jmax, see Fig.12a, 12b, 15, 16 for typical repetitive

avalanche performance.

This value determined from sample failure population. 100%

tested to this value in production.

This is applied to D²Pak, when mounted on 1" square PCB

( FR-4 or G-10 Material ). For recommended footprint and

soldering techniques refer to application note #AN-994.

C_osseff. is a fixed capacitance that gives the same

charging time as C_osswhile V_DSis rising from 0 to 80%

R is measured at T_Jof approximately 90°C.

θ

V_DSS

.

2

www.irf.com

IRF2907ZS-7PPbF

1000

100

10

1000

100

10

VGS

15V

10V

8.0V

7.0V

6.0V

5.5V

5.0V

4.5V

VGS

15V

10V

8.0V

7.0V

6.0V

5.5V

5.0V

4.5V

TOP

BOTTOM

4.5V

60µs PULSE WIDTH

≤

60µs PULSE WIDTH

≤

Tj = 175°C

Tj = 25°C

1

0.1

1

10

100

1000

0.1

1

10

100

1000

V

, Drain-to-Source Voltage (V)

V

, Drain-to-Source Voltage (V)

DS

Fig 1. Typical Output Characteristics

Fig 2. Typical Output Characteristics

200

150

100

50

1000

T

= 25°C

J

100

10

1

T

= 175°C

J

T

= 25°C

J

T

= 175°C

J

V

= 10V

DS

380µs PULSE WIDTH

V

= 25V

DS

≤

60µs PULSE WIDTH

0

0.1

0

25

50

75

100

125

150

1

2

3

4

5

6

7

8

I ,Drain-to-Source Current (A)

D

V

, Gate-to-Source Voltage (V)

GS

Fig 3. Typical Transfer Characteristics

Fig 4. Typical Forward Transconductance

vs. Drain Current

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3

IRF2907ZS-7PPbF

100000

12.0

10.0

8.0

V

= 0V,

= C

f = 1 MHZ

GS

I = 110A

D

C

+ C , C

SHORTED

V

= 60V

= 38V

= 15V

iss

gs

gd

ds

DS

= C

rss

oss

gd

= C + C

ds

gd

10000

1000

100

C

iss

6.0

C

oss

4.0

C

rss

2.0

0.0

1

10

, Drain-to-Source Voltage (V)

100

0

50

100

150

200

V

Q

G

Total Gate Charge (nC)

DS

Fig 6. Typical Gate Charge vs.

Fig 5. Typical Capacitance vs.

Gate-to-SourceVoltage

Drain-to-SourceVoltage

10000

1000

100

10

1000

100

10

OPERATION IN THIS AREA

LIMITED BY R

(on)

DS

100µsec

T

= 175°C

J

1msec

T

= 25°C

J

10msec

DC

1

Tc = 25°C

Tj = 175°C

Single Pulse

V

= 0V

1.2

GS

0.1

0

1

10

100

1000

0.0

0.2

V

0.4

0.6

0.8

1.0

1.4

V

, Drain-to-Source Voltage (V)

, Source-to-Drain Voltage (V)

DS

SD

Fig 8. Maximum Safe Operating Area

Fig 7. Typical Source-Drain Diode

Forward Voltage

4

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IRF2907ZS-7PPbF

200

160

120

80

3.0

2.5

2.0

1.5

1.0

0.5

I

= 180A

= 10V

D

Limited By Package

V

GS

40

0

-60 -40 -20 0 20 40 60 80 100120140160180

, Junction Temperature (°C)

25

50

75

100

125

150

175

T

, Case Temperature (°C)

J

C

Fig 10. Normalized On-Resistance

Fig 9. Maximum Drain Current vs.

vs.Temperature

CaseTemperature

1

D = 0.50

0.20

0.10

0.05

0.1

R₁

R₂

R₃

0.02

0.01

Ri (°C/W) τi (sec)

0.01

0.001

τ

^Jτ_J

τ

^Cτ

0.1072

0.2787

0.1143

0.000896

0.009380

0.121118

τ

¹τ₁

τ

²τ₂

³τ₃

SINGLE PULSE

( THERMAL RESPONSE )

Ci= τi/Ri

/

Notes:

1. Duty Factor D = t1/t2

2. Peak Tj = P dm x Zthjc + Tc

0.0001

1E-006

1E-005

0.0001

0.001

0.01

0.1

t

, Rectangular Pulse Duration (sec)

1

Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case

www.irf.com

5

IRF2907ZS-7PPbF

15V

700

600

500

400

300

200

100

0

DRIVER

+

L

V

DS

I

D

TOP

24A

34A

BOTTOM 110A

D.U.T

AS

R

G

V

DD

-

I

A

V

20V

GS

Ω

0.01

t

p

Fig 12a. Unclamped Inductive Test Circuit

V

(BR)DSS

t

p

25

50

75

100

125

150

175

Starting T , Junction Temperature (°C)

J

I

AS

Fig 12c. Maximum Avalanche Energy

Fig 12b. Unclamped Inductive Waveforms

vs. Drain Current

Q

G

10 V

Q

GD

GS

V

G

4.5

4.0

3.5

3.0

2.5

2.0

1.5

1.0

Charge

Fig 13a. Basic Gate Charge Waveform

Current Regulator

Same Type as D.U.T.

I

= 250µA

= 1.0mA

= 1.0A

50KΩ

D

.2µF

12V

.3µF

+

V

DS

D.U.T.

-

V

GS

3mA

-75 -50 -25

0

T

25 50 75 100 125 150 175 200

, Temperature ( °C )

I

D

G

Current Sampling Resistors

J

Fig 14. Threshold Voltage vs. Temperature

Fig 13b. Gate Charge Test Circuit

6

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IRF2907ZS-7PPbF

1000

100

10

Duty Cycle = Single Pulse

Allowed avalanche Current vs

avalanche pulsewidth, tav

assuming ∆ Tj = 25°C due to

avalanche losses

0.01

0.05

0.10

1

1.0E-06

1.0E-05

1.0E-04

1.0E-03

1.0E-02

1.0E-01

tav (sec)

Fig 15. Typical Avalanche Current vs.Pulsewidth

Notes on Repetitive Avalanche Curves , Figures 15, 16:

(For further info, see AN-1005 at www.irf.com)

1. Avalanche failures assumption:

Purely a thermal phenomenon and failure occurs at a

temperature far in excess of T_jmax. This is validated for

every part type.

2. Safe operation in Avalanche is allowed as long asT_jmaxis

not exceeded.

3. Equation below based on circuit and waveforms shown in

Figures 12a, 12b.

200

150

100

50

TOP

BOTTOM 1% Duty Cycle

= 110A

Single Pulse

I

D

4. P_{D (ave)}= Average power dissipation per single

avalanche pulse.

5. BV = Rated breakdown voltage (1.3 factor accounts for

voltage increase during avalanche).

6. I_av= Allowable avalanche current.

7. ∆T = Allowable rise in junction temperature, not to exceed

T_jmax(assumed as 25°C in Figure 15, 16).

t_{av =}Average time in avalanche.

D = Duty cycle in avalanche = t_av·f

Z_thJC(D, t_av) = Transient thermal resistance, see figure 11)

0

25

50

75

100

125

150

175

Starting T , Junction Temperature (°C)

P_{D (ave)}= 1/2 ( 1.3·BV·I_av) = DT/ Z_thJC

I_av= 2DT/ [1.3·BV·Z_th]

J

E_{AS (AR)}= P_{D (ave)}·t_av

Fig 16. Maximum Avalanche Energy

vs.Temperature

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7

IRF2907ZS-7PPbF

Driver Gate Drive

P.W.

Period

D =

D.U.T

+

*

=10V

V

GS

CircuitLayoutConsiderations

• LowStrayInductance

• Ground Plane

• LowLeakageInductance

Current Transformer

-

D.U.T. I Waveform

SD

+

-

Reverse

Recovery

Current

Body Diode Forward

Current

di/dt

-

+

D.U.T. V Waveform

DS

Diode Recovery

dv/dt

V

DD

V_DD

Re-Applied

Voltage

• dv/dtcontrolledbyR_G

R_G

+

-

Body Diode

Forward Drop

• Driver same type as D.U.T.

• I_SDcontrolled by Duty Factor "D"

• D.U.T. - Device Under Test

Inductor Curent

I

SD

Ripple ≤ 5%

* V_GS= 5V for Logic Level Devices

Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel

HEXFET^®Power MOSFETs

R_D

V_DS

V_GS

D.U.T.

R_G

⁺V_DD

-

10V

PulseWidth ≤ 1 µs

Duty Factor ≤ 0.1 %

Fig 18a. Switching Time Test Circuit

V

DS

90%

10%

V

GS

t

r

t

f

d(on)

d(off)

Fig 18b. Switching Time Waveforms

8

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IRF2907ZS-7PPbF

D²Pak - 7 Pin Package Outline

Dimensions are shown in millimeters (inches)

D²Pak - 7 Pin Part Marking Information

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9

IRF2907ZS-7PPbF

D²Pak - 7 Pin Tape and Reel

Data and specifications subject to change without notice.

This product has been designed and qualified for the Automotive [Q101] market.

Qualification Standards can be found on IRs Web site.

IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105

TAC Fax: (310) 252-7903

Visit us at www.irf.com for sales contact information. 08/05

10

www.irf.com


型号：	IRF2907ZS-7PPBF
厂家：	Infineon
描述：	IRF2907ZS-7PPBF 晶体晶体管开关脉冲局域网
文件：	总10页 (文件大小：664K)
中文：	中文翻译
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IRF2907ZS-7PPBF [INFINEON]

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