IRF3717TRPBF [INFINEON]
Power Field-Effect Transistor, 20A I(D), 20V, 0.0044ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, MS-012AA, SOP-8;型号: | IRF3717TRPBF |
厂家: | Infineon |
描述: | Power Field-Effect Transistor, 20A I(D), 20V, 0.0044ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, MS-012AA, SOP-8 开关 脉冲 光电二极管 晶体管 |
文件: | 总10页 (文件大小:193K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
PD - 95719
IRF3717PbF
HEXFET® Power MOSFET
Applications
l Synchronous MOSFET for Notebook
Processor Power
VDSS
RDS(on) max
ID
4.4m @VGS = 10V
20V
20A
l Synchronous Rectifier MOSFET for
Isolated DC-DC Converters in
Networking Systems
A
A
D
1
2
3
4
8
S
S
S
G
l Lead-Free
7
D
6
D
Benefits
l Ultra-Low Gate Impedance
l Very Low RDS(on)
5
D
SO-8
Top View
l Fully Characterized Avalanche Voltage
and Current
Absolute Maximum Ratings
Parameter
Max.
20
Units
VDS
Drain-to-Source Voltage
V
V
Gate-to-Source Voltage
± 20
20
GS
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
I
I
I
@ TA = 25°C
D
D
@ TA = 70°C
16
A
160
2.5
1.6
DM
P
P
@TA = 25°C
@TA = 70°C
Power Dissipation
Power Dissipation
W
D
D
Linear Derating Factor
Operating Junction and
0.02
W/°C
°C
T
-55 to + 150
J
T
Storage Temperature Range
STG
Thermal Resistance
Parameter
Junction-to-Drain Lead
Junction-to-Ambient
Typ.
–––
Max.
20
Units
Rθ
Rθ
°C/W
JL
–––
50
JA
Notes through are on page 10
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1
8/10/04
IRF3717PbF
Static @ TJ = 25°C (unless otherwise specified)
Parameter
Min. Typ. Max. Units
20 ––– –––
––– 0.014 –––
Conditions
VGS = 0V, ID = 250µA
BVDSS
∆Β
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
V
∆
VDSS/ TJ
V/°C Reference to 25°C, ID = 1mA
RDS(on)
–––
–––
1.55
–––
–––
–––
–––
–––
57
3.7
4.8
4.4
5.7
V
GS = 10V, ID = 20A
VGS = 4.5V, ID = 16A
DS = VGS, ID = 250µA
mΩ
VGS(th)
Gate Threshold Voltage
2.0
2.45
V
V
∆
∆
VGS(th)/ TJ
Gate Threshold Voltage Coefficient
Drain-to-Source Leakage Current
-5.4
–––
–––
–––
––– mV/°C
IDSS
1.0
150
100
µA VDS = 16V, VGS = 0V
V
DS = 16V, VGS = 0V, TJ = 125°C
GS = 20V
IGSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Forward Transconductance
Total Gate Charge
nA
S
V
––– -100
VGS = -20V
gfs
Qg
–––
22
–––
33
VDS = 10V, ID = 16A
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Qgs1
Pre-Vth Gate-to-Source Charge
Post-Vth Gate-to-Source Charge
Gate-to-Drain Charge
6.8
2.2
7.3
5.7
9.5
12
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
V
DS = 10V
nC VGS = 4.5V
D = 16A
Qgs2
Qgd
I
Qgodr
Gate Charge Overdrive
See Fig. 16
Qsw
Switch Charge (Qgs2 + Qgd)
Qoss
td(on)
tr
Output Charge
nC VDS = 10V, VGS = 0V
Turn-On Delay Time
Rise Time
12
VDD = 10V, VGS = 4.5V
14
ID = 16A
td(off)
tf
Turn-Off Delay Time
Fall Time
15
ns Clamped Inductive Load
6.0
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
––– 2890 –––
VGS = 0V
pF VDS = 10V
ƒ = 1.0MHz
–––
–––
930
430
–––
–––
Avalanche Characteristics
Parameter
Typ.
–––
–––
Max.
32
Units
mJ
Single Pulse Avalanche Energy
EAS
IAR
Avalanche Current
16
A
Diode Characteristics
Parameter
Min. Typ. Max. Units
Conditions
MOSFET symbol
D
IS
Continuous Source Current
–––
–––
20
(Body Diode)
Pulsed Source Current
A
showing the
integral reverse
G
ISM
–––
–––
160
S
(Body Diode)
p-n junction diode.
VSD
trr
Diode Forward Voltage
–––
–––
–––
–––
22
1.0
32
19
V
T = 25°C, I = 16A, V = 0V
J S GS
Reverse Recovery Time
Reverse Recovery Charge
ns T = 25°C, I = 16A, VDD = 10V
J F
Qrr
di/dt = 100A/µs
13
nC
2
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IRF3717PbF
1000
100
10
1000
100
10
VGS
10V
VGS
10V
TOP
TOP
4.5V
3.8V
3.5V
3.3V
3.0V
2.8V
2.5V
4.5V
3.8V
3.5V
3.3V
3.0V
2.8V
2.5V
BOTTOM
BOTTOM
1
20µs PULSE WIDTH
Tj = 25°C
2.5V
1
20µs PULSE WIDTH
Tj = 150°C
2.5V
1
0.1
1
0.1
10
100
0.1
10
100
V
, Drain-to-Source Voltage (V)
DS
V
, Drain-to-Source Voltage (V)
DS
Fig 2. Typical Output Characteristics
Fig 1. Typical Output Characteristics
1.5
1.0
0.5
1000
I
= 20A
D
V
= 10V
GS
100
10
1
T
= 150°C
J
T
= 25°C
J
V
= 10V
DS
20µs PULSE WIDTH
0.1
-60 -40 -20
0
20 40 60 80 100 120 140 160
1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
T
J
, Junction Temperature (°C)
V
, Gate-to-Source Voltage (V)
GS
Fig 4. Normalized On-Resistance
Fig 3. Typical Transfer Characteristics
vs.Temperature
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3
IRF3717PbF
100000
6.0
5.0
4.0
3.0
2.0
1.0
0.0
V
= 0V,
= C
f = 1 MHZ
GS
I =16A
D
C
C
C
+ C , C
SHORTED
iss
gs
gd
ds
= C
V
V
= 16V
= 10V
rss
oss
gd
= C + C
DS
DS
ds
gd
10000
1000
100
C
C
iss
oss
C
rss
1
10
100
0
5
10
15
20
25
30
V
, Drain-to-Source Voltage (V)
Q
Total Gate Charge (nC)
DS
G
Fig 6. Typical Gate Charge Vs.
Fig 5. Typical Capacitance vs.
Gate-to-Source Voltage
Drain-to-SourceVoltage
1000.00
100.00
10.00
1.00
1000
100
10
OPERATION IN THIS AREA
LIMITED BY R
(on)
DS
T
= 150°C
J
100µsec
T
= 25°C
J
1msec
T
= 25°C
A
Tj = 150°C
Single Pulse
10msec
V
= 0V
GS
0.10
1
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
0
1
10
100
V
, Source-to-Drain Voltage (V)
V
, Drain-to-Source Voltage (V)
SD
DS
Fig 8. Maximum Safe Operating Area
Fig 7. Typical Source-Drain Diode
Forward Voltage
4
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IRF3717PbF
20
15
10
5
2.5
2.0
1.5
1.0
I
= 250µA
D
0
-75 -50 -25
0
25
, Temperature ( °C )
J
50
75 100 125 150
25
50
75
100
125
150
T
T
, Ambient Temperature (°C)
A
Fig 9. Maximum Drain Current vs.
Fig 10. Threshold Voltage vs. Temperature
AmbientTemperature
100
D = 0.50
10
1
0.20
0.10
0.05
R1
R1
R2
R2
R3
R3
R4
R4
Ri (°C/W) τi (sec)
0.02
0.01
1.4174
0.000277
0.103855
1.362000
39.60000
τ
τ
J τJ
τ
Cτ
11.3607
21.8639
15.3721
τ
1τ1
τ
τ
2 τ2
3τ3
4τ4
0.1
Ci= τi/Ri
SINGLE PULSE
P
DM
( THERMAL RESPONSE )
0.01
t
1
t
2
Notes:
1. Duty factor D =
2. Peak T
t
x
/ t
Z
1
2
=
P
+ T
J
DM
thJA
A
0.001
1E-006
1E-005
0.0001
0.001
0.01
0.1
1
10
100
t
, Rectangular Pulse Duration (sec)
1
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient
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5
IRF3717PbF
150
100
50
I
D
15V
TOP
6.5A
7.5A
BOTTOM 16A
DRIVER
+
L
V
DS
D.U.T
AS
R
G
V
DD
-
I
A
2
V0GS
Ω
0.01
t
p
Fig 12a. Unclamped Inductive Test Circuit
V
0
(BR)DSS
25
50
75
100
125
150
t
p
Starting T , Junction Temperature (°C)
J
Fig 12c. Maximum Avalanche Energy
vs. Drain Current
LD
VDS
I
AS
Fig 12b. Unclamped Inductive Waveforms
+
-
VDD
D.U.T
Current Regulator
VGS
Same Type as D.U.T.
Pulse Width < 1µs
Duty Factor < 0.1%
50KΩ
.2µF
12V
Fig 14a. Switching Time Test Circuit
VDS
.3µF
+
V
DS
D.U.T.
-
90%
V
GS
3mA
10%
VGS
I
I
D
G
Current Sampling Resistors
td(on)
td(off)
tr
tf
Fig 13. Gate Charge Test Circuit
Fig 14b. Switching Time Waveforms
6
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IRF3717PbF
Driver Gate Drive
P.W.
P.W.
D =
D.U.T
Period
Period
+
-
*
=10V
V
GS
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
D.U.T. I Waveform
SD
+
-
Reverse
Recovery
Current
Body Diode Forward
Current
-
+
di/dt
D.U.T. V Waveform
DS
Diode Recovery
dv/dt
V
DD
VDD
Re-Applied
Voltage
• dv/dt controlled by RG
RG
+
-
Body Diode
Forward Drop
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
Inductor Curent
I
SD
Ripple ≤ 5%
* VGS = 5V for Logic Level Devices
Fig 15. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
Id
Vds
Vgs
Vgs(th)
Qgs1
Qgs2
Qgd
Qgodr
Fig 16. Gate Charge Waveform
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7
IRF3717PbF
Power MOSFET Selection for Non-Isolated DC/DC Converters
Synchronous FET
Control FET
The power loss equation for Q2 is approximated
by;
Special attention has been given to the power losses
in the switching elements of the circuit - Q1 and Q2.
Power losses in the high side switch Q1, also called
the Control FET, are impacted by the Rds(on) of the
MOSFET, but these conduction losses are only about
one half of the total losses.
P = P
+ P + P*
loss
conduction
drive
output
P = Irms 2 × Rds(on)
loss ( )
Power losses in the control switch Q1 are given
by;
+ Q × V × f
(
)
g
g
⎛
⎜
Qoss
⎞
⎠
Ploss = Pconduction+ Pswitching+ Pdrive+ Poutput
+
×V × f + Q × V × f
(
)
in
rr
in
⎝ 2
This can be expanded and approximated by;
*dissipated primarily in Q1.
P
= I 2 × Rds(on )
(
)
loss
rms
For the synchronous MOSFET Q2, Rds(on) is an im-
portant characteristic; however, once again the im-
portance of gate charge must not be overlooked since
it impacts three critical areas. Under light load the
MOSFET must still be turned on and off by the con-
trol IC so the gate drive losses become much more
significant. Secondly, the output charge Qoss and re-
verse recovery charge Qrr both generate losses that
are transfered to Q1 and increase the dissipation in
that device. Thirdly, gate charge will impact the
MOSFETs’ susceptibility to Cdv/dt turn on.
⎛
⎛
Qgd
ig
⎞
Qgs2
ig
⎞
⎟
⎜
⎟
⎜
+ I ×
× V × f + I ×
× V × f
in
in
⎝
⎠
⎝
⎠
+ Q × V × f
(
)
g
g
⎛ Qoss
⎞
⎠
+
×V × f
in
⎝
2
This simplified loss equation includes the terms Qgs2
The drain of Q2 is connected to the switching node
of the converter and therefore sees transitions be-
tween ground and Vin. As Q1 turns on and off there is
a rate of change of drain voltage dV/dt which is ca-
pacitively coupled to the gate of Q2 and can induce
a voltage spike on the gate that is sufficient to turn
the MOSFET on, resulting in shoot-through current .
The ratio of Qgd/Qgs1 must be minimized to reduce the
potential for Cdv/dt turn on.
and Qoss which are new to Power MOSFET data sheets.
Qgs2 is a sub element of traditional gate-source
charge that is included in all MOSFET data sheets.
The importance of splitting this gate-source charge
into two sub elements, Qgs1 and Qgs2, can be seen from
Fig 16.
Qgs2 indicates the charge that must be supplied by
the gate driver between the time that the threshold
voltage has been reached and the time the drain cur-
rent rises to Idmax at which time the drain voltage be-
gins to change. Minimizing Qgs2 is a critical factor in
reducing switching losses in Q1.
Qoss is the charge that must be supplied to the out-
put capacitance of the MOSFET during every switch-
ing cycle. Figure A shows how Qoss is formed by the
parallel combination of the voltage dependant (non-
linear) capacitances Cds and Cdg when multiplied by
the power supply input buss voltage.
Figure A: Qoss Characteristic
8
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IRF3717PbF
SO-8 Package Outline
Dimensions are shown in millimeters (inches)
INCHES
MILLIMETERS
DIM
A
D
B
MIN
.0532
MAX
.0688
.0098
.020
MIN
1.35
0.10
0.33
0.19
4.80
3.80
MAX
1.75
0.25
0.51
0.25
5.00
4.00
5
A
E
A1 .0040
b
c
.013
8
1
7
2
6
3
5
.0075
.189
.0098
.1968
.1574
6
H
D
E
e
0.25 [.010]
A
.1497
4
.050 BASIC
1.27 BASIC
e 1 .025 BASIC
0.635 BASIC
H
K
L
y
.2284
.0099
.016
0°
.2440
.0196
.050
8°
5.80
0.25
0.40
0°
6.20
0.50
1.27
8°
e
6X
e1
K x 45°
A
C
y
0.10 [.004]
8X c
A1
B
8X L
8X b
0.25 [.010]
7
C
A
F OOT PRINT
8X 0.72 [.028]
NOT ES :
1. DIMENSIONING & TOLERANCING PER ASME Y14.5M-1994.
2. CONT ROLLING DIMENS ION: MILLIMET ER
3. DIMENS IONS ARE SHOWN IN MILLIMETERS [INCHES].
4. OUT L INE CONF OR MS T O JE DE C OU T L INE MS -012AA.
5
6
7
DIMENS ION DOES NOT INCLUDE MOLD PROT RUSIONS .
MOLD PROTRUSIONS NOT TO EXCEED 0.15 [.006].
6.46 [.255]
DIMENS ION DOES NOT INCLUDE MOLD PROT RUSIONS .
MOLD PROTRUSIONS NOT TO EXCEED 0.25 [.010].
DIMENSION IS THE LENGTH OF LEAD FOR SOLDERING TO
ASUBSTRATE.
3X 1.27 [.050]
8X 1.78 [.070]
SO-8 Part Marking
EXAMPLE: THIS IS AN IRF7101 (MOSFET)
DATE CODE (YWW)
P = DE S I GNAT E S L E AD-F R E E
PRODUCT (OPTIONAL)
Y= LAST DIGIT OF THE YEAR
XXXX
F7101
WW = WEEK
INTERNATIONAL
RECTIFIER
LOGO
A = ASSEMBLYSITE CODE
LOT CODE
PART NUMBER
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9
IRF3717PbF
SO-8 Tape and Reel
Dimensions are shown in millimeters (inches)
TERMINAL NUMBER 1
12.3 ( .484 )
11.7 ( .461 )
8.1 ( .318 )
7.9 ( .312 )
FEED DIRECTION
NOTES:
1. CONTROLLING DIMENSION : MILLIMETER.
2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS(INCHES).
3. OUTLINE CONFORMS TO EIA-481 & EIA-541.
330.00
(12.992)
MAX.
14.40 ( .566 )
12.40 ( .488 )
NOTES :
1. CONTROLLING DIMENSION : MILLIMETER.
2. OUTLINE CONFORMS TO EIA-481 & EIA-541.
Notes:
Repetitive rating; pulse width limited by max. junction temperature.
Starting TJ = 25°C, L = 0.26mH, RG = 25Ω, IAS = 16A.
Pulse width ≤ 400µs; duty cycle ≤ 2%.
When mounted on 1 inch square copper board.
Data and specifications subject to change without notice.
This product has been designed and qualified for the Consumer market.
Qualifications Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.08/04
10
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