IRF3805LPBF [INFINEON]

AUTOMOTIVE MOSFET; 汽车MOSFET


型号：	IRF3805LPBF
厂家：	Infineon
描述：	AUTOMOTIVE MOSFET 汽车MOSFET
文件：	总12页 (文件大小：418K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

PD - 97046

IRF3805PbF

IRF3805SPbF

IRF3805LPbF

AUTOMOTIVE MOSFET

Features

HEXFET^®Power MOSFET

Advanced Process Technology

Ultra Low On-Resistance

175°C Operating Temperature

Fast Switching

V_DSS= 55V

Repetitive Avalanche Allowed up to Tjmax

Lead-Free

R_DS(on)= 3.3mΩ

Description

I_D= 75A

Specifically designed for Automotive applications,

this HEXFET^®Power MOSFET utilizes the latest

processingtechniquestoachieveextremelylowon-

resistance per silicon area. Additional features of

thisdesign area175°Cjunctionoperatingtempera-

ture, fast switching speed and improved repetitive

avalanche rating . These features combine to make

thisdesignanextremelyefficientandreliabledevice

foruseinAutomotiveapplicationsandawidevariety

of other applications.

D²Pak

TO-262

IRF3805LPbF

TO-220AB

IRF3805PbF

IRF3805SPbF

Absolute Maximum Ratings

Parameter

Max.

210

Units

Continuous Drain Current, V_GS@ 10V (Silicon Limited)

@ T = 25°C

(Silicon Limited)

Continuous Drain Current, V_GS@ 10V

@ T = 100°C

150

Continuous Drain Current, V_GS@ 10V (Package limited)

Pulsed Drain Current

@ T = 25°C

890

300

@T = 25°C

Power Dissipation

Linear Derating Factor

Gate-to-Source Voltage

2.0

± 20

W/°C

Single Pulse Avalanche Energy

Single Pulse Avalanche Energy Tested Value

Avalanche Current

E_{AS (Thermally limited)}

_AS(Tested )

650

940

I_AR

See Fig.12a, 12b, 15, 16

Repetitive Avalanche Energy

Operating Junction and

E_AR

-55 to + 175

Storage Temperature Range

°C

STG

Soldering Temperature, for 10 seconds

Mounting Torque, 6-32 or M3 screw

300 (1.6mm from case )

10 lbf in (1.1N m)

Thermal Resistance

Parameter

Typ.

–––

Max.

0.5

Units

°C/W

Junction-to-Case

R_θJC

R_θCS

R_θJA

Case-to-Sink, Flat Greased Surface

Junction-to-Ambient

0.50

–––

Junction-to-Ambient (PCB Mount)

–––

www.irf.com

9/20/05

IRF3805/S/LPbF

Electrical Characteristics @ T_J= 25°C (unless otherwise specified)

Parameter

Drain-to-Source Breakdown Voltage

Min. Typ. Max. Units

55 ––– –––

Conditions

V_GS= 0V, I_D= 250µA

V_(BR)DSS

∆V_(BR)DSS/∆T_JBreakdown Voltage Temp. Coefficient ––– 0.051 ––– V/°C Reference to 25°C, I_D= 1mA

mΩ

R_DS(on)

V_GS(th)

gfs

Static Drain-to-Source On-Resistance

Gate Threshold Voltage

–––

2.0

2.6

–––

3.3

4.0

–––

_GS= 10V, I_D= 75A

V_DS= V_GS, I_D= 250µA

Forward Transconductance

_DS= 25V, I_D= 75A

_DS= 55V, V_GS= 0V

I_DSS

Drain-to-Source Leakage Current

–––

µA

250

200

V_DS= 55V, V_GS= 0V, T_J= 125°C

nA V_GS= 20V

_GS= -20V

I_D= 75A

_DS= 44V

I_GSS

Gate-to-Source Forward Leakage

Gate-to-Source Reverse Leakage

Total Gate Charge

––– -200

Q_g

Q_gs

Q_gd

t_d(on)

t_r

190

290

–––

Gate-to-Source Charge

Gate-to-Drain ("Miller") Charge

Turn-On Delay Time

V_GS= 10V

V_DD= 28V

I_D= 75A

150

Rise Time

t_d(off)

t_f

Turn-Off Delay Time

R_G= 2.6 Ω

Fall Time

V_GS= 10V

L_D

Internal Drain Inductance

4.5

Between lead,

nH 6mm (0.25in.)

from package

L_S

Internal Source Inductance

–––

7.5

–––

and center of die contact

V_GS= 0V

_DS= 25V

pF ƒ = 1.0MHz

V_GS= 0V, V_DS= 1.0V, ƒ = 1.0MHz

C_iss

C_oss

C_rss

C_oss

Input Capacitance

––– 7960 –––

––– 1260 –––

Output Capacitance

Reverse Transfer Capacitance

Output Capacitance

–––

––– 4400 –––

––– 980 –––

630

–––

Output Capacitance

_GS= 0V, V_DS= 44V, ƒ = 1.0MHz

_GS= 0V, V_DS= 0V to 44V

C_osseff.

Effective Output Capacitance

––– 1550 –––

Source-Drain Ratings and Characteristics

Parameter

Min. Typ. Max. Units

Conditions

Continuous Source Current

–––

MOSFET symbol

(Body Diode)

showing the

Pulsed Source Current

–––

890

integral reverse

(Body Diode)

p-n junction diode.

Diode Forward Voltage

Reverse Recovery Time

Reverse Recovery Charge

Forward Turn-On Time

–––

1.3

T = 25°C, I = 75A, V = 0V

J S GS

ns T = 25°C, I = 75A, V_DD= 28V

J F

di/dt = 100A/µs

Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)

www.irf.com

IRF3805/S/LPbF

1000

100

1000

100

VGS

15V

10V

8.0V

7.0V

6.0V

5.5V

5.0V

4.5V

VGS

15V

10V

8.0V

7.0V

6.0V

5.5V

5.0V

4.5V

TOP

BOTTOM

4.5V

≤ 60µs PULSE WIDTH

Tj = 25°C

Tj = 175°C

0.1

100

0.1

100

, Drain-to-Source Voltage (V)

Fig 1. Typical Output Characteristics

Fig 2. Typical Output Characteristics

1000.0

100.0

10.0

1.0

200

= 25°C

= 175°C

160

120

= 175°C

= 25°C

= 20V

≤ 60µs PULSE WIDTH

= 10V

380µs PULSE WIDTH

0.1

4.0

5.0

6.0

7.0

8.0

20 40 60 80 100 120 140 160 180

, Gate-to-Source Voltage (V)

Drain-to-Source Current (A)

Fig 3. Typical Transfer Characteristics

Fig 4. Typical Forward Transconductance

Vs. Drain Current

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IRF3805/S/LPbF

14000

= 0V,

f = 1 MHZ

I = 75A

= 44V

= C + C , C SHORTED

VDS= 28V

iss

gd ds

12000

10000

8000

6000

4000

2000

= C

rss

= C + C

oss

Ciss

Coss

Crss

100

150

200

250

300

100

Total Gate Charge (nC)

, Drain-to-Source Voltage (V)

Fig 6. Typical Gate Charge Vs.

Fig 5. Typical Capacitance Vs.

Gate-to-Source Voltage

Drain-to-Source Voltage

10000

1000

100

1000.0

100.0

10.0

1.0

OPERATION IN THIS AREA

LIMITED BY R

(on)

= 175°C

100µsec

10msec

1msec

= 25°C

Tc = 25°C

Tj = 175°C

Single Pulse

= 0V

0.1

100

1000

0.0

0.4

0.8

1.2

1.6

2.0

2.4

, Drain-toSource Voltage (V)

, Source-to-Drain Voltage (V)

Fig 8. Maximum Safe Operating Area

Fig 7. Typical Source-Drain Diode

Forward Voltage

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IRF3805/S/LPbF

2.0

1.5

1.0

0.5

240

200

160

120

= 75A

LIMITED BY PACKAGE

= 10V

100

125

150

175

-60 -40 -20

20 40 60 80 100 120 140 160 180

, Case Temperature (°C)

, Junction Temperature (°C)

Fig 10. Normalized On-Resistance

Fig 9. Maximum Drain Current Vs.

Vs. Temperature

Case Temperature

D = 0.50

0.1

0.20

0.10

0.05

R₁

R₂

R₁

Ri (°C/W) τi (sec)

0.2653 0.001016

0.02

0.01

0.001

^Jτ_J

^Cτ

¹τ₁

²τ₂

0.2347 0.012816

Ci= τi/Ri

Notes:

SINGLE PULSE

1. Duty Factor D = t1/t2

2. Peak Tj = P dm x Zthjc + Tc

( THERMAL RESPONSE )

0.0001

1E-006

1E-005

0.0001

0.001

0.01

0.1

, Rectangular Pulse Duration (sec)

Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case

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IRF3805/S/LPbF

2000

1600

1200

800

400

15V

TOP

15A

20A

75A

DRIVER

BOTTOM

D.U.T

20V

0.01

Ω

Fig 12a. Unclamped Inductive Test Circuit

(BR)DSS

100

125

150

175

Starting T , Junction Temperature (°C)

Fig 12c. Maximum Avalanche Energy

Fig 12b. Unclamped Inductive Waveforms

Vs. Drain Current

10 V

4.5

4.0

3.5

3.0

2.5

2.0

1.5

= 250µA

Charge

Fig 13a. Basic Gate Charge Waveform

Current Regulator

Same Type as D.U.T.

50KΩ

.2µF

12V

.3µF

D.U.T.

-75 -50 -25

25 50 75 100 125 150 175

, Temperature ( °C )

3mA

Current Sampling Resistors

Fig 14. Threshold Voltage Vs. Temperature

Fig 13b. Gate Charge Test Circuit

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IRF3805/S/LPbF

10000

1000

100

Duty Cycle = Single Pulse

Allowed avalanche Current vs

avalanche pulsewidth, tav

assuming ∆Tj = 25°C due to

avalanche losses. Note: In no

case should Tj be allowed to

exceed Tjmax

0.01

0.05

0.10

1.0E-06

1.0E-05

1.0E-04

1.0E-03

1.0E-02

1.0E-01

tav (sec)

Fig 15. Typical Avalanche Current Vs.Pulsewidth

800

600

400

200

Notes on Repetitive Avalanche Curves , Figures 15, 16:

(For further info, see AN-1005 at www.irf.com)

1. Avalanche failures assumption:

Purely a thermal phenomenon and failure occurs at a

temperature far in excess of T_jmax. This is validated for

every part type.

2. Safe operation in Avalanche is allowed as long asT_jmaxis

not exceeded.

3. Equation below based on circuit and waveforms shown in

Figures 12a, 12b.

TOP

BOTTOM 1% Duty Cycle

= 75A

Single Pulse

4. P_{D (ave)}= Average power dissipation per single

avalanche pulse.

5. BV = Rated breakdown voltage (1.3 factor accounts for

voltage increase during avalanche).

6. I_av= Allowable avalanche current.

7. ∆T = Allowable rise in junction temperature, not to exceed

T_jmax(assumed as 25°C in Figure 15, 16).

t_{av =}Average time in avalanche.

100

125

150

175

D = Duty cycle in avalanche = t_av·f

Z_thJC(D, t_av) = Transient thermal resistance, see figure 11)

Starting T , Junction Temperature (°C)

P_{D (ave)}= 1/2 ( 1.3·BV·I_av) = DT/ Z_thJC

I_av= 2DT/ [1.3·BV·Z_th]

Fig 16. Maximum Avalanche Energy

E_{AS (AR)}= P_{D (ave)}·t_av

Vs. Temperature

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IRF3805/S/LPbF

Driver Gate Drive

P.W.

Period

D.U.T

Period

D =

=10V

Circuit Layout Considerations

• Low Stray Inductance

• Ground Plane

• Low Leakage Inductance

Current Transformer

D.U.T. I Waveform

Reverse

Recovery

Current

Body Diode Forward

Current

di/dt

D.U.T. V Waveform

Diode Recovery

dv/dt

V_DD

Re-Applied

Voltage

• dv/dt controlled by R_G

R_G

Body Diode

Forward Drop

• Driver same type as D.U.T.

• I_SDcontrolled by Duty Factor "D"

• D.U.T. - Device Under Test

Inductor Curent

Ripple ≤ 5%

* V_GS= 5V for Logic Level Devices

Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel

HEXFET^®Power MOSFETs

R_D

V_DS

V_GS

D.U.T.

R_G

⁺V_DD

10V

Pulse Width ≤ 1 µs

Duty Factor ≤ 0.1 %

Fig 18a. Switching Time Test Circuit

90%

10%

d(on)

d(off)

Fig 18b. Switching Time Waveforms

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IRF3805/S/LPbF

TO-220AB Package Outline (Dimensions are shown in millimeters (inches))

TO-220AB packages are not recommended for Surface Mount Application.

TO-220ABPartMarkingInformation

EXAMPLE: THIS IS AN IRF1010

PART NUMBER

LOT CODE 1789

INTERNATIONAL

RECTIFIER

LOGO

ASSEMBLED ON WW 19, 2000

IN THE ASSEMBLY LINE "C"

DATE CODE

YEAR 0 = 2000

WEEK 19

Note: "P" in assembly lineposition

indicates "L ead - F ree"

ASSEMBLY

LOT CODE

LINE C

www.irf.com

IRF3805/S/LPbF

D²Pak Package Outline (Dimensions are shown in millimeters (inches))

D²PakPartMarkingInformation

THIS IS AN IRF530S WITH

PART NUMBER

LOT CODE 8024

ASSEMBLED ON WW 02, 2000

IN THE ASSEMBLY LINE "L"

INTERNATIONAL

RECTIFIER

LOGO

F530S

DATE CODE

YEAR 0 = 2000

WEEK 02

Note: "P" in assembly line

position indicates "Lead-Free"

ASSEMBLY

LOT CODE

LINE L

PART NUMBER

DATE CODE

INTERNATIONAL

RECTIFIER

LOGO

F530S

P = DE S I GNAT E S L E AD-F RE E

PRODUCT (OPTIONAL)

YEAR 0 = 2000

ASSEMBLY

LOT CODE

WEEK 02

A= ASSEMBLY SITE CODE

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IRF3805/S/LPbF

TO-262 Package Outline (Dimensions are shown in millimeters (inches))

IGBT

1-GATE

2-COLLECTOR

3-EMITTER

4-COLLECTOR

TO-262 Part Marking Information

EXAMPLE: THIS IS AN IRL3103L

LOT CODE 1789

PART NUMBER

INTERNATIONAL

RECTIFIER

LOGO

ASSEMBLED ON WW 19, 1997

IN THE ASSEMBLY LINE "C"

DAT E CODE

YEAR 7 = 1997

WEE K 19

Note: "P" in assembly line

pos ition indicates "Lead-F ree"

AS S EMB LY

LOT CODE

LINE C

PART NUMBER

INTERNATIONAL

RECTIFIER

LOGO

DATE CODE

P = DE S IGNAT E S L E AD-F RE E

PRODUCT (OPTIONAL)

YEAR 7 = 1997

AS S E MB L Y

LOT CODE

WEE K 19

A = AS S E MB L Y S IT E CODE

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IRF3805/S/LPbF

D²PakTape & Reel Information

TRR

1.60 (.063)

1.50 (.059)

1.60 (.063)

1.50 (.059)

4.10 (.161)

3.90 (.153)

0.368 (.0145)

0.342 (.0135)

FEED DIRECTION

1.85 (.073)

11.60 (.457)

11.40 (.449)

1.65 (.065)

24.30 (.957)

23.90 (.941)

15.42 (.609)

15.22 (.601)

TRL

1.75 (.069)

1.25 (.049)

10.90 (.429)

10.70 (.421)

4.72 (.136)

4.52 (.178)

16.10 (.634)

15.90 (.626)

FEED DIRECTION

13.50 (.532)

12.80 (.504)

27.40 (1.079)

23.90 (.941)

330.00

(14.173)

MAX.

60.00 (2.362)

MIN.

30.40 (1.197)

MAX.

NOTES :

1. COMFORMS TO EIA-418.

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSION MEASURED @ HUB.

4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.

26.40 (1.039)

24.40 (.961)

Notes:

ꢀ

Limited by T_Jmax, see Fig.12a, 12b, 15, 16 for typical repetitive

avalanche performance.

Repetitive rating; pulse width limited by

max. junction temperature. (See fig. 11).

Limited by T_Jmax, starting T_J= 25°C, L = 0.23mH

This value determined from sample failure population. 100%

tested to this value in production.

R_G= 25Ω, I_AS= 75A, V_GS=10V. Part not

recommended for use above this value.

Pulse width ≤ 1.0ms; duty cycle ≤ 2%.

C_osseff. is a fixed capacitance that gives the

same charging time as C_osswhile V_DSis rising

This is only applied to TO-220AB pakcage.

This is applied to D²Pak, when mounted on 1" square PCB (FR-

4 or G-10 Material). For recommended footprint and soldering

techniques refer to application note #AN-994.

from 0 to 80% V_DSS

R is measured at T_Jof approximately 90°C.

TO-220 device will have an Rth of 0.45°C/W.

Data and specifications subject to change without notice.

This product has been designed and qualified for the Automotive [Q101]market.

Qualification Standards can be found on IR’s Web site.

IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105

TAC Fax: (310) 252-7903

Visit us at www.irf.com for sales contact information. 9/05

www.irf.com

IRF3805LPBF [INFINEON]

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