IRF6609TR1PBF_技术文档

PD - 97091A

IRF6609PbF

IRF6609TRPbF

DirectFET Power MOSFET

l RoHS Compliant

l Lead-Free (Qualified up to 260°C Reflow)

l Application Specific MOSFETs

V_DSS

20V

R_DS(on)max

2.0mΩ@V_GS= 10V

2.6mΩ@V_GS= 4.5V

Qg

46nC

l Ideal for CPU Core DC-DC Converters

l Low Conduction Losses and Switching Losses

l High Cdv/dt Immunity

l Low Profile (<0.7mm)

l Dual Sided Cooling Compatible

l Compatible with existing Surface Mount Techniques

DirectFET ISOMETRIC

MT

Applicable DirectFET Outline and Substrate Outline (see p.8,9 for details)

SQ SX ST MQ MX MT

Description

The IRF6609PbF combines the latest HEXFET® Power MOSFET Silicon technology with the advanced DirectFET^TMpackaging to achieve

the lowest on-state resistance in a package that has the footprint of an SO-8 and only 0.7 mm profile. The DirectFET package is compat-

ible with existing layout geometries used in power applications, PCB assembly equipment and vapor phase, infra-red or convection

soldering techniques, when application note AN-1035 is followed regarding the manufacturing methods and processes. The DirectFET

package allows dual sided cooling to maximize thermal transfer in power systems, improving previous best thermal resistance by 80%.

The IRF6609PbF balances both low resistance and low charge along with ultra low package inductance to reduce both conduction and

switching losses. The reduced total losses make this product ideal for high efficiency DC-DC converters that power the latest generation

of processors operating at higher frequencies. The IRF6609PbF has been optimized for parameters that are critical in synchronous buck

operating from 12 volt bus converters including Rds(on), gate charge and Cdv/dt-induced turn on immunity. The IRF6609PbF offers

particularly low Rds(on) and high Cdv/dt immunity for synchronous FET applications.

Absolute Maximum Ratings

Parameter

Drain-to-Source Voltage

Max.

20

Units

V

V_DS

V

I

Gate-to-Source Voltage

±20

GS

Continuous Drain Current, V_GS@ 10V

Pulsed Drain Current

@ T_C= 25°C

150

31

D

I

@ T_A= 25°C

@ T_A= 70°C

A

D

25

250

89

DM

P

@T_C= 25°C

@T_A= 25°C

@T_A= 70°C

Power Dissipation

D

Power Dissipation

1.8

2.8

W

Power Dissipation

Linear Derating Factor

Operating Junction and

0.022

-40 to + 150

W/°C

°C

T

J

Storage Temperature Range

STG

Thermal Resistance

Parameter

Junction-to-Ambient

Typ.

–––

12.5

20

Max.

45

Units

R_θ

JA

R_θJA

Junction-to-Ambient

Junction-to-Case

–––

1.4

R_θJA

°C/W

R_θJC

–––

1.0

R_θJ-PCB

Junction-to-PCB Mounted

–––

Notes through are on page 10

www.irf.com

1

7/3/06

IRF6609PbF

Static @ T_J= 25°C (unless otherwise specified)

Parameter

Min. Typ. Max. Units

Conditions

BV_DSS

Drain-to-Source Breakdown Voltage

20

–––

V

V_GS= 0V, I_D= 250µA

∆ΒV_DSS/∆T_J

R_DS(on)

Breakdown Voltage Temp. Coefficient –––

Static Drain-to-Source On-Resistance –––

–––

15

––– mV/°C Reference to 25°C, I_D= 1mA

mΩ

1.6

2.0

2.6

V

_GS= 10V, I_D= 31A

_GS= 4.5V, I_D= 25A

2.0

V_GS(th)

Gate Threshold Voltage

1.55

–––

91

–––

-6.1

–––

2.45

V

V_DS= V_GS, I_D= 250µA

∆V_GS(th)/∆T_J

I_DSS

Gate Threshold Voltage Coefficient

Drain-to-Source Leakage Current

––– mV/°C

1.0

150

100

µA

nA

S

V

_DS= 16V, V_GS= 0V

_DS= 16V, V_GS= 0V, T_J= 150°C

_GS= 20V

I_GSS

Gate-to-Source Forward Leakage

Gate-to-Source Reverse Leakage

Forward Transconductance

Total Gate Charge

––– -100

_GS= -20V

gfs

–––

46

15

4.7

15

11

20

26

24

95

26

9.8

–––

69

_DS= 10V, I_D= 25A

Q_g

–––

Q_gs1

Q_gs2

Q_gd

Q_godr

Q_sw

Q_oss

t_d(on)

t_r

Pre-Vth Gate-to-Source Charge

Post-Vth Gate-to-Source Charge

Gate-to-Drain Charge

Gate Charge Overdrive

Switch Charge (Q_gs2+ Q_gd)

Output Charge

–––

V_DS= 10V

nC V_GS= 4.5V

I_D= 17A

See Fig. 16

nC V_DS= 10V, V_GS= 0V

Turn-On Delay Time

V_DD= 16V, V_GS= 4.5V

Rise Time

I_D= 25A

t_d(off)

t_f

Turn-Off Delay Time

ns Clamped Inductive Load

Fall Time

C_iss

C_oss

C_rss

Input Capacitance

––– 6290 –––

––– 1850 –––

V

_GS= 0V

Output Capacitance

pF

_DS= 10V

Reverse Transfer Capacitance

–––

860

–––

ƒ = 1.0MHz

Avalanche Characteristics

Parameter

Typ.

–––

Max.

Units

mJ

A

Single Pulse Avalanche Energy

Avalanche Current

E_{AS (Thermally limited)}

240

I_AR

See Fig. 12, 13, 18a,

18b,

Repetitive Avalanche Energy

E_AR

mJ

Diode Characteristics

Parameter

Min. Typ. Max. Units

Conditions

D

S

I_S

Continuous Source Current

–––

89

MOSFET symbol

(Body Diode)

A

showing the

G

I_SM

Pulsed Source Current

–––

250

integral reverse

(Body Diode)

p-n junction diode.

V_SD

t_rr

Diode Forward Voltage

Reverse Recovery Time

–––

0.80

32

1.2

48

39

V

T = 25°C, I = 25A, V = 0V

J S GS

ns T = 25°C, I = 25A

J

F

Q_rr

Reverse Recovery Charge

26

nC di/dt = 100A/µs

2

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IRF6609PbF

1000

100

10

1000

100

10

VGS

10V

VGS

10V

TOP

7.0V

4.5V

4.0V

3.5V

3.2V

2.9V

2.7V

7.0V

4.5V

4.0V

3.5V

3.2V

2.9V

2.7V

BOTTOM

1

2.7V

1

2.7V

1

≤

60µs PULSE WIDTH

Tj = 25°C

≤

60µs PULSE WIDTH

Tj = 150°C

0.1

1

0.1

10

100

0.1

10

100

V

, Drain-to-Source Voltage (V)

V

, Drain-to-Source Voltage (V)

DS

Fig 1. Typical Output Characteristics

Fig 2. Typical Output Characteristics

1000.0

1.5

I

= 31A

D

V

= 10V

GS

100.0

10.0

1.0

T

= 150°C

J

1.0

T

= 25°C

J

V

= 10V

DS

≤

60µs PULSE WIDTH

0.1

0.5

2.0

3.0

4.0

5.0

-60 -40 -20

T

0

20 40 60 80 100 120 140 160

V

, Gate-to-Source Voltage (V)

GS

, Junction Temperature (°C)

J

Fig 3. Typical Transfer Characteristics

Fig 4. Normalized On-Resistance

vs. Temperature

www.irf.com

3

IRF6609PbF

100000

12

10

8

V

= 0V,

= C

f = 1 MHZ

GS

I = 17A

D

C

+ C , C

SHORTED

V

= 20V

iss

gs

gd

ds

DS

VDS= 10V

= C

rss

oss

gd

= C + C

ds

gd

10000

1000

100

Ciss

6

Coss

Crss

4

2

0

20

40

60

80

100

120

1

10

, Drain-to-Source Voltage (V)

100

Q

Total Gate Charge (nC)

G

V

DS

Fig 6. Typical Gate Charge vs.

Fig 5. Typical Capacitance vs.

Gate-to-Source Voltage

Drain-to-Source Voltage

1000.0

1000

100

10

OPERATION IN THIS AREA

LIMITED BY R

(on)

DS

100.0

10.0

1.0

1msec

T

= 150°C

100µsec

J

10msec

1

T

= 25°C

J

Tc = 25°C

Tj = 150°C

Single Pulse

V

= 0V

GS

0.1

1

10

100

0.0

0.4

0.8

1.2

1.6

2.0

V

, Drain-to-Source Voltage (V)

V

, Source-to-Drain Voltage (V)

DS

SD

Fig 7. Typical Source-Drain Diode

Fig 8. Maximum Safe Operating Area

Forward Voltage

4

www.irf.com

IRF6609PbF

2.5

2.0

1.5

1.0

150

120

90

60

30

0

I

= 250µA

D

-75 -50 -25

0

25

50

75 100 125 150

25

50

75

100

125

150

T

, Temperature ( °C )

T

J

, Junction Temperature (°C)

J

Fig 10. Threshold Voltage vs. Temperature

Fig 9. Maximum Drain Current vs.

Case Temperature

100

D = 0.50

10

1

0.20

0.10

0.05

0.02

0.01

R₁

R₂

R₃

R₄

Ri (°C/W) τi (sec)

0.1

0.6784

17.299

17.566

9.4701

0.00086

0.57756

8.94

τ

^Jτ_J

τ

^Cτ

τ

¹τ₁

τ

²τ₂

³τ₃

⁴τ₄

0.01

0.001

0.0001

Ci= τi/Ri

106

SINGLE PULSE

( THERMAL RESPONSE )

Notes:

1. Duty Factor D = t1/t2

2. Peak Tj = P dm x Zthja + Tc

1E-006

1E-005

0.0001

0.001

0.01

0.1

1

10

100

t

, Rectangular Pulse Duration (sec)

1

Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient

www.irf.com

5

IRF6609PbF

10000

Allowed avalanche Current vs

avalanche pulsewidth, tav

assuming ∆Tj = 25°C due to

avalanche losses. Note: In no

case should Tj be allowed to

exceed Tjmax

1000

Duty Cycle = Single Pulse

100

10

0.01

1

0.05

0.10

0.1

0.01

1.0E-06

1.0E-05

1.0E-04

1.0E-03

1.0E-02

1.0E-01

1.0E+00

1.0E+01

tav (sec)

Fig 12. Typical Avalanche Current vs.Pulsewidth

250

Notes on Repetitive Avalanche Curves , Figures 12, 13:

(For further info, see AN-1005 at www.irf.com)

1. Avalanche failures assumption:

Purely a thermal phenomenon and failure occurs at a

temperature far in excess of T_jmax. This is validated for

every part type.

2. Safe operation in Avalanche is allowed as long asT_jmaxis

not exceeded.

3. Equation below based on circuit and waveforms shown in

Figures 16a, 16b.

Single Pulse

= 25A

I

D

200

150

100

50

4. P_{D (ave)}= Average power dissipation per single

avalanche pulse.

5. BV = Rated breakdown voltage (1.3 factor accounts for

voltage increase during avalanche).

6. I_av= Allowable avalanche current.

7. ∆T = Allowable rise in junction temperature, not to exceed

T_jmax(assumed as 25°C in Figure 12, 13).

t_{av =}Average time in avalanche.

0

25

50

75

100

125

150

D = Duty cycle in avalanche = t_av·f

Z_thJC(D, t_av) = Transient thermal resistance, see figure 11)

Starting T , Junction Temperature (°C)

J

P_{D (ave)}= 1/2 ( 1.3·BV·I_av) = DT/ Z_thJC

Fig 13. Maximum Avalanche Energy

I_av= 2DT/ [1.3·BV·Z_th]

E_{AS (AR)}= P_{D (ave)}·t_av

vs. Temperature

6

www.irf.com

IRF6609PbF

10

8

1000

800

600

400

200

0

I

= 31A

I

D

TOP

11A

14A

BOTTOM 25A

6

4

T

= 125°C

J

2

= 25°C

8.0

0

2.0

4.0

6.0

10.0

25

50

75

100

125

150

V

, Gate-to-Source Voltage (V)

GS

Starting T , Junction Temperature (°C)

J

Fig 14. On-Resistance Vs. Gate Voltage

Fig 15. Maximum Avalanche Energy

Vs. Drain Current

Id

Vds

Vgs

L

VCC

DUT

0

1K

Vgs(th)

Qgs1

Qgs2

Qgd

Qgodr

Fig 16a. Gate Charge Test Circuit

L_D

Fig 16b. Gate Charge Waveform

V_DS

90%

+

-

V_DD

D.U.T

V_GS

10%

V_GS

Pulse Width < 1µs

Duty Factor < 0.1%

t_d(on)

t_d(off)

t_r

t_f

Fig 17a. Switching Time Test Circuit

Fig 17b. Switching Time Waveforms

15V

V

(BR)DSS

t

p

DRIVER

+

L

V

DS

D.U.T

R

G

V

DD

-

I

A

AS

20V

V_GS

0.01

Ω

t

p

I

AS

Fig 18a. Unclamped Inductive Test Circuit

Fig 18b. Unclamped Inductive Waveforms

www.irf.com

7

IRF6609PbF

Driver Gate Drive

P.W.

Period

D =

D.U.T

+

*

=10V

V

GS

Circuit Layout Considerations

• Low Stray Inductance

• Ground Plane

• Low Leakage Inductance

Current Transformer

-

D.U.T. I Waveform

SD

+

-

Reverse

Recovery

Current

Body Diode Forward

Current

di/dt

-

+

D.U.T. V Waveform

DS

Diode Recovery

dv/dt

V

DD

V_DD

Re-Applied

Voltage

• dv/dt controlled by R_G

R_G

+

-

Body Diode

Forward Drop

• Driver same type as D.U.T.

• I_SDcontrolled by Duty Factor "D"

• D.U.T. - Device Under Test

Inductor Curent

I

SD

Ripple

≤ 5%

* V_GS= 5V for Logic Level Devices

Fig 19. Peak Diode Recovery dv/dt Test Circuit for N-Channel

HEXFET^®Power MOSFETs

DirectFET Substrate and PCB Layout, MT Outline

(Medium Size Can, T-Designation).

Please see DirectFET application note AN-1035 for all details regarding the assembly of DirectFET.

This includes all recommendations for stencil and substrate designs.

G = GATE

D = DRAIN

S = SOURCE

D

S

G

8

www.irf.com

IRF6609PbF

DirectFET Outline Dimension, MT Outline

(Medium Size Can, T-Designation).

Please see DirectFET application note AN-1035 for all details regarding the assembly of DirectFET.

This includes all recommendations for stencil and substrate designs.

DIMENSIONS

IMPERIAL

METRIC

MAX MIN

CODE MIN

MAX

0.250

0.199

0.156

0.018

0.032

0.036

0.072

0.040

0.026

0.039

0.104

0.0274

0.0031

0.007

6.35 0.246

5.05 0.189

A

B

C

D

E

F

6.25

4.80

3.85

0.35

0.78

0.88

1.78

0.98

0.63

0.88

2.46

0.616

0.020

0.08

3.95

0.45

0.152

0.014

0.82 0.031

0.92 0.035

1.82

1.02

G

H

J

0.070

0.039

0.67 0.025

1.01 0.035

K

L

2.63

0.097

0.676

M

R

P

0.0235

0.080 0.0008

0.17 0.003

DirectFET Part Marking

www.irf.com

9

IRF6609PbF

DirectFET Tape & Reel Dimension

(Showing component orientation).

LOADED TAPE FEED DIRECTION

NOTE: Controlling dimensions in mm

Std reel quantity is 4800 parts. (ordered as IRF6609TRPBF). For 1000 parts on 7"

reel, order IRF6609TR1PBF

DIMENSIONS

METRIC

REEL DIMENSIONS

IMPERIAL

STANDARD OPTION (QTY 4800)

TR1 OPTION (QTY 1000)

IMPERIAL

MIN

MAX

12.992 N.C

METRIC

MAX

IMPERIAL

CODE

MIN

7.90

3.90

11.90

5.45

5.10

6.50

1.50

MAX

8.10

4.10

12.30

5.55

5.30

6.70

N.C

MIN

MAX

0.319

0.161

0.484

0.219

0.209

0.264

N.C

METRIC

MAX

CODE

MIN

6.9

MAX

N.C

0.50

N.C

0.53

N.C

A

B

C

D

E

F

0.311

0.154

0.469

0.215

0.201

0.256

0.059

A

B

C

D

E

F

330.0

20.2

12.8

1.5

177.77

19.06

13.5

1.5

N.C

13.2

N.C

18.4

14.4

15.4

N.C

0.795

0.504

0.059

3.937

N.C

0.75

0.53

0.059

2.31

N.C

0.520

N.C

12.8

N.C

100.0

N.C

58.72

N.C

0.724

0.567

0.606

13.50

12.01

G

H

G

H

0.488

0.469

0.47

12.4

11.9

1.60

0.063

Notes:

Click on this section to link to the appropriate technical paper. Surface mounted on 1 in. square Cu board.

Click on this section to link to the DirectFET Website.

Repetitive rating; pulse width limited by max. junction

temperature.

Starting T_J= 25°C, L = 0.75mH, R_G= 25Ω, I_AS= 25A.

ꢀ Pulse width ≤ 400µs; duty cycle ≤ 2%.

Used double sided cooling, mounting pad.

Mounted on minimum footprint full size board with

metalized back and with small clip heatsink.

T_Cmeasured with thermal couple mounted to top

(Drain) of part.

R is measured at T_Jof approximately 90°C.

θ

Data and specifications subject to change without notice.

This product has been designed and qualified for the Consumer market.

Qualification Standards can be found on IR’s Web site.

IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105

TAC Fax: (310) 252-7903

Visit us at www.irf.com for sales contact information.07/06

10

www.irf.com


型号：	IRF6609TR1PBF
厂家：	Infineon
描述：	Power Field-Effect Transistor, 31A I(D), 20V, 0.002ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, ROHS COMPLIANT, ISOMETRIC-3 瞄准线开关脉冲晶体管
文件：	总11页 (文件大小：264K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

IRF6609TR1PBF [INFINEON]

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