IRF7807VD1TRPBF-1 [INFINEON]

Small Signal Field-Effect Transistor;


型号：	IRF7807VD1TRPBF-1
厂家：	Infineon
描述：	Small Signal Field-Effect Transistor
文件：	总9页 (文件大小：233K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

IRF7807VD1PbF-1

FETKY MOSFET / SCHOTTKY DIODE

V_DS

K/D

A/S

R_{DS(on) max}

(@V_GS= 4.5V)

Q_{g (typical)}

9.5

3.4

A/S

K/D

Q_{SW (typical)}

Q_{OSS (typical)}

I_D

Top View

SO-8

8.3

(@T_A= 25°C)

Applications

l Co-Pack N-channel HEXFET^®POWER MOSFET and Schottky Diode

l Ideal for Synchronous Rectifiers in DC-DC

Features

Benefits

Industry-standard pinout SO-8 Package

Compatible with Existing Surface Mount Techniques

RoHS Compliant, Halogen-Free

Multi-Vendor Compatibility

Easier Manufacturing

Environmentally Friendlier

Increased Reliability

⇒

MSL1, Industrial qualification

Standard Pack

Form

Tube/Bulk

Tape and Reel

Base Part Number

Package Type

Orderable Part Number

Quantity

4000

IRF7807VD1PbF-1

IRF7807VD1TRPbF-1

IRF7807VD1PbF-1

SO-8

Absolute Maximum Ratings

Parameter

Symbol

V_DS

Max

Units

Drain-to-Source Voltage

Gate-to-Source Voltage

Continuous Output Current

(V_GS≥ 4.5V)

V_GS

±20

8.3

6.6

25°C

70°C

I_D

Pulsed Drain Current

I_DM

P_D

25°C

70°C

25°C

70°C

2.5

1.6

3.5

2.2

Power Dissipation

Schottky and Body Diode

Average Forward Current

I_F(AV)

Junction & Storage Temperature Range

T_J, T_STG

-55 to 150

°C

Thermal Resistance

Parameter

Symbol

Typ

–––

Max

Units

Maximum Junction-to-Ambient

Maximum Junction-to-Lead

R_θ

°C/W

R_θ

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Electrical Characteristics

Parameter

Symbol Min Typ Max Units

Conditions

BV_DSS

R_DS(on)

V_GS(th)

Drain-Source Breakdown Voltage

Static Drain-Source On-Resistance

Gate Threshold Voltage

––– –––

17 25

mΩ

V_GS= 0V, I_D= 250μA

–––

V_GS= 4.5V, I_D= 7.0A

V_DS= V_GS, I_D= 250μA

1.0 ––– 3.0

––– ––– 100 μA V_DS= 30V, V_GS= 0V

––– ––– 20 μA V_DS= 24V, V_GS= 0V

I_DSS

Drain-Source Leakage Current

––– ––– 2.0 mA V_DS= 24V, V_GS= 0V, T_J= 100°C

––– ––– ±100 nA V_GS= ± 20V

I_GSS

Q_G

Gate-Source Leakage Current

Total Gate Charge*

Pre-Vth Gate-Source Charge

Post-Vth Gate-Source Charge

Gate-to-Drain Charge

Switch Charge (Q_gs2+ Q_gd)

Output Charge*

––– 9.5

Q_GS1

Q_GS2

Q_GD

Q_SW

Q_OSS

R_G

––– 2.3 –––

––– 1.0 –––

––– 2.4 –––

––– 3.4 5.2

V_DS= 4.5V

I_D= 7.0A

V_DS= 16V

V_DS= 16V, V_GS= 0

V_DD= 16V, I_D= 7.0V

–––

12 16.8

Gate Resistance

0.9 ––– 2.8

––– 6.3 –––

––– 1.2 –––

t_d(on)

t_r

t_d(off)

t_f

Turn-On Delay Time

Rise Time

V_GS= 5V, R = 2

Turn-Off Delay Time

Fall Time

–––

11 –––

Resistive Load

––– 2.2 –––

Diode Characteristics

Parameter

Symbol Min Typ Max Units

Conditions

T_J= 25°C, I_S= 1.0A ,V_GS= 0V

V_SD

Diode Forward Voltage

––– ––– 0.5

T = 125°C, I_S= 1.0A, V_GS= OV

––– ––– 0.39

di/dt = 700A/μs

t_rr

Reverse Recovery Time

Reverse Recovery Charge

–––

51 ––– ns

51 ––– nC

V_DD= 16V, V_GS= 0V, I_D= 15A

T_J= 25°C, I_S= 7.0A ,V_DS= 16V

Q_rr

di/dt = 100A/μs

Notes:

ꢀ

Repetitive rating; pulse width limited by max. junction temperature.

Pulse width ≤ 400 μs; duty cycle ≤ 2%.

When mounted on 1 inch square copper board

50% Duty Cycle, Rectangular

Typical values of R_DS(on) measured at V_GS= 4.5V, Q_G, Q_SWand Q_OSSmeasured at V_GS= 5.0V, I_F= 7.0A.

R_θis measured at T_Japproximately 90°C

Device are 100% tested to these parameters.

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IRF7807VD1PbF-1

Power MOSFET Selection for DC/DC

Converters

Control FET

Drain Current

Special attention has been given to the power losses

in the switching elements of the circuit - Q1 and Q2.

Power losses in the high side switch Q1, also called

the Control FET, are impacted by the R_ds(on)of the

MOSFET, but these conduction losses are only about

one half of the total losses.

Gate Voltage

V_GTH

Power losses in the control switch Q1 are given

by;

Drain Voltage

P_loss= P_conduction+ P_switching+ P_drive+ P_output

This can be expanded and approximated by;

Figure 1: Typical MOSFET switching waveform

= I ²× R_{ds(on )}

(

)

loss

rms

Synchronous FET

⎛

Q_gd

i_g

⎞

Q_gs2

i_g

⎞

⎟

The power loss equation for Q2 is approximated

by;

⎜

⎟

⎜

+ I ×

× V × f + I ×

× V × f

⎝

⎠

⎝

⎠

+ Q × V × f

(

)

P = P

+ P + P^*

loss

conduction

drive

output

×V × f

P = I_rms²× R_ds(on)

⎛ Q_oss

⎞

⎠

loss ( )

⎝

+ Q × V × f

(

)

This simplified loss equation includes the terms Q_gs2

and Q_osswhich are new to Power MOSFET data sheets.

Q_gs2is a sub element of traditional gate-source

charge that is included in all MOSFET data sheets.

The importance of splitting this gate-source charge

into two sub elements, Q_gs1and Q_gs2, can be seen from

Fig 1.

⎛

⎜

Q_oss

⎞

×V × f + Q × V × f

(

)

⎝ 2

⎠

*dissipated primarily in Q1.

Q_gs2indicates the charge that must be supplied by

the gate driver between the time that the threshold

voltage has been reached (t1) and the time the drain

current rises to I_dmax(t2) at which time the drain volt-

age begins to change. Minimizing Q_gs2is a critical fac-

tor in reducing switching losses in Q1.

Q_ossis the charge that must be supplied to the out-

put capacitance of the MOSFET during every switch-

ing cycle. Figure 2 shows how Q_ossis formed by the

parallel combination of the voltage dependant (non-

linear) capacitance’s C_dsand C_dgwhen multiplied by

the power supply input buss voltage.

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For the synchronous MOSFET Q2, R_ds(on)is an im-

portant characteristic; however, once again the im-

portance of gate charge must not be overlooked since

it impacts three critical areas. Under light load the

MOSFET must still be turned on and off by the con-

trol IC so the gate drive losses become much more

significant. Secondly, the output charge Q_ossand re-

verse recovery charge Q_rrboth generate losses that

are transfered to Q1 and increase the dissipation in

that device. Thirdly, gate charge will impact the

MOSFETs’ susceptibility to Cdv/dt turn on.

the MOSFET on, resulting in shoot-through current .

The ratio of Q_gd/Q_gs1must be minimized to reduce the

potential for Cdv/dt turn on.

Spice model for IRF7807V can be downloaded in

machine readable format at www.irf.com.

The drain of Q2 is connected to the switching node

of the converter and therefore sees transitions be-

tween ground and V_in. As Q1 turns on and off there is

a rate of change of drain voltage dV/dt which is ca-

pacitively coupled to the gate of Q2 and can induce

a voltage spike on the gate that is sufficient to turn

Figure 2: Q_ossCharacteristic

Typical Mobile PC Application

The performance of these new devices has been tested

in circuit and correlates well with performance predic-

tions generated by the system models. An advantage of

this new technology platform is that the MOSFETs it

produces are suitable for both control FET and synchro-

nous FET applications. This has been demonstrated with

the 3.3V and 5V converters. (Fig 3 and Fig 4). In these

applications the same MOSFET IRF7807V was used for

both the control FET (Q1) and the synchronous FET

(Q2). This provides a highly effective cost/performance

solution.

3.3V Supply : Q1=Q2= IRF7807V

5.0V Supply : Q1=Q2= IRF7807V

Vin=24V

Vin=14V

Vin=24V

Vin=14V

Vin=10V

Load current (A)

Figure 3

Figure 4

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IRF7807VD1PbF-1

2.0

1.5

1.0

0.5

0.0

0.030

0.025

0.020

0.015

0.010

7.0A

= 7.0A

=4.5V

-60 -40 -20

20 40 60 80 100 120 140 160

2.0

4.0

6.0

8.0

10.0

12.0

14.0

16.0

T , Junction Temperature ( C)

Gate -to -Source Voltage (V)

GS,

Fig 5. Normalized On-Resistance

Fig 7. On-Resistance Vs. Gate Voltage

Vs. Temperature

VGS

4.5V

3.5V

3.0V

2.5V

2.0V

VGS

TOP

4.5V

3.5V

3.0V

2.5V

2.0V

BOTTOM 0.0V

0.0V

380μS PULSE WIDTH

380μs PULSE WIDTH

Tj = 150°C

Tj = 25°C

0.0V

0.4

0.2

0.6

0.8

0.2

0.4

0.6

0.8

, Source-to-Drain Voltage (V)

Fig 7. Typical Reverse Output Characteristics

Fig 8. Typical Reverse Output Characteristics

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100

D = 0.50

0.20

0.10

0.05

0.02

0.01

SINGLE PULSE

(THERMAL RESPONSE)

Notes:

1. Duty factor D =

t / t

2. Peak T = P

x Z

+ T

thJA

0.1

0.00001

0.0001

0.001

0.01

0.1

t , Rectangular Pulse Duration (sec)

Figure 9. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient

7.0A

= 16V

, Total Gate Charge (nC)

Fig 10. Typical Gate Charge Vs.

Gate-to-Source Voltage

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MOSFET , Body Diode & Schottky Diode Characteristics

100

Tj = 150°C

125°C

Tj = 125°C

Tj = 25°C

100°C

75°C

0.1

50°C

25°C

0.01

0.001

0.0001

Reverse Voltage - V (V)

Fig. 12 - Typical Values of

Reverse Current Vs. Reverse Voltage

0.1

0.0

0.2

0.4

0.6

0.8

1.0

1.2

Forward Voltage Drop - V ( V )

Fig. 11 - Typical Forward Voltage Drop

Characteristics

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SO-8 Package Outline(Mosfet & Fetky)

Dimensions are shown in milimeters (inches)

INCHES

MILLIMETERS

DIM

MIN

.0532

MAX

.0688

.0098

.020

MIN

1.35

0.10

0.33

0.19

4.80

3.80

MAX

1.75

0.25

0.51

0.25

5.00

4.00

A1 .0040

.013

.0075

.189

.0098

.1968

.1574

0.25 [.010]

.1497

.050 BASIC

1.27 BASIC

0.635 BASIC

e1 .025 BASIC

.2284

.0099

.016

0°

.2440

.0196

.050

8°

5.80

0.25

0.40

0°

6.20

0.50

1.27

8°

K x 45°

0.10 [.004]

8X c

8X L

8X b

0.25 [.010]

FOOTPRINT

8X 0.72 [.028]

NOTES:

1. DIMENSIONING & TOLERANCING PER ASME Y14.5M-1994.

2. CONTROLLINGDIMENSION: MILLIMETER

3. DIMENSIONS ARE SHOWN IN MILLIMETERS [INCHES].

4. OU T L INE CONF OR MS T O JEDE C OU T L INE MS -012AA.

DIMENSION DOES NOT INCLUDE MOLD PROT RUSIONS.

MOLD PROTRUSIONS NOT TO EXCEED 0.15 [.006].

DIMENSION DOES NOT INCLUDE MOLD PROT RUSIONS.

MOLD PROTRUSIONS NOT TO EXCEED 0.25 [.010].

6.46 [.255]

DIMENSION IS THE LENGT H OF LEAD FOR SOLDERING TO

ASUBSTRATE.

3X 1.27 [.050]

8X 1.78 [.070]

SO-8 Part Marking Information (Lead - Free)

EXAMPLE: THIS IS AN IRF7101 (MOSFET)

DAT E CODE (YWW)

P = DISGNATES LEAD - FREE

PRODUCT (OPTIONAL)

Y = LAST DIGIT OF THE YEAR

WW = WEE K

A = AS S E MB L Y S IT E CODE

XXXX

F7101

INTERNATIONAL

RECTIFIER

LOGO

LOT CODE

PART NUMBER

Note: For the most current drawing please refer to IR website at http://www.irf.com/package/

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IRF7807VD1PbF-1

SO-8 Tape and Reel (Dimensions are shown in milimeters (inches))

TERMINAL NUMBER 1

12.3 ( .484 )

11.7 ( .461 )

8.1 ( .318 )

7.9 ( .312 )

FEED DIRECTION

NOTES:

1. CONTROLLING DIMENSION : MILLIMETER.

2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS(INCHES).

3. OUTLINE CONFORMS TO EIA-481 & EIA-541.

330.00

(12.992)

MAX.

14.40 ( .566 )

12.40 ( .488 )

NOTES :

1. CONTROLLING DIMENSION : MILLIMETER.

2. OUTLINE CONFORMS TO EIA-481 & EIA-541.

Note: For the most current drawing please refer to IR website at http://www.irf.com/package/

Qualification information^†

Industrial

(per JEDEC JESD47F^††guidelines)

Qualification level

MS L 1

Moisture Sensitivity Level

RoHS compliant

SO-8

(per JEDEC J-STD-020D^††

Yes

)

†

Qualification standards can be found at International Rectifier’s web site: http://www.irf.com/product-info/reliability

†† Applicable version of JEDEC standard at the time of product release

IR WORLD HEADQUARTERS: 101 N. Sepulveda Blvd., El Segundo, California 90245, USA

To contact International Rectifier, please visit http://www.irf.com/whoto-call/

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IRF7807VD1TRPBF-1 [INFINEON]

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