IRF8308MTRPBF [INFINEON]
RoHs Compliant Containing No Lead and Bromide; 符合RoHS标准不含铅和溴化物
| 型号： | IRF8308MTRPBF |
| 厂家： | 
Infineon |
| 描述： | RoHs Compliant Containing No Lead and Bromide |
| 文件： | 总9页 (文件大小：277K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PD -97671
IRF8308MPbF
IRF8308MTRPbF
DirectFET Power MOSFET
Typical values (unless otherwise specified)
l RoHs Compliant Containing No Lead and Bromide
l Low Profile (<0.7 mm)
VDSS
VGS
RDS(on)
RDS(on)
30V max ±20V max
1.9mΩ@ 10V 2.7mΩ@ 4.5V
l Dual Sided Cooling Compatible
l Ultra Low Package Inductance
Qg tot Qgd
Qgs2
Qrr
Qoss Vgs(th)
l Optimized for High Frequency Switching
l Ideal for CPU Core DC-DC Converters
l Optimized for Sync. FET socket of Sync. Buck Converter
l Low Conduction and Switching Losses
l Compatible with existing Surface Mount Techniques
l 100% Rg tested
28nC
8.2nC 3.5nC
34nC
20nC
1.8V
DirectFET ISOMETRIC
MX
Applicable DirectFET Outline and Substrate Outline (see p.7,8 for details)
SQ
SX
ST
MQ
MX
MT
MP
Description
The IRF8308MPbF combines the latest HEXFET® Power MOSFET Silicon technology with the advanced DirectFETTM packaging to achieve
the lowest on-state resistance in a package that has the footprint of a SO-8 and only 0.7 mm profile. The DirectFET package is compatible
with existing layout geometries used in power applications, PCB assembly equipment and vapor phase, infra-red or convection soldering
techniques, when application note AN-1035 is followed regarding the manufacturing methods and processes. The DirectFET package allows
dual sided cooling to maximize thermal transfer in power systems, improving previous best thermal resistance by 80%.
The IRF8308MPbF balances both low resistance and low charge along with ultra low package inductance to reduce both conduction and
switching losses. The reduced total losses make this product ideal for high efficiency DC-DC converters that power the latest generation of
processors operating at higher frequencies. The IRF8308MPbF has been optimized for parameters that are critical in synchronous buck
including Rds(on), gate charge and Cdv/dt-induced turn on immunity. The IRF8308MPbF offers particularly low Rds(on) and high Cdv/dt
immunity for synchronous FET applications.
Absolute Maximum Ratings
Max.
30
Parameter
Units
V
VDS
Drain-to-Source Voltage
±20
27
Gate-to-Source Voltage
V
GS
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
I
I
I
I
@ TA = 25°C
D
D
D
21
A
@ TA = 70°C
@ TC = 25°C
150
212
12
DM
EAS
IAR
Single Pulse Avalanche Energy
Avalanche Current
mJ
A
21
8
6
4
2
0
12
10
8
I = 21A
V
= 24V
I
= 27A
D
DS
VDS= 15V
D
6
T
= 125°C
= 25°C
8.0
J
4
T
J
2
0
2.0
4.0
6.0
10.0
0
20
40
60
80
V
, Gate-to-Source Voltage (V)
GS
Q
Total Gate Charge (nC)
G
Fig 1. Typical On-Resistance Vs. Gate Voltage
Fig 2. Typical Total Gate Charge vs Gate-to-Source Voltage
Notes:
TC measured with thermocouple mounted to top (Drain) of part.
ꢀ Repetitive rating; pulse width limited by max. junction temperature.
Starting TJ = 25°C, L = 0.051mH, RG = 25Ω, IAS = 21A.
Click on this section to link to the appropriate technical paper.
Click on this section to link to the DirectFET Website.
Surface mounted on 1 in. square Cu board, steady state.
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1
5/4/11
IRF8308MPbF
Static @ TJ = 25°C (unless otherwise specified)
Conditions
VGS = 0V, ID = 250μA
Reference to 25°C, ID = 1mA
Parameter
Min. Typ. Max. Units
BVDSS
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
30
–––
–––
–––
1.35
–––
–––
–––
–––
–––
130
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
22
–––
V
ΔΒVDSS/ΔTJ
RDS(on)
––– mV/°C
V
V
GS = 10V, ID = 27A
GS = 4.5V, ID = 21A
1.90 2.50
2.70 3.50
mΩ
VDS = VGS, ID = 100μA
VGS(th)
Gate Threshold Voltage
1.8
-6.1
–––
–––
–––
–––
–––
28
2.35
V
ΔVGS(th)/ΔTJ
IDSS
Gate Threshold Voltage Coefficient
Drain-to-Source Leakage Current
––– mV/°C
VDS = 24V, VGS = 0V
1.0
150
100
-100
–––
42
μA
nA
S
V
DS = 24V, VGS = 0V, TJ = 125°C
VGS = 20V
IGSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Forward Transconductance
Total Gate Charge
VGS = -20V
VDS = 15V, ID =21A
gfs
Qg
VDS = 15V
VGS = 4.5V
ID = 21A
Qgs1
Qgs2
Qgd
Qgodr
Qsw
Qoss
RG
Pre-Vth Gate-to-Source Charge
Post-Vth Gate-to-Source Charge
Gate-to-Drain Charge
Gate Charge Overdrive
Switch Charge (Qgs2 + Qgd)
Output Charge
8.4
3.5
8.2
7.9
12
–––
–––
–––
–––
–––
–––
2.2
nC
See Fig. 15
VDS = 16V, VGS = 0V
20
nC
Gate Resistance
1.2
11
Ω
VDD = 15V, VGS = 4.5V
ID = 21A
td(on)
tr
td(off)
tf
Turn-On Delay Time
–––
–––
–––
–––
Rise Time
19
RG= 1.8Ω
Turn-Off Delay Time
23
ns
Fall Time
16
V
GS = 0V
Ciss
Coss
Crss
Input Capacitance
––– 4404 –––
VDS = 15V
Output Capacitance
–––
–––
885
424
–––
–––
pF
ƒ = 1.0MHz
Reverse Transfer Capacitance
Diode Characteristics
Conditions
Parameter
Min. Typ. Max. Units
IS
MOSFET symbol
showing the
Continuous Source Current
(Body Diode)
–––
–––
150
A
ISM
integral reverse
Pulsed Source Current
(Body Diode)
–––
–––
212
p-n junction diode.
TJ = 25°C, IS = 21A, VGS = 0V
TJ = 25°C, IF =21A
di/dt = 300A/μs
VSD
trr
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
–––
–––
–––
–––
20
1.0
30
51
V
ns
nC
Qrr
34
Notes:
ꢀ Repetitive rating; pulse width limited by max. junction temperature.
Pulse width ≤ 400μs; duty cycle ≤ 2%.
2
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IRF8308MPbF
Absolute Maximum Ratings
Max.
Parameter
Units
2.8
Power Dissipation
Power Dissipation
Power Dissipation
W
P
P
P
@TA = 25°C
@TA = 70°C
@TC = 25°C
D
D
D
P
J
1.8
89
270
Peak Soldering Temperature
Operating Junction and
°C
T
T
T
-40 to + 150
Storage Temperature Range
STG
Thermal Resistance
Parameter
Typ.
–––
12.5
20
Max.
45
Units
°C/W
W/°C
Rθ
Rθ
Rθ
Rθ
Rθ
Junction-to-Ambient
JA
Junction-to-Ambient
Junction-to-Ambient
Junction-to-Case
–––
–––
1.4
JA
JA
–––
1.0
JC
Junction-to-PCB Mounted
Linear Derating Factor
–––
J-PCB
0.022
100
10
D = 0.50
0.20
0.10
0.05
R1
R1
R2
R2
R3
R4
τι (sec)
Ri (°C/W)
0.02
0.01
1
R3
R4
τJ
0.99292 0.000074
τa
τJ
τ1
2.171681 0.007859
τ
τ
3τ3
τ4
2τ2
τ1
τ4
24.14602
17.69469
0.959
32.6
Ci= τi/Ri
0.1
SINGLE PULSE
( THERMAL RESPONSE )
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthja + Tc
0.01
1E-006
1E-005
0.0001
0.001
0.01
0.1
1
10
100
t
, Rectangular Pulse Duration (sec)
1
Fig 3. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient
Notes:
R is measured at TJ of approximately 90°C.
Used double sided cooling, mounting pad with large heatsink.
Mounted on minimum footprint full size board with metalized
back and with small clip heatsink.
θ
Mounted on minimum
footprint full size board with
metalized back and with small
clip heatsink (still air)
Mounted to a PCB with
small clip heatsink (still air)
Surface mounted on 1 in. square Cu
(still air).
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3
IRF8308MPbF
1000
1000
100
10
VGS
10V
VGS
10V
TOP
TOP
5.0V
4.5V
4.0V
3.5V
3.0V
2.8V
2.5V
5.0V
4.5V
4.0V
3.5V
3.0V
2.8V
2.5V
100
10
BOTTOM
BOTTOM
2.5V
2.5V
1
≤60μs PULSE WIDTH
Tj = 25°C
≤60μs PULSE WIDTH
Tj = 150°C
0.1
1
0.1
1
10
100
0.1
1
10
100
V
, Drain-to-Source Voltage (V)
V
, Drain-to-Source Voltage (V)
DS
DS
Fig 4. Typical Output Characteristics
Fig 5. Typical Output Characteristics
1000
2.0
1.5
1.0
0.5
I
= 27A
D
VGS = 4.5V
= 10V
V
100
10
1
GS
T
T
T
= 150°C
= 25°C
= -40°C
J
J
J
V
= 10V
DS
≤60μs PULSE WIDTH
0.1
1.5
2.0
2.5
3.0
3.5
4.0
-60 -40 -20
T
0
20 40 60 80 100 120 140 160
, Junction Temperature (°C)
V
, Gate-to-Source Voltage (V)
GS
J
Fig 7. Normalized On-Resistance vs. Temperature
Fig 6. Typical Transfer Characteristics
6
100000
10000
1000
V
C
= 0V,
f = 1 MHZ
GS
Vgs = 3.5V
Vgs = 4.0V
Vgs = 4.5V
Vgs = 5.0V
Vgs = 10V
= C + C , C SHORTED
iss
gs
gd ds
C
= C
rss
gd
5
C
= C + C
oss
ds
gd
4
3
2
C
iss
C
oss
C
rss
T
= 25°C
J
1
100
0
20
40
60
80
100
1
10
100
V
, Drain-to-Source Voltage (V)
DS
I , Drain Current (A)
D
Fig 9. Typical On-Resistance Vs.
Drain Current and Gate Voltage
Fig 8. Typical Capacitance vs.Drain-to-Source Voltage
4
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IRF8308MPbF
OPERATION IN THIS AREA
1000
100
10
1000.0
100.0
10.0
1.0
LIMITED BY R
(on)
DS
T
T
T
= 150°C
= 25°C
= -40°C
J
J
J
100μsec
10msec
1
T
= 25°C
A
1msec
10.0
Tj = 150°C
Single Pulse
V
= 0V
GS
1.0
0.1
0.1
0.1
1.0
100.0
0.2
0.4
0.6
0.8
1.2
V
, Drain-toSource Voltage (V)
DS
V
, Source-to-Drain Voltage (V)
SD
Fig 10. Typical Source-Drain Diode Forward Voltage
Fig11. Maximum Safe Operating Area
2.5
2.0
1.5
1.0
0.5
150
100
50
0
I
= 100μA
D
-75 -50 -25
0
25
50
75 100 125 150
25
50
75
100
125
150
T
, Junction Temperature ( °C )
J
T
, Case Temperature (°C)
C
Fig 13. Typical Threshold Voltage vs. Junction
Fig 12. Maximum Drain Current vs. Case Temperature
Temperature
50
I
D
TOP
BOTTOM
7.2A
8.4A
21A
40
30
20
10
0
25
50
75
100
125
150
Starting T , Junction Temperature (°C)
J
Fig 14. Maximum Avalanche Energy Vs. Drain Current
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5
IRF8308MPbF
Id
Vds
Vgs
L
VCC
DUT
0
1K
Vgs(th)
Qgs1
Qgs2
Qgd
Qgodr
Fig 15a. Gate Charge Test Circuit
Fig 15b. Gate Charge Waveform
V
(BR)DSS
15V
t
p
DRIVER
L
V
DS
D.U.T
AS
VGS
R
G
+
-
V
DD
I
A
20V
0.01
Ω
t
p
I
AS
Fig 16b. Unclamped Inductive Waveforms
Fig 16a. Unclamped Inductive Test Circuit
RD
VDS
VDS
90%
VGS
D.U.T.
RG
+
VDD
-
10%
VGS
VGS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
td(on)
td(off)
tr
tf
Fig 17a. Switching Time Test Circuit
Fig 17b. Switching Time Waveforms
6
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IRF8308MPbF
Driver Gate Drive
P.W.
P.W.
D =
D.U.T
Period
Period
+
*
=10V
V
GS
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
-
D.U.T. I Waveform
SD
+
-
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
-
+
D.U.T. V Waveform
DS
Diode Recovery
dv/dt
V
DD
VDD
• di/dt controlled by RG
Re-Applied
Voltage
RG
+
-
• Driver same type as D.U.T.
Body Diode
Inductor Current
Forward Drop
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
I
SD
Ripple
≤ 5%
* VGS = 5V for Logic Level Devices
Fig 18. Diode Reverse Recovery Test Circuit for N-Channel
HEXFET® Power MOSFETs
DirectFET Substrate and PCB Layout, MX Outline
(Medium Size Can, X-Designation).
Please see AN-1035 for DirectFET assembly details and stencil and substrate design recommendations
G = GATE
D = DRAIN
S = SOURCE
D
D
D
D
S
S
G
Note: For the most current drawing please refer to IR website at http://www.irf.com/package
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7
IRF8308MPbF
DirectFET™ Outline Dimension, MX Outline
(Medium Size Can, X-Designation)
Please see AN-1035 for DirectFET assembly details, stencil and substrate design recommendations
DIMENSIONS
METRIC
IMPERIAL
CODE MIN MAX
MIN
MAX
0.250
0.199
0.156
0.018
0.028
0.028
0.056
0.033
0.017
0.040
0.095
0.028
0.003
0.007
A
B
C
D
E
F
6.25 6.35
4.80 5.05
3.85 3.95
0.35 0.45
0.68 0.72
0.68 0.72
1.38 1.42
0.80 0.84
0.38 0.42
0.88 1.02
2.28 2.42
0.59 0.70
0.246
0.189
0.152
0.014
0.027
0.027
0.054
0.031
0.015
0.035
0.090
0.023
G
H
J
K
L
M
R
P
0.03 0.08 0.001
0.08 0.17 0.003
Dimensions are shown in
millimeters (inches)
DirectFET Part Marking
GATE MARKING
LOGO
PART NUMBER
BATCH NUMBER
DATE CODE
Line above the last character of
the date code indicates "Lead-Free"
8
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IRF8308MPbF
DirectFET Tape & Reel Dimension (Showing component orientation).
NOTE: Controlling dimensions in mm
Std reel quantity is 4800 parts. (ordered as IRF8308MTRPBF). For 1000 parts on 7"
reel, order IRF8308MTR1PBF
REEL DIMENSIONS
STANDARD OPTION (QTY 4800)
METRIC IMPERIAL
MIN MAX
TR1 OPTION (QTY 1000)
METRIC IMPERIAL
CODE
MIN
12.992
0.795
0.504
0.059
3.937
N.C
MAX
N.C
MIN
6.9
MAX
N.C
N.C
0.50
N.C
N.C
0.53
N.C
N.C
MIN
MAX
N.C
A
B
C
D
E
F
330.0
20.2
12.8
1.5
N.C
N.C
13.2
N.C
N.C
18.4
14.4
15.4
177.77
19.06
13.5
1.5
0.75
0.53
0.059
2.31
N.C
N.C
N.C
0.520
N.C
12.8
N.C
100.0
N.C
58.72
N.C
N.C
N.C
0.724
0.567
0.606
13.50
12.01
12.01
G
H
0.488
0.469
0.47
0.47
12.4
11.9
11.9
11.9
LOADED TAPE FEED DIRECTION
DIMENSIONS
METRIC
IMPERIAL
NOTE: CONTROLLING
DIMENSIONS IN MM
CODE
MIN
7.90
3.90
11.90
5.45
5.10
6.50
1.50
1.50
MIN
MAX
0.319
0.161
0.484
0.219
0.209
0.264
N.C
MAX
8.10
4.10
12.30
5.55
5.30
6.70
N.C
A
B
C
D
E
F
0.311
0.154
0.469
0.215
0.201
0.256
0.059
0.059
G
H
0.063
1.60
Data and specifications subject to change without notice.
This product has been designed and qualified for the Consumer market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.05/11
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9
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