IRF9383MTRPBF [INFINEON]
Power Field-Effect Transistor, 22A I(D), 30V, 0.0029ohm, 1-Element, P-Channel, Silicon, Metal-oxide Semiconductor FET, HALOGEN FREE AND ROHS COMPLIANT, ISOMETRIC-3;
| 型号： | IRF9383MTRPBF |
| 厂家： | 
Infineon |
| 描述： | Power Field-Effect Transistor, 22A I(D), 30V, 0.0029ohm, 1-Element, P-Channel, Silicon, Metal-oxide Semiconductor FET, HALOGEN FREE AND ROHS COMPLIANT, ISOMETRIC-3 开关 脉冲 晶体管 |
| 文件： | 总9页 (文件大小：278K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
IRF9383MPbF
DirectFET® P-Channel Power MOSFET
Typical values (unless otherwise specified)
Applications
VDSS
-30V max ±20V max
VGS
RDS(on)
RDS(on)
l Isolation Switch for Input Power or Battery Application
l High Side Switch for Inverter Applications
2.3mΩ@-10V 3.8mΩ@-4.5V
Qg tot
Qgd
Qgs2
Qrr
Qoss Vgs(th)
Features and Benefits
67nC
29nC
9.4nC 315nC 59nC
-1.8V
l Environmentaly Friendly Product
l RoHs Compliant Containing no Lead,
no Bromide and no Halogen
S
G
D
l Common-Drain P-Channel MOSFETs Provides
High Level of Integration and Very Low RDS(on)
D
S
DirectFET ISOMETRIC
MX
Applicable DirectFET Outline and Substrate Outline (see p.7,8 for details)
SQ
SX
ST
MQ
MX
MT
MP
MC
Description
The IRF9383MTRPbF combines the latest HEXFET® P-Channel Power MOSFET Silicon technology with the advanced DirectFET®
packaging to achieve the lowest on-state resistance in a package that has the footprint of a SO-8 and only 0.6 mm profile. The DirectFET®
package is compatible with existing layout geometries used in power applications, PCB assembly equipment and vapor phase, infra-red or
convection soldering techniques, when application note AN-1035 is followed regarding the manufacturing methods and processes. The
DirectFET package allows dual sided cooling to maximize thermal transfer in power systems, improving previous best thermal resistance
by 80%.
Orderable part number
Package Type
Standard Pack
Note
Form
Tape and Reel
Tape and Reel
Quantity
4800
1000
IRF9383MTRPbF
IRF9383MTR1PbF
DirectFET Medium Can
DirectFET Medium Can
"TR1" suffix EOL notice #264
Absolute Maximum Ratings
Max.
-30
Parameter
Units
VDS
Drain-to-Source Voltage
V
±20
-22
V
Gate-to-Source Voltage
GS
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
I
I
I
I
@ TA = 25°C
D
D
D
-17
@ TA = 70°C
@ TC = 25°C
A
-160
-180
DM
12
10
8
14.0
12.0
10.0
8.0
I = -18A
D
I
= -22A
D
V
V
V
= -24V
= -15V
= -6.0V
DS
DS
DS
6
6.0
T = 125°C
J
4
4.0
2
2.0
T
= 25°C
J
0
0.0
2
4
6
8
10 12 14 16 18 20
0
20 40 60 80 100 120 140 160 180
Total Gate Charge (nC)
Q
G
-V
Gate -to -Source Voltage (V)
GS,
Fig 2. Typical Total Gate Charge vs Gate-to-Source Voltage
Fig 1. Typical On-Resistance vs. Gate Voltage
Notes:
TC measured with thermocouple mounted to top (Drain) of part.
ꢀ Repetitive rating; pulse width limited by max. junction temperature.
Click on this section to link to the appropriate technical paper.
Click on this section to link to the DirectFET Website.
Surface mounted on 1 in. square Cu board, steady state.
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IRF9383MPbF
Static @ TJ = 25°C (unless otherwise specified)
Conditions
Parameter
Min. Typ. Max. Units
VGS = 0V, ID = -250µA
BVDSS
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
-30
–––
–––
V
Reference to 25°C, ID = -1.0mA
∆ΒVDSS/∆TJ
RDS(on)
––– 0.0159 –––
V/°C
V
V
GS = -10V, ID = -22A
GS = -4.5V, ID = -18A
–––
–––
-1.3
–––
–––
–––
–––
–––
56
2.3
3.8
2.9
4.8
mΩ
VGS(th)
Gate Threshold Voltage
-1.8
-5.9
–––
–––
–––
–––
–––
130
67
-2.4
V
VDS = VGS, ID = -150µA
VDS = -24V, VGS = 0V
V
/ T
∆
J
∆
Gate Threshold Voltage Coefficient
Drain-to-Source Leakage Current
––– mV/°C
GS(th)
IDSS
-1.0
µA
V
V
V
V
V
DS = -24V, VGS = 0V, TJ = 125°C
GS = -20V
-150
IGSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Forward Transconductance
Total Gate Charge
-100
nA
GS = 20V
100
DS = -10V, ID = -18A
DS = -15V, VGS = -10V, ID = -18A
gfs
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
S
Qg
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Qg
Total Gate Charge
Qgs1
Qgs2
Qgd
Qgodr
Qsw
Qoss
RG
VDS = -15V
Pre- Vth Gate-to-Source Charge
Post -Vth Gate-to-Source Charge
Gate-to-Drain Charge
Gate Charge Overdrive
Switch charge (Qgs2 + Qgd)
Output Charge
12
nC VGS = -4.5V
ID = -18A
9.4
29
16.6
38.4
59
See Fig.15
V
DS = -24V, VGS = 0V
nC
Gate Resistance
6.5
Ω
VDD = -15V, VGS = -4.5V
ID = -18A
td(on)
tr
td(off)
tf
Turn-On Delay Time
29
Rise Time
160
115
110
ns
RG = 1.8Ω
See Fig.17
Turn-Off Delay Time
Fall Time
V
V
GS = 0V
Ciss
Coss
Crss
Input Capacitance
––– 7305 –––
––– 1780 –––
––– 1030 –––
DS = -15V
pF
Output Capacitance
ƒ = 1.0KHz
Reverse Transfer Capacitance
Diode Characteristics
Conditions
Parameter
Min. Typ. Max. Units
D
S
IS
MOSFET symbol
Continuous Source Current
–––
–––
-114
showing the
(Body Diode)
A
G
ISM
integral reverse
p-n junction diode.
Pulsed Source Current
(Body Diode)
–––
–––
-180
TJ = 25°C, IS = -18A, VGS = 0V
VSD
trr
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
–––
–––
–––
–––
52
-1.2
78
V
TJ = 25°C, IF = -18A, ,VDD = -15V
di/dt = 500A/µs
ns
nC
Qrr
315
470
Notes:
Pulse width ≤ 400µs; duty cycle ≤ 2%.
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IRF9383MPbF
Absolute Maximum Ratings
Max.
2.1
Parameter
Units
P
P
P
@TA = 25°C
@TA = 70°C
@TC = 25°C
Power Dissipation
Power Dissipation
Power Dissipation
D
D
D
P
J
1.3
W
113
270
Peak Soldering Temperature
Operating Junction and
T
T
T
-40 to + 150
°C
Storage Temperature Range
STG
Thermal Resistance
Parameter
Typ.
–––
12.5
20
Max.
60
Units
°C/W
W/°C
RθJA
Junction-to-Ambient
Junction-to-Ambient
Junction-to-Ambient
RθJA
–––
–––
1.1
RθJA
RθJC
Junction-to-Case
,
–––
1.0
RθJ-PCB
Junction-to-PCB Mounted
Linear Derating Factor
–––
0.02
100
10
D = 0.50
0.20
0.10
0.05
0.02
0.01
1
R1
R1
R2
R2
R3
R3
R4
R4
Ri (°C/W) τi (sec)
τ
0.1
τ
J τJ
τ
2.7194
0.0138004
AτA
τ
1 τ1
τ
τ
23.1599 55.766563
10.2579 0.6520047
23.6469 7.7259631
2 τ2
3 τ3
4 τ4
0.01
0.001
0.0001
Ci= τi/Ri
Ci= τi/Ri
Notes:
SINGLE PULSE
( THERMAL RESPONSE )
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthja + Tc
1E-006
1E-005
0.0001
0.001
0.01
0.1
1
10
100
1000
t
, Rectangular Pulse Duration (sec)
1
Fig 3. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient
Notes:
Used double sided cooling, mounting pad with large heatsink.
Mounted on minimum footprint full size board with metalized
back and with small clip heatsink.
R is measured at TJ of approximately 90°C.
θ
Mounted on minimum footprint full size
board with metalized back and with small
clip heatsink (still air)
Surface mounted on 1 in. square Cu
board (still air).
Mounted to a PCB with small
clip heatsink (still air)
3
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IRF9383MPbF
1000
100
10
1000
100
10
VGS
-10V
VGS
-10V
TOP
TOP
-5.0V
-4.5V
-3.5V
-3.25V
-3.0V
-2.75V
-2.5V
-5.0V
-4.5V
-3.5V
-3.25V
-3.0V
-2.75V
-2.5V
BOTTOM
BOTTOM
1
-2.5V
0.1
0.01
-2.5V
60µs PULSE WIDTH
Tj = 25°C
≤
60µs PULSE WIDTH
Tj = 150°C
≤
1
0.1
1
10
100
0.1
1
10
100
-V , Drain-to-Source Voltage (V)
-V , Drain-to-Source Voltage (V)
DS
DS
Fig 4. Typical Output Characteristics
Fig 5. Typical Output Characteristics
1000
100
10
1.6
1.4
1.2
1.0
0.8
0.6
V
= -15V
I
= -22A
DS
D
≤
60µs PULSE WIDTH
V
= -10V
= -4.5V
GS
GS
V
T
T
T
= 150°C
= 25°C
= -40°C
J
J
J
1.0
1
2
3
4
5
-60 -40 -20
0
20 40 60 80 100 120140 160
T
J
, Junction Temperature (°C)
-V , Gate-to-Source Voltage (V)
GS
Fig 7. Normalized On-Resistance vs. Temperature
Fig 6. Typical Transfer Characteristics
100000
10000
1000
12
V
= 0V,
= C
f = 1 MHZ
GS
T
= 25°C
J
C
C
C
+ C , C
SHORTED
ds
iss
gs
gd
= C
Vgs = -3.5V
Vgs = -4.5V
Vgs = -5.0V
Vgs = -6.0V
Vgs = -8.0V
Vgs = -10V
Vgs = -12V
Vgs = -15V
rss
oss
gd
10
8
= C + C
ds
gd
C
iss
C
oss
6
C
rss
4
100
2
0
20 40 60 80 100 120 140 160 180
1
10
-V , Drain-to-Source Voltage (V)
100
DS
-I , Drain Current (A)
D
Fig 9. Typical On-Resistance vs.
Fig 8. Typical Capacitance vs.Drain-to-Source Voltage
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Drain Current and Gate Voltage
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IRF9383MPbF
1000
100
10
1000
100
10
OPERATION IN THIS AREA
LIMITED BY R (on)
DS
100µsec
1msec
T = 150°C
J
T
= 25°C
J
T = -40°C
J
10msec
1
DC
1
0.1
0.01
Tc = 25°C
Tj = 150°C
Single Pulse
V
= 0V
GS
0
0.01
0.1
1
10
100
0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2
-V , Drain-to-Source Voltage (V)
DS
-V , Source-to-Drain Voltage (V)
SD
Fig 10. Typical Source-Drain Diode Forward Voltage
Fig 11. Maximum Safe Operating Area
25
2.6
2.4
2.2
2.0
1.8
1.6
1.4
1.2
1.0
20
15
10
5
I
I
I
I
= -150µA
= -250µA
= -1.0mA
= -1.0A
D
D
D
D
0
-75 -50 -25
0
25 50 75 100 125 150
25
50
T
75
100
125
150
T
, Temperature ( °C )
J
, Case Temperature (°C)
C
Fig 13. Typical Threshold Voltage vs. Junction
Fig 12. Maximum Drain Current vs. Case Temperature
Temperature
2500
I
D
TOP
-1.6A
-2.3A
2000
1500
1000
500
0
BOTTOM -18A
25
50
75
100
125
150
Starting T , Junction Temperature (°C)
J
Fig 14. Maximum Avalanche Energy vs. Drain Current
5
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IRF9383MPbF
Id
Vds
Vgs
L
VCC
DUT
0
Vgs(th)
20K
Qgs1
Qgs2
Qgodr
Qgd
Fig 17a. Gate Charge Test Circuit
Fig 17b. Gate Charge Waveform
L
V
DS
I
AS
D.U.T
R
G
V
DD
I
A
AS
-VGS
DRIVER
0.01
Ω
t
p
t
p
V
(BR)DSS
15V
Fig 18b. Unclamped Inductive Waveforms
Fig 18a. Unclamped Inductive Test Circuit
RD
VDS
t
t
r
t
t
f
d(on)
d(off)
VGS
V
GS
D.U.T.
10%
RG
-
VDD
+
-VGS
90%
PulseWidth ≤ 1 µs
Duty Factor ≤ 0.1 %
V
DS
Fig 19a. Switching Time Test Circuit
Fig 19b. Switching Time Waveforms
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IRF9383MPbF
Driver Gate Drive
P.W.
P.W.
D =
Period
D.U.T *
Period
+
*
=10V
V
GS
CircuitLayoutConsiderations
• LowStrayInductance
• Ground Plane
• LowLeakageInductance
Current Transformer
-
D.U.T. I Waveform
SD
+
-
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
-
+
D.U.T. V Waveform
DS
Diode Recovery
dv/dt
V
DD
VDD
• di/dt controlled by RG
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
Re-Applied
Voltage
RG
+
-
Body Diode
InductorCurrent
Forward Drop
I
SD
Ripple ≤ 5%
* VGS = 5V for Logic Level Devices
* Reverse Polarity of D.U.T for P-Channel
Fig 20. Diode Reverse Recovery Test Circuitfor P-Channel HEXFET® Power MOSFETs
DirectFET® Board Footprint, MX Outline
(Medium Size Can, X-Designation).
Please see DirectFET application note AN-1035 for all details regarding the assembly of DirectFET.
This includes all recommendations for stencil and substrate designs.
G=GATE
D=DRAIN
S=SOURCE
D
D
D
D
S
S
G
7
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IRF9383MPbF
DirectFET® Outline Dimension, MX Outline
(Medium Size Can, X-Designation).
Please see DirectFET application note AN-1035 for all details regarding the assembly of DirectFET. This includes
all recommendations for stencil and substrate designs.
DIMENSIONS
METRIC
IMPERIAL
CODE MIN MAX
MIN
MAX
0.250
0.199
0.156
0.018
0.028
0.028
0.056
0.033
0.017
0.040
0.095
0.028
0.003
0.007
A
B
C
D
E
F
6.25
4.80
3.85
0.35
0.68
0.68
1.38
0.80
0.38
0.88
2.28
0.59
0.03
0.08
6.35
5.05
3.95
0.45
0.72
0.72
1.42
0.84
0.42
1.02
2.42
0.70
0.08
0.17
0.246
0.189
0.152
0.014
0.027
0.027
0.054
0.031
0.015
0.035
0.090
0.023
0.001
0.003
G
H
J
K
L
M
R
P
Dimensions are shown in
millimeters (inches)
DirectFET® Part Marking
GATE MARKING
LOGO
PART NUMBER
BATCH NUMBER
DATE CODE
Line above the last character of
the date code indicates "Lead-Free"
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
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IRF9383MPbF
DirectFET® Tape & Reel Dimension (Showing component orientation).
LOADED TAPE FEED DIRECTION
NOTE: Controlling dimensions in mm
Std reel quantity is 4800 parts. (ordered as IRF9383MTRPBF). For 1000 parts on 7"
reel, order IRF9383MTR1PBF
REEL DIMENSIONS
STANDARD OPTION (QTY4800)
DIMENSIONS
METRIC
IMPERIAL
NOTE: CONTROLLING
DIMENSIONS IN MM
METRIC
IMPERIAL
MIN
CODE
MAX
0.319
0.161
0.484
0.219
0.209
0.264
N.C
MIN
7.90
3.90
11.90
5.45
5.10
6.50
1.50
1.50
MAX
8.10
4.10
12.30
5.55
5.30
6.70
N.C
CODE
MIN
MAX
N.C
N.C
13.2
N.C
N.C
18.4
14.4
15.4
MIN
MAX
N.C
N.C
0.520
N.C
N.C
0.724
0.567
0.606
A
B
C
D
E
F
0.311
0.154
0.469
0.215
0.201
0.256
0.059
0.059
A
B
C
D
E
F
330
20.2
12.8
1.5
100.0
N.C
12.992
0.795
0.504
0.059
3.937
N.C
G
H
G
H
12.4
11.9
0.488
0.469
0.063
1.60
Qualification Information†
Consumer ††
(per JEDEC JESD47F††† guidelines)
MSL1
(per JEDEC J-STD-020D†††
Qualification level
Moisture Sensitivity Level
RoHS Compliant
DirectFET
)
Yes
Qualification standards can be found at International Rectifier’s web site
http://www.irf.com/product-info/reliability
Higher qualification ratings may be available should the user have such requirements.
Please contact your International Rectifier sales representative for further information:
http://www.irf.com/whoto-call/salesrep/
Applicable version of JEDEC standard at the time of product release.
Revision History
Date
Comments
Updated ordering information to reflect the End-Of-life (EOL) of the mini-reel option (EOL notice #264).
Updated data sheet with new IR corporate template.
•
•
•
2/17/2014
2/25/2014
Change MSL3 to MSL1, on page 9.
IR WORLD HEADQUARTERS: 101 N. Sepulveda Blvd., El Segundo, California 90245, USA
To contact International Rectifier, please visit http://www.irf.com/whoto-call/
9
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