IRF9Z24NL [INFINEON]
Power MOSFET(Vdss=-55V, Rds(on)=0.175ohm, Id=-12A); 功率MOSFET （ VDSS = -55V ， RDS（ON） = 0.175ohm ，ID = -12A ）
| 型号： | IRF9Z24NL |
| 厂家： | 
Infineon |
| 描述： | Power MOSFET(Vdss=-55V, Rds(on)=0.175ohm, Id=-12A) |
| 文件： | 总10页 (文件大小：170K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PD - 91742A
IRF9Z24NS/L
HEXFET® Power MOSFET
l
l
l
l
l
l
l
Advanced Process Technology
Surface Mount (IRF9Z24NS)
Low-profile through-hole (IRF9Z24NL)
175°C Operating Temperature
P-Channel
D
VDSS = -55V
RDS(on) = 0.175Ω
G
Fast Switching
Fully Avalanche Rated
ID = -12A
S
Description
Fifth Generation HEXFETs from International Rectifier
utilize advanced processing techniques to achieve
extremely low on-resistance per silicon area. This
benefit, combined with the fast switching speed and
ruggedizeddevicedesignthatHEXFETPowerMOSFETs
arewellknownfor,providesthedesignerwithanextremely
efficient and reliable device for use in a wide variety of
applications.
The D2Pak is a surface mount power package capable of
accommodating die sizes up to HEX-4. It provides the
highest power capability and the lowest possible on-
resistance in any existing surface mount package. The
D2Pak is suitable for high current applications because of
its low internal connection resistance and can dissipate
up to 2.0W in a typical surface mount application.
The through-hole version (IRF9Z24NL) is available for
low-profile applications.
2
T O -262
D
Pak
Absolute Maximum Ratings
Parameter
Max.
-12
Units
ID @ TC = 25°C
ID @ TC = 100°C
IDM
Continuous Drain Current, VGS @ -10Vꢀ
Continuous Drain Current, VGS @ -10Vꢀ
Pulsed Drain Current ꢀ
-8.5
-48
A
PD @TA = 25°C
PD @TC = 25°C
Power Dissipation
3.8
W
W
Power Dissipation
45
Linear Derating Factor
0.30
± 20
96
W/°C
V
VGS
EAS
IAR
Gate-to-Source Voltage
Single Pulse Avalanche Energyꢀ
Avalanche Current
mJ
A
-7.2
4.5
EAR
dv/dt
TJ
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt ꢀ
Operating Junction and
mJ
V/ns
-5.0
-55 to + 175
300 (1.6mm from case )
TSTG
Storage Temperature Range
Soldering Temperature, for 10 seconds
°C
Thermal Resistance
Parameter
Junction-to-Case
Junction-to-Ambient ( PCB Mounted,steady-state)**
Typ.
–––
Max.
3.3
40
Units
RθJC
°C/W
RθJA
–––
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1
7/16/99
IRF9Z24NS/L
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter
Min. Typ. Max. Units
-55 ––– –––
Conditions
V(BR)DSS
Drain-to-Source Breakdown Voltage
V
VGS = 0V, ID = -250µA
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient ––– -0.05 ––– V/°C Reference to 25°C, ID = -1mAꢀ
RDS(on)
VGS(th)
gfs
Static Drain-to-Source On-Resistance ––– ––– 0.175
Ω
V
S
VGS = -10V, ID = -7.2A
VDS = VGS, ID = -250µA
VDS = -25V, ID = -7.2A
VDS = -55V, VGS = 0V
VDS = -44V, VGS = 0V, TJ = 150°C
VGS = 20V
Gate Threshold Voltage
-2.0 ––– -4.0
2.5 ––– –––
Forward Transconductance
––– ––– -25
––– ––– -250
––– ––– 100
––– ––– -100
––– ––– 19
––– ––– 5.1
––– ––– 10
IDSS
Drain-to-Source Leakage Current
µA
nA
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
IGSS
VGS = -20V
Qg
ID = -7.2A
Qgs
Qgd
td(on)
tr
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
nC VDS = -44V
VGS = -10V, See Fig. 6 and 13 ꢀ
–––
–––
–––
–––
13 –––
55 –––
23 –––
37 –––
VDD = -28V
ID = -7.2A
ns
td(off)
tf
Turn-Off Delay Time
Fall Time
RG = 24Ω
RD = 3.7Ω, See Fig. 10 ꢀ
Between lead,
LS
Internal Source Inductance
nH
pF
7.5
and center of die contact
VGS = 0V
Ciss
Coss
Crss
Input Capacitance
––– 350 –––
––– 170 –––
Output Capacitance
VDS = -25V
Reverse Transfer Capacitance
–––
92 –––
ƒ = 1.0MHz, See Fig. 5ꢀ
Source-Drain Ratings and Characteristics
Parameter
Continuous Source Current
(Body Diode)
Min. Typ. Max. Units
Conditions
MOSFET symbol
showing the
D
IS
––– ––– -12
A
G
ISM
Pulsed Source Current
(Body Diode) •
integral reverse
––– –––
––– ––– -1.6
––– 47 71
––– 84 130
-48
p-n junction diode.
S
VSD
trr
Diode Forward Voltage
Reverse Recovery Time
Reverse RecoveryCharge
Forward Turn-On Time
V
TJ = 25°C, IS = -7.2A, VGS = 0V
ns
TJ = 25°C, IF = -7.2A
Qrr
ton
nC di/dt = -100A/µs ꢀ
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
Repetitive rating; pulse width limited by
Pulse width ≤ 300µs; duty cycle ≤ 2%.
ꢀUses IRF9Z24N data and test conditions
max. junction temperature. ( See fig. 11 )
Starting TJ = 25°C, L = 3.7mH
RG = 25Ω, IAS = -7.2A. (See Figure 12)
ISD ≤ -7.2A, di/dt ≤ -280A/µs, VDD ≤ V(BR)DSS
TJ ≤ 175°C
,
** When mounted on 1" square PCB (FR-4 or G-10 Material ).
For recommended footprint and soldering techniques refer to application note #AN-994.
2
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IRF9Z24NS/L
100
10
1
100
10
1
VGS
- 15V
- 10V
- 8.0V
- 7.0V
- 6.0V
- 5.5V
- 5.0V
VGS
- 15V
- 10V
- 8.0V
- 7.0V
- 6.0V
- 5.5V
- 5.0V
20µs PULSE W IDTH
TOP
TOP
T = 25°C
T
= 25°C
c
J
BOT TOM - 4.5V
BOTTOM - 4.5V
20µs PULSE W IDTH
-4.5V
-4.5V
T = 175°C
J
C
A
A
0.1
1
10
100
0.1
1
10
100
-V
D S
, Drain-to-Source Voltage (V)
-V
DS
, Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
2.0
1.5
1.0
0.5
0.0
100
I
= -12A
D
TJ = 25°C
TJ = 175°C
10
VDS = -25V
20µs PULSE W IDTH
V
= -10V
G S
1
A
10 A
-60 -40 -20
0
20
40
60
80 100 120 140 160 180
4
5
6
7
8
9
T
J
, Junction Tem perature (°C)
-VG S , Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance
Vs. Temperature
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3
IRF9Z24NS/L
20
16
12
8
700
I
= -7.2A
V
C
C
C
= 0V ,
f = 1M Hz
D
G S
iss
= C
= C
= C
+ C
+ C
,
C
SHORTED
gs
gd
ds
gd
ds
V
V
= -44V
= -28V
600
500
400
300
200
100
0
rss
oss
DS
DS
gd
C
C
iss
oss
C
rss
4
FO R TEST CIRCUIT
SEE FIGURE 13
0
A
A
0
5
10
15
20
25
1
10
100
V
, Drain-to-Source Voltage (V)
Q
, Total Gate Charge (nC)
G
DS
Fig 6. Typical Gate Charge Vs.
Fig 5. Typical Capacitance Vs.
Gate-to-Source Voltage
Drain-to-Source Voltage
100
100
10
1
OPE RA TIO N IN THIS AREA LIM ITED
BY R
DS(on)
10µs
T
= 150°C
J
10
T
= 25°C
J
100µs
1
1m s
T
T
= 25°C
= 175°C
C
J
V
= 0V
G S
1.6
10m s
Single Pulse
0.1
A
A
0.4
0.6
0.8
1.0
1.2
1.4
1.8
1
10
100
-V
, Drain-to-Source Voltage (V)
-V
, Source-to-Drain Voltage (V)
SD
DS
Fig 7. Typical Source-Drain Diode
Fig 8. Maximum Safe Operating Area
Forward Voltage
4
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IRF9Z24NS/L
12
RD
VDS
VGS
D.U.T.
9
RG
-
+
VDD
-10V
6
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 10a. Switching Time Test Circuit
3
t
t
r
t
t
f
d(on)
d(off)
V
GS
10%
0
A
25
50
75
100
125
150
175
T
, Case Tem perature (°C)
C
90%
Fig 9. Maximum Drain Current Vs.
V
DS
Case Temperature
Fig 10b. Switching Time Waveforms
10
D
=
0.50
0 .20
1
0.10
0.05
P
0.02
0 .01
D M
0.1
t
S IN G LE P U L S E
(T H E R M A L R E S P O N S E )
1
t
2
N otes:
1 . D uty factor D
=
t
/ t
1
Z
2
2. Peak
T
=
P
x
+ T
thJC C
D M
J
A
0.01
0.00001
0.0001
0.001
0.01
0.1
1
t
, Rectangular Pulse D uration (sec)
1
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRF9Z24NS/L
250
200
150
100
50
L
I
V
D
DS
TOP
-2.9A
-5.1A
-7.2A
BO TTO M
D.U.T
R
G
V
DD
A
I
AS
DRIVER
-20V
0.01
Ω
t
p
15V
Fig 12a. Unclamped Inductive Test Circuit
0
A
175
25
50
75
100
125
150
I
AS
Starting T , Junction Tem perature (°C)
J
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
t
p
V
(BR)DSS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.T.
50KΩ
Q
G
.2µF
12V
.3µF
-10V
-
V
+
DS
Q
Q
GD
GS
D.U.T.
V
GS
V
G
-3mA
I
I
D
G
Charge
Current Sampling Resistors
Fig 13a. Basic Gate Charge Waveform
Fig 13b. Gate Charge Test Circuit
6
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IRF9Z24NS/L
Peak Diode Recovery dv/dt Test Circuit
+
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
D.U.T*
-
+
-
-
+
RG
• dv/dt controlled by RG
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
+
-
VDD
VGS
* Reverse Polarity of D.U.T for P-Channel
Driver Gate Drive
P.W.
Period
Period
D =
P.W.
V
[
=10V
] ***
GS
D.U.T. I Waveform
SD
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. V Waveform
DS
Diode Recovery
dv/dt
V
[
[
DD
]
Re-Applied
Voltage
Body Diode
Forward Drop
Inductor Curent
I
]
SD
Ripple ≤ 5%
*** VGS = 5.0V for Logic Level and 3V Drive Devices
Fig 14. For P-Channel HEXFETS
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7
IRF9Z24NS/L
D2Pak Package Outline
10.54 (.415)
10.29 (.405)
10.16 (.400)
REF.
- B -
1.32 (.052)
4.69 (.185)
4.20 (.165)
1.40 (.055)
- A -
M AX.
1.22 (.048)
2
6.47 (.255)
6.18 (.243)
1.78 (.070)
1.27 (.050)
15.49 (.610)
14.73 (.580)
2.79 (.110)
2.29 (.090)
1
3
2.61 (.103)
2.32 (.091)
5.28 (.208)
4.78 (.188)
8.89 (.350)
REF.
1.40 (.055)
1.14 (.045)
1.39 (.055)
1.14 (.045)
3X
0.55 (.022)
0.46 (.018)
0.93 (.037)
0.69 (.027)
3X
5.08 (.200)
0.25 (.010)
M
B A M
M INIMUM RECOM MENDED FOOTPRINT
11.43 (.450)
8.89 (.350)
LEAD ASSIGNMENTS
1 - GATE
NO TES:
1
2
3
4
DIM ENSIONS AFTER SOLDER DIP.
17.78 (.700)
2 - DRAIN
3 - SOURCE
DIM ENSIONING & TOLERANCING PER ANSI Y14.5M , 1982.
CONTROLLING DIM ENSION : INCH.
HEATSINK & LEAD DIM ENSIONS DO NOT INCLUDE BURRS.
3.81 (.150)
2.54 (.100)
2.08 (.082)
2X
2X
Part Marking Information
D2Pak
A
INTERNATIONAL
RECTIFIER
LOGO
PART NUM BER
F530S
9246
1M
DATE CODE
(YYW W )
9B
ASSEM BLY
YY
=
YEAR
= W EEK
LOT CODE
W W
8
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IRF9Z24NS/L
Package Outline
TO-262 Outline
Part Marking Information
TO-262
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9
IRF9Z24NS/L
Tape & Reel Information
D2Pak
TRR
1 .6 0 (.063 )
1 .5 0 (.059 )
1.60 (.06 3)
1.50 (.05 9)
4.10 (.16 1)
3.90 (.15 3)
0.3 68 (.0145)
0.3 42 (.0135)
FEED DIRECTION
1.85 (.07 3)
11.60 (.457)
11.40 (.449)
1.65 (.06 5)
24.30 (.957)
23.90 (.941)
15.42 (.609)
15.22 (.601)
TRL
1.75 (.069)
1.25 (.049)
10.90 (.42 9)
10.70 (.42 1)
4.72 (.136)
4.52 (.178)
16.10 (.634)
15.90 (.626)
FEED DIRECTION
13.50 (.532)
12.80 (.504)
27.40 (1.079)
23.90 (.941)
4
330.00
(14.173)
M A X.
60.00 (2.362)
MIN .
30.40 (1.197)
M AX.
NO TES :
1. CO M FO RM S TO EIA-418.
2. CO N TR O LLIN G D IM ENSIO N : M ILLIM ET ER .
3. DIM ENSIO N MEASUR ED
26.40 (1.039)
24.40 (.961)
4
@ HU B.
3
4. INC LUD ES FLAN G E D ISTO R TIO N
@
O UTER EDG E.
WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331
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http://www.irf.com/
Data and specifications subject to change without notice.
7/99
10
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