IRFB31N20DPBF [INFINEON]
HEXFET Power MOSFET ( VDSS = 200V , RDS(on)max = 0.082ヘ , ID = 31A ); HEXFET功率MOSFET （ VDSS = 200V ， RDS （ ON）最大值= 0.082ヘ， ID = 31A ）
| 型号： | IRFB31N20DPBF |
| 厂家： | 
Infineon |
| 描述： | HEXFET Power MOSFET ( VDSS = 200V , RDS(on)max = 0.082ヘ , ID = 31A ) |
| 文件： | 总12页 (文件大小：292K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PD - 94946
IRFB31N20DPbF
IRFS31N20DPbF
IRFSL31N20DPbF
SMPS MOSFET
HEXFET® Power MOSFET
Applications
l High Frequency DC-DC converters
l Lead-Free
VDSS
RDS(on) max
ID
200V
0.082Ω
31A
Benefits
l Low Gate to Drain to Reduce Switching
Losses
l Fully Characterized Capacitance Including
Effective COSS to Simplify Design,(See
AN 1001)
l Fully Characterized Avalanche Voltage
and Current
D2Pak
TO-262
TO-220AB
IRFSL31N20DPbF
IRFB31N20DPbF IRFS31N20DPbF
Absolute Maximum Ratings
Parameter
Max.
31
21
Units
A
ID @ TC = 25°C
ID @ TC = 100°C
IDM
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
124
PD @TA = 25°C
PD @TC = 25°C
Power Dissipation
3.1
W
Power Dissipation
200
Linear Derating Factor
1.3
W/°C
V
VGS
dv/dt
TJ
Gate-to-Source Voltage
± 30
Peak Diode Recovery dv/dt
Operating Junction and
2.1
V/ns
-55 to + 175
TSTG
Storage Temperature Range
Soldering Temperature, for 10 seconds
Mounting torqe, 6-32 or M3 screw
°C
300 (1.6mm from case )
10 lbf•in (1.1N•m)
Applicable Off Line SMPS Topologies
l Telecom 48V Input DC/DC Active Clamp Reset Forward Converter
Notes through are on page 11
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1
3/1/04
IRFB/S/SL31N20DPbF
Static @ TJ = 25°C (unless otherwise specified)
Parameter
Min. Typ. Max. Units
200 ––– –––
Conditions
VGS = 0V, ID = 250µA
V(BR)DSS
Drain-to-Source Breakdown Voltage
V
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient ––– 0.25 ––– V/°C Reference to 25°C, ID = 1mA
RDS(on)
VGS(th)
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
––– ––– 0.082
3.0 ––– 5.5
Ω
V
VGS = 10V, ID = 18A
VDS = VGS, ID = 250µA
VDS = 200V, VGS = 0V
VDS = 160V, VGS = 0V, TJ = 150°C
VGS = 30V
––– ––– 25
––– ––– 250
––– ––– 100
––– ––– -100
µA
IDSS
IGSS
Drain-to-Source Leakage Current
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
nA
VGS = -30V
Dynamic @ TJ = 25°C (unless otherwise specified)
Parameter
Forward Transconductance
Total Gate Charge
Min. Typ. Max. Units
Conditions
VDS = 50V, ID = 18A
ID = 18A
gfs
17
––– –––
70 107
S
Qg
–––
–––
–––
–––
–––
–––
–––
Qgs
Qgd
td(on)
tr
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
18
33
23
65
nC VDS = 160V
VGS = 10V
VDD = 100V
16 –––
38 –––
26 –––
10 –––
ID = 18A
ns
td(off)
tf
Turn-Off Delay Time
Fall Time
RG = 2.5Ω
RD = 5.4Ω,
VGS = 0V
Ciss
Coss
Crss
Coss
Coss
Input Capacitance
––– 2370 –––
––– 390 –––
Output Capacitance
Reverse Transfer Capacitance
Output Capacitance
Output Capacitance
Effective Output Capacitance
VDS = 25V
–––
78 –––
pF
ƒ = 1.0MHz
––– 2860 –––
––– 150 –––
––– 170 –––
VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
VGS = 0V, VDS = 160V, ƒ = 1.0MHz
VGS = 0V, VDS = 0V to 160V ꢀ
C
oss eff.
Avalanche Characteristics
Parameter
Typ.
Max.
420
18
Units
mJ
A
EAS
IAR
Single Pulse Avalanche Energy
–––
–––
–––
Avalanche Current
EAR
Repetitive Avalanche Energy
20
mJ
Thermal Resistance
Parameter
Junction-to-Case
Case-to-Sink, Flat, Greased Surface
Junction-to-Ambient
Typ.
–––
0.50
–––
Max.
0.75
–––
62
Units
RθJC
RθCS
RθJA
RθJA
°C/W
Junction-to-Ambient
–––
40
Diode Characteristics
Parameter
Min. Typ. Max. Units
Conditions
D
S
IS
Continuous Source Current
(Body Diode)
MOSFET symbol
31
––– –––
showing the
A
G
ISM
Pulsed Source Current
(Body Diode)
integral reverse
p-n junction diode.
––– ––– 124
VSD
trr
Diode Forward Voltage
Reverse Recovery Time
Reverse RecoveryCharge
Forward Turn-On Time
––– ––– 1.3
––– 200 300
––– 1.7 2.6
V
TJ = 25°C, IS = 18A, VGS = 0V
ns
TJ = 25°C, IF = 18A
Qrr
ton
µC di/dt = 100A/µs
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
2
www.irf.com
IRFB/S/SL31N20DPbF
1000
100
10
1000
VGS
15V
12V
10V
8.0V
7.0V
6.5V
6.0V
VGS
15V
12V
10V
8.0V
7.0V
6.5V
6.0V
TOP
TOP
BOTTOM5.5V
BOTTOM5.5V
100
10
1
1
5.5V
20µs PULSE WIDTH
°
20µs PULSE WIDTH
°
5.5V
T = 175 C
J
T = 25 C
J
0.1
0.1
0.1
1
10
100
1
10
100
V
, Drain-to-Source Voltage (V)
V
, Drain-to-Source Voltage (V)
DS
DS
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
3.0
1000
30A
=
I
D
2.5
2.0
1.5
1.0
0.5
0.0
100
10
1
°
T = 175 C
J
°
T = 25 C
J
V
= 50V
DS
20µs PULSE WIDTH
V
=10V
GS
0.1
5
6
7
8
9
10
11
-60 -40 -20
0
20 40 60 80 100 120 140 160 180
°
V
, Gate-to-Source Voltage (V)
T , Junction Temperature ( C)
J
GS
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance
Vs. Temperature
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3
IRFB/S/SL31N20DPbF
20
16
12
8
100000
I
D
= 18A
V
C
= 0V,
f = 1 MHZ
GS
V
V
V
= 160V
= 100V
= 40V
= C + C
,
C
ds
SHORTED
DS
DS
DS
iss
gs
gd
C
= C
rss
gd
C
= C + C
oss
ds
gd
10000
1000
100
Ciss
Coss
Crss
4
FOR TEST CIRCUIT
SEE FIGURE 13
10
0
1
10
100
1000
0
20
40
60
80
100
Q , Total Gate Charge (nC)
G
V
, Drain-to-Source Voltage (V)
DS
Fig 6. Typical Gate Charge Vs.
Fig 5. Typical Capacitance Vs.
Gate-to-Source Voltage
Drain-to-Source Voltage
1000
1000
100
10
OPERATION IN THIS AREA LIMITED
BY R
DS(on)
100
10
1
10us
°
T = 175 C
J
100us
1ms
°
T = 25 C
J
°
T = 25 C
C
10ms
°
T = 175 C
Single Pulse
J
V
= 0 V
GS
1.0
1
0.1
0.2
1
10
100
1000
0.4
0.6
0.8
1.2
V
, Drain-to-Source Voltage (V)
V
,Source-to-Drain Voltage (V)
DS
SD
Fig 8. Maximum Safe Operating Area
Fig 7. Typical Source-Drain Diode
Forward Voltage
4
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IRFB/S/SL31N20DPbF
RD
30
25
20
15
10
5
VDS
VGS
DꢀUꢀTꢀ
RG
+VDD
-
10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 10a. Switching Time Test Circuit
V
DS
90%
0
25
50
75
100
125
150
175
°
T , Case Temperature ( C)
C
10%
V
GS
t
t
r
t
t
f
Fig 9. Maximum Drain Current Vs.
d(on)
d(off)
Case Temperature
Fig 10b. Switching Time Waveforms
1
D = 0.50
0.20
0.1
0.10
0.05
P
2
DM
t
1
0.02
0.01
t
2
SINGLE PULSE
(THERMAL RESPONSE)
Notes:
1. Duty factor D =
t / t
1
2. Peak T =P
x Z
+ T
C
J
DM
thJC
0.01
0.00001
0.0001
0.001
0.01
0.1
1
t , Rectangular Pulse Duration (sec)
1
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRFB/S/SL31N20DPbF
1000
800
600
400
200
0
15V
I
D
TOP
7.3A
15A
BOTTOM 18A
DRIVER
+
L
V
DS
D.U.T
AS
R
G
V
DD
-
I
A
20V
0.01
Ω
t
p
Fig 12a. Unclamped Inductive Test Circuit
V
(BR)DSS
t
p
25
50
75
100
125
150
175
°
Starting T , Junction Temperature ( C)
J
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
I
AS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.T.
Q
G
50KΩ
.2µF
12V
10 V
.3µF
Q
Q
GD
GS
+
V
DS
D.U.T.
-
V
GS
V
G
3mA
I
I
D
G
Charge
Current Sampling Resistors
Fig 13a. Basic Gate Charge Waveform
Fig 13b. Gate Charge Test Circuit
6
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IRFB/S/SL31N20DPbF
Peak Diode Recovery dv/dt Test Circuit
+
-
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
DꢀUꢀT
+
-
-
+
RG
• dv/dt controlled by RG
+
-
• Driver same type as DꢀUꢀTꢀ
• ISD controlled by Duty Factor "D"
• DꢀUꢀTꢀ - Device Under Test
VDD
Driver Gate Drive
P.W.
P.W.
Period
Period
D =
V
=10V
*
GS
D.U.T. I Waveform
SD
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. V Waveform
DS
Diode Recovery
dv/dt
V
DD
Re-Applied
Voltage
Body Diode
Forward Drop
Inductor Curent
I
SD
Ripple ≤ 5%
* VGS = 5V for Logic Level Devices
Fig 14. For N-Channel HEXFET® Power MOSFETs
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7
IRFB/S/SL31N20DPbF
TO-220AB Package Outline
Dimensions are shown in millimeters (inches)
10.54 (.415)
3.78 (.149)
- B -
10.29 (.405)
2.87 (.113)
2.62 (.103)
4.69 (.185)
4.20 (.165)
3.54 (.139)
1.32 (.052)
1.22 (.048)
- A -
6.47 (.255)
6.10 (.240)
4
15.24 (.600)
14.84 (.584)
LEAD ASSIGNMENTS
1.15 (.045)
MIN
HEXFET
IGBTs, CoPACK
2- DRAIN
3- SOURCE
1
2
3
1- GATE
1- GATE
2- COLLECTOR
3- EMITTER
4- COLLECTOR
4- DRAIN
14.09 (.555)
13.47 (.530)
4.06 (.160)
3.55 (.140)
0.93 (.037)
0.69 (.027)
0.55 (.022)
0.46 (.018)
3X
3X
1.40 (.055)
3X
1.15 (.045)
0.36 (.014)
M
B A M
2.92 (.115)
2.64 (.104)
2.54 (.100)
2X
NOTES:
1
2
DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982.
CONTROLLING DIMENSION : INCH
3
4
OUTLINE CONFORMS TO JEDEC OUTLINE TO-220AB.
HEATSINK & LEAD MEASUREMENTS DO NOT INCLUDE BURRS.
TO-220AB Part Marking Information
EXAMPLE: T HIS IS AN IRF1010
LOT CODE 1789
PART NUMBER
AS S EMB LED ON WW 19, 1997
IN THE AS S EMBLY LINE "C"
INTE RNAT IONAL
RECT IFIER
LOGO
Note: "P" in assembly line
position indicates "Lead-Free"
DAT E CODE
YEAR 7 = 1997
WEEK 19
AS S EMBLY
LOT CODE
LINE C
8
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IRFB/S/SL31N20DPbF
D2Pak Package Outline
Dimensions are shown in millimeters (inches)
D2Pak Part Marking Information (Lead-Free)
T H IS IS AN IR F 530S WIT H
P AR T N U MB E R
L OT CODE 8024
IN T E R N AT IONAL
R E CT IF IE R
L OGO
AS S E MB L E D ON WW 02, 2000
IN T H E AS S E MB L Y L INE "L "
F 530S
DAT E CODE
YE AR 0 = 2000
WE E K 02
N ote: "P " in as s embly line
pos ition indicates "L ead-F ree"
AS S E MB L Y
L OT CODE
L INE
L
OR
P AR T N U MB E R
IN T E R N AT ION AL
R E CT IF IE R
L OGO
F 530S
D AT E COD E
P
=
D E S IGN AT E S L E AD -F R E E
P R OD U CT (OP T ION AL )
AS S E MB L Y
L OT COD E
YE AR
W E E K 02
A = AS S E MB L Y S IT E COD E
0 = 2000
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9
IRFB/S/SL31N20DPbF
TO-262 Package Outline
IGBT
1- GATE
2- COLLECTOR
3- EMITTER
TO-262 Part Marking Information
E XAMPLE : THIS IS AN IRL3103L
LOT CODE 1789
PART NUMBER
INTERNATIONAL
RECTIFIER
ASSEMBLED ON WW 19, 1997
IN THE ASSEMBLY LINE "C"
LOGO
DATE CODE
YEAR 7 = 1997
WEEK 19
Note: "P" in assembly line
pos ition indicates "Lead-Free"
AS S E MBL Y
LOT CODE
LINE C
OR
PART NUMBER
INTERNATIONAL
RECTIFIER
LOGO
DATE CODE
P = DESIGNATES LEAD-FREE
PRODUCT (OPTIONAL)
YEAR 7 = 1997
ASSEMBLY
LOT CODE
WE EK 19
A= ASSEMBLY SITE CODE
10
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IRFB/S/SL31N20DPbF
D2Pak Tape & Reel Infomation
Dimensions are shown in millimeters (inches)
TRR
1.60 (.063)
1.50 (.059)
1.60 (.063)
4.10 (.161)
3.90 (.153)
1.50 (.059)
0.368 (.0145)
0.342 (.0135)
11.60 (.457)
11.40 (.449)
FEED DIRECTION
TRL
1.85 (.073)
1.65 (.065)
24.30 (.957)
23.90 (.941)
15.42 (.609)
15.22 (.601)
1.75 (.069)
1.25 (.049)
10.90 (.429)
10.70 (.421)
4.72 (.136)
4.52 (.178)
16.10 (.634)
15.90 (.626)
FEED DIRECTION
13.50 (.532)
12.80 (.504)
27.40 (1.079)
23.90 (.941)
4
330.00
(14.173)
MAX.
60.00 (2.362)
MIN.
30.40 (1.197)
MAX.
NOTES :
1. COMFORMS TO EIA-418.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION MEASURED @ HUB.
4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
26.40 (1.039)
24.40 (.961)
4
3
Notes:
Repetitive rating; pulse width limited by
Pulse width ≤ 300µs; duty cycle ≤ 2%.
max. junction temperature.
ꢀ Coss eff. is a fixed capacitance that gives the same charging time
Starting TJ = 25°C, L = 3.8mH
R
G = 25Ω, IAS = 18A.
as Coss while VDS is rising from 0 to 80% VDSS
ISD ≤ 18A, di/dt ≤ 110A/µs, VDD ≤ V(BR)DSS
TJ ≤ 175°C
,
This is only applied to TO-220AB package
This is applied to D2Pak, when mounted on 1" square PCB ( FR-4 or G-10 Material ).
For recommended footprint and soldering techniques refer to application note #AN-994.
Data and specifications subject to change without notice.
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TAC Fax: (310) 252-7903
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Note: For the most current drawings please refer to the IR website at:
http://www.irf.com/package/
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