IRFE120_07 [INFINEON]

REPETITIVE AVALANCHE AND dv/dt RATED HEXFET TRANSISTORS SURFACE MOUNT (LCC-18); 重复性雪崩和dv / dt评分HEXFET晶体管表面贴装（ LCC- 18 ）


型号：	IRFE120_07
厂家：	Infineon
描述：	REPETITIVE AVALANCHE AND dv/dt RATED HEXFET TRANSISTORS SURFACE MOUNT (LCC-18) 重复性雪崩和dv / dt评分HEXFET晶体管表面贴装（ LCC- 18 ）晶体晶体管局域网
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PD - 93983A

REPETITIVE AVALANCHE AND dv/dt RATED

HEXFET^®TRANSISTORS

SURFACE MOUNT (LCC-18)

IRFE120

JANTX2N6788U

REF:MIL-PRF-19500/555

100V, N-CHANNEL

Product Summary

Part Number BVDSS

RDS(on)

IRFE120 100V

0.30Ω

4.5A

LCC-18

The leadless chip carrier (LCC) package represents the

logical next step in the continual evolution of surface

mount technology. Desinged to be a close replacement

for the TO-39 package, the LCC will give designers the

extra flexibility they need to increase circuit board density.

International Rectifier has engineered the LCC package

to meet the specific needs of the power market by

increasing the size of the bottom source pad, thereby

enhancing the thermal and electrical performance. The

lid of the package is grounded to the source to reduce

RF interference.

Features:

Surface Mount

Small Footprint

Alternative to TO-39 Package

Hermetically Sealed

Dynamic dv/dt Rating

Avalanche Energy Rating

Simple Drive Requirements

Light Weight

Absolute Maximum Ratings

Parameter

Units

@ V

= 10V, T = 25°C

Continuous Drain Current

4.5

2.8

@ V

= 10V, T = 100°C Continuous Drain Current

Pulsed Drain Current

Max. Power Dissipation

@ T = 25°C

W/°C

Linear Derating Factor

0.11

±20

Gate-to-Source Voltage

Single Pulse Avalanche Energy

Avalanche Current

0.242

2.2

Repetitive Avalanche Energy

Peak Diode Recovery dv/dt

Operating Junction

1.4

V/ns

dv/dt

5.5

-55 to 150

Storage Temperature Range

STG

Pckg. Mounting Surface Temp.

Weight

300 (for 5s)

0.42(typical)

For footnotes refer to the last page

www.irf.com

08/03/07

IRFE120, JANTX2N6788U

Electrical Characteristics @ Tj = 25°C (Unless Otherwise Specified)

Parameter

Min Typ Max Units

Test Conditions

DSS

Drain-to-Source Breakdown Voltage

100

—

= 0V, I = 1.0mA

Reference to 25°C, I = 1.0mA

∆BV

/∆T

Temperature Coefficient of Breakdown

Voltage

—

0.10

—

V/°C

DSS

Static Drain-to-Source On-State

Resistance

Gate Threshold Voltage

Forward Transconductance

Zero Gate Voltage Drain Current

—

2.0

1.5

—

0.30

0.35

4.0

—

250

= 10V, I = 2.8A

DS(on)

Ω

= 10V, I = 4.5A

= V , I = 250µA

GS(th)

> 15V, I

= 2.8A

= 80V, V = 0V

DSS

µA

—

= 80V

= 0V, T = 125°C

Gate-to-Source Leakage Forward

Gate-to-Source Leakage Reverse

Total Gate Charge

Gate-to-Source Charge

Gate-to-Drain (‘Miller’) Charge

Turn-On Delay Time

Rise Time

Turn-Off Delay Time

Fall Time

Total Inductance

—

6.1

100

-100

4.0

9.0

—

= 20V

GSS

= -20V

GSS

= 10V, I = 4.5A

GS D

= 50V

= 35V, I = 4.5A

d(on)

d(off)

= 10V, R = 7.5Ω

GS G

S +

Measured from the center of

drain pad to center of source

pad

rss

Input Capacitance

Output Capacitance

Reverse Transfer Capacitance

—

350

150

= 0V, V = 25V

f = 1.0MHz

iss

oss

—

Source-Drain Diode Ratings and Characteristics

Parameter

Min Typ Max Units

Test Conditions

Continuous Source Current (Body Diode)

Pulse Source Current (Body Diode)

Diode Forward Voltage

Reverse Recovery Time

Reverse Recovery Charge

—

4.5

1.8

240

2.0

µC

T = 25°C, I = 4.5A, V

= 0V

T = 25°C, I = 4.5A, di/dt ≤ 100A/µs

≤ 50V

Forward Turn-On Time

Intrinsic turn-on time is negligible. Turn-on speed is substantially controlled by L + L .

S D

Thermal Resistance

Parameter

Min Typ Max Units

Test Conditions

Junction to Case

Junction to PC Board

—

8.93

thJC

thJ-PCB

°C/W

Soldered to a copper clad PC board

Note: Corresponding Spice and Saber models are available on International Rectifier Website.

For footnotes refer to the last page

www.irf.com

IRFE120, JANTX2N6788U

Fig 1. Typical Output Characteristics

Fig 2. Typical Output Characteristics

Fig 3. Typical Transfer Characteristics

Fig 4. Normalized On-Resistance

Vs.Temperature

www.irf.com

IRFE120, JANTX2N6788U

13 a & b

Fig 6. Typical Gate Charge Vs.

Fig 5. Typical Capacitance Vs.

Gate-to-SourceVoltage

Drain-to-SourceVoltage

Fig 8. Maximum Safe Operating Area

Fig 7. Typical Source-Drain Diode

ForwardVoltage

www.irf.com

IRFE120, JANTX2N6788U

R_D

V_DS

V_GS

D.U.T.

R_G

⁺V_DD

V_GS

PulseWidth ≤ 1 µs

Duty Factor ≤ 0.1 %

Fig 10a. Switching Time Test Circuit

90%

10%

Fig 9. Maximum Drain Current Vs.

d(on)

d(off)

CaseTemperature

Fig 10b. Switching Time Waveforms

Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case

www.irf.com

IRFE120, JANTX2N6788U

15V

DRIVER

D.U.T

20V

0.01

Ω

Fig 12a. Unclamped Inductive Test Circuit

(BR)DSS

Fig 12c. Maximum Avalanche Energy

Vs. DrainCurrent

Current Regulator

Same Type as D.U.T.

Fig 12b. Unclamped Inductive Waveforms

50KΩ

.2µF

12V

.3µF

10 V

D.U.T.

3mA

Charge

Current Sampling Resistors

Fig 13b. Gate Charge Test Circuit

Fig 13a. Basic Gate Charge Waveform

www.irf.com

IRFE120, JANTX2N6788U

Foot Notes:

≤ 4.5A, di/dt ≤ 110A/µs, V ≤ 100V, T ≤ 150°C

Repetitive Rating; Pulse width limited by

maximum junction temperature.

Suggested RG =7.5 Ω

Pulse width ≤ 300 µs; Duty Cycle ≤ 2%

= 25V, starting T = 25°C,

Peak I = 2.2A, L = 100µH

Case Outline and Dimensions — LCC-18

IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105

IR LEOMINSTER : 205 Crawford St., Leominster, Massachusetts 01453, USA Tel: (978) 534-5776

TAC Fax: (310) 252-7903

Visit us at www.irf.com for sales contact information.

Data and specifications subject to change without notice. 08/2007

www.irf.com

IRFE120_07 [INFINEON]

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