IRFE130 [INFINEON]

REPETITIVE AVALANCHE AND dv/dt RATED HEXFET TRANSISTORS SURFACE MOUNT (LCC-18); 重复性雪崩和dv / dt评分HEXFET晶体管表面贴装（ LCC- 18 ）


型号：	IRFE130
厂家：	Infineon
描述：	REPETITIVE AVALANCHE AND dv/dt RATED HEXFET TRANSISTORS SURFACE MOUNT (LCC-18) 重复性雪崩和dv / dt评分HEXFET晶体管表面贴装（ LCC- 18 ）晶体晶体管局域网
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PD - 91666B

IRFE130

JANTX2N6796U

JANTXV2N6796U

REPETITIVEAVALANCHEANDdv/dtRATED

HEXFET TRANSISTORS

SURFACE MOUNT (LCC-18)

[REF:MIL-PRF-19500/557]

100V, N-CHANNEL

Product Summary

Part Number

BVDSS

RDS(on)

IRFE130

100V

0.18Ω

8.0A

LCC-18

The leadless chip carrier (LCC) package represents the

logical next step in the continual evolution of surface

mount technology. Desinged to be a close replacement

for the TO-39 package, the LCC will give designers the

extra flexibility they need to increase circuit board den-

sity. International Rectifier has engineered the LCC pack-

age to meet the specific needs of the power market by

increasing the size of the bottom source pad, thereby

enhancing the thermal and electrical performance. The

lid of the package is grounded to the source to reduce

RF interference.

Features:

Surface Mount

Small Footprint

Alternative to TO-39 Package

Hermetically Sealed

Dynamic dv/dt Rating

Avalanche Energy Rating

Simple Drive Requirements

Light Weight

Absolute Maximum Ratings

Parameter

Units

@ V

= 10V, T = 25°C

Continuous Drain Current

8.0

5.0

0.17

±20

134

= 10V, T = 100°C Continuous Drain Current

Pulsed Drain Current ➀

Max. Power Dissipation

Linear Derating Factor

@ T = 25°C

W/°C

V/ns

Gate-to-Source Voltage

Single Pulse Avalanche Energy ➀

Avalanche Current ➀

Repetitive Avalanche Energy ➀

Peak Diode Recovery dv/dt ➀

Operating Junction

dv/dt

8.3

-55 to 150

Storage Temperature Range

^oC

STG

Pckg. Mounting Surface Temp.

Weight

300 (for 5 S)

0.42(typical)

For footnotes refer to the last page

www.irf.com

1/17/01

IRFE130

Electrical Characteristics @ Tj = 25°C (Unless Otherwise Specified)

Parameter

Min Typ Max Units

Test Conditions

DSS

Drain-to-Source Breakdown Voltage

100

—

= 0V, I = 1.0mA

Reference to 25°C, I = 1.0mA

∆BV

/∆T

Temperature Coefficient of Breakdown

0.11

V/°C

DSS

Voltage

Static Drain-to-Source On-State

Resistance

Gate Threshold Voltage

Forward Transconductance

Zero Gate Voltage Drain Current

—

2.0

3.0

—

0.18

0.207

4.0

—

= 10V, I =5.0A➀

DS(on)

GS D

Ω

=10V, I =8.0A ➀

S ( )

= V , I =250µA

GS(th)

Ω

DSS

> 15V, I

=5.0A➀

=80V, V =0V

µA

—

250

=80V

= 0V, T = 125°C

Gate-to-Source Leakage Forward

Gate-to-Source Leakage Reverse

Total Gate Charge

Gate-to-Source Charge

Gate-to-Drain (‘Miller’) Charge

Turn-On Delay Time

Rise Time

Turn-Off Delay Time

Fall Time

Total Inductance

—

6.1

100

-100

6.5

—

=20V

GSS

=-20V

GSS

=10V, ID 8.0A

=50V

d(on)

=50V, I =8.0A,

R =7.5Ω

n s

d(off)

S +

Measured from the center of

drain pad to center of source

pad

Input Capacitance

Output Capacitance

Reverse Transfer Capacitance

—

660

260

= 0V, V =25V

f = 1.0MHz

iss

oss

rss

GS DS

—

Source-Drain Diode Ratings and Characteristics

Parameter

Min Typ Max Units

Test Conditions

Continuous Source Current (Body Diode)

Pulse Source Current (Body Diode) ➀

—

8.0

Diode Forward Voltage

Reverse Recovery Time

Reverse Recovery Charge

—

1.5

300

970

µc

T = 25°C, I =8.0A, V

= 0V ➀

T = 25°C, I =8.0A, di/dt ≤100A/µs

≤50V ➀

Forward Turn-On Time

Intrinsic turn-on time is negligible. Turn-on speed is substantially controlled by L + L .

S D

Thermal Resistance

Parameter

Min Typ Max Units

Test Conditions

Junction to Case

Junction to PC Board

—

5.0

19" "

thJC

thJ-PCB

°C/W

Soldered to a copper clad PC board

For footnotes refer to the last page

www.irf.com

IRFE130

100

VGS

15V

VGS

15V

TOP

10V

8.0V

7.0V

6.0V

5.5V

5.0V

8.0V

7.0V

6.0V

5.5V

5.0V

BOTTOM 4.5V

BOTTOM4.5V

4.5V

20µs PULSE WIDTH

T = 150 C

T = 25 C

0.1

100

0.1

100

, Drain-to-Source Voltage (V)

Fig 1. Typical Output Characteristics

Fig 2. Typical Output Characteristics

2.5

2.0

1.5

1.0

0.5

0.0

100

8.0 A

7.4A

I =

T = 25 C

T = 150 C

= 50V

20µs PULSE WIDTH

=10V

0.1

-60 -40 -20

20 40 60 80 100 120 140 160

, Gate-to-Source Voltage (V)

T , Junction Temperatu(reC)

Fig 3. Typical Transfer Characteristics

Fig 4. Normalized On-Resistance

Vs. Temperature

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IRFE130

1200

1000

800

= 0V,

f = 1MHz

8.0A

= 7.4 A

= 80V

= 50V

= 20V

= C + C

SHORTED

iss

gd , ds

= C

rss

= C + C

oss

iss

600

oss

400

200

rss

FOR TEST CIRCUIT

SEE FIGURE 13

100

Q , Total Gate Charge (nC)

, Drain-to-Source Voltage (V)

Fig 6. Typical Gate Charge Vs.

Fig 5. Typical Capacitance Vs.

Gate-to-Source Voltage

Drain-to-Source Voltage

1000

100

OPERATION IN THIS AREA LIMITED

BY R

DS(on)

T = 25 C

T = 150 C

10us

100us

1ms

10ms

= 25 C

= 150 C

Single Pulse

= 0 V

0.1

100

1000

0.2

0.8

1.4

2.0

2.6

, Drain-to-Source Voltage (V)

,Source-to-Drain Voltage (V)

Fig 8. Maximum Safe Operating Area

Fig 7. Typical Source-Drain Diode

Forward Voltage

www.irf.com

IRFE130

10.0

8.0

6.0

4.0

2.0

0.0

R_D

V_DS

V_GS

10V

D.U.T.

R_G

⁺V_DD

Pulse Width ≤ 1µs

Duty Factor ≤ 0.1 %

Fig 10a. Switching Time Test Circuit

90%

100

125

150

T , Case Temperature ( C)

10%

Fig 9. Maximum Drain Current Vs.

d(on)

d(off)

Case Temperature

Fig 10b. Switching Time Waveforms

100

D = 0.50

0.20

0.10

0.05

0.02

0.01

0.1

0.01

SINGLE PULSE

(THERMAL RESPONSE)

Notes:

1. Duty factor D =

t / t

2. Peak T = P

x Z

+ T

thJC

0.00001

0.0001

0.001

0.01

0.1

t , Rectangular Pulse Duration (sec)

Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case

www.irf.com

IRFE130

400

300

200

100

TOP

3.3A

5.0A

15V

BOTTOM 8.0A

DRIVER

D.U.T

20V

10V

0.01

Ω

Fig 12a. Unclamped Inductive Test Circuit

100

125

150

Starting T , Junction Temperature ( C)

(BR)DSS

Fig 12c. Maximum Avalanche Energy

Vs. Drain Current

Current Regulator

Fig 12b. Unclamped Inductive Waveforms

Same Type as D.U.T.

50KΩ

.2µF

12V

.3µF

10 V

D.U.T.

3mA

Charge

Current Sampling Resistors

Fig 13b. Gate Charge Test Circuit

Fig 13a. Basic Gate Charge Waveform

www.irf.com

IRFE130

Foot Notes:

➀➀ I

≤ 8.0A, di/dt ≤480A/µs,

≤ 100V, T ≤ 150°C

➀➀ Repetitive Rating; Pulse width limited by

maximum junction temperature.

Suggested RG =7.5 Ω

➀➀➀➀➀Pulse width ≤ 300 µs; Duty Cycle ≤ 2%

➀➀➀V

= 50V, starting T = 25°C,

Peak I =8.0A,

Case Outline and Dimensions — LCC-18

IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105

IR EUROPEAN REGIONAL CENTRE: 439/445 Godstone Rd, Whyteleafe, Surrey CR3 OBL, UK Tel: ++ 44 (0)20 8645 8000

IR CANADA: 15 Lincoln Court, Brampton, Ontario L6T3Z2, Tel: (905) 453 2200

IR GERMANY: Saalburgstrasse 157, 61350 Bad Homburg Tel: ++ 49 (0) 6172 96590

IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: ++ 39 011 451 0111

IR JAPAN: K&H Bldg., 2F, 30-4 Nishi-Ikebukuro 3-Chome, Toshima-Ku, Tokyo 171 Tel: 81 (0)3 3983 0086

IR SOUTHEAST ASIA: 1 Kim Seng Promenade, Great World City West Tower, 13-11, Singapore 237994 Tel: ++ 65 (0)838 4630

IR TAIWAN:16 Fl. Suite D. 207, Sec. 2, Tun Haw South Road, Taipei, 10673 Tel: 886-(0)2 2377 9936

Data and specifications subject to change without notice. 9/00

www.irf.com

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