IRFE9024 [INFINEON]

60V, P-CHANNEL; 60V ， P- CHANNEL


型号：	IRFE9024
厂家：	Infineon
描述：	60V, P-CHANNEL 60V ， P- CHANNEL
文件：	总7页 (文件大小：140K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

PD - 93987

REPETITIVEAVALANCHEANDdv/dtRATED

HEXFET TRANSISTORS

IRFE9024

60V, P-CHANNEL

SURFACE MOUNT (LCC-18)

Product Summary

Part Number

BVDSS

RDS(on)

IRFE9024

- 60V

0.28Ω

-5.4A

LCC-18

The leadless chip carrier (LCC) package represents the

logical next step in the continual evolution of surface

mount technology. Desinged to be a close replacement

for the TO-39 package, the LCC will give designers the

extra flexibility they need to increase circuit board den-

sity. International Rectifier has engineered the LCC pack-

age to meet the specific needs of the power market by

increasing the size of the bottom source pad, thereby

enhancing the thermal and electrical performance. The

lid of the package is grounded to the source to reduce

RF interference.

Features:

Surface Mount

Small Footprint

Alternative to TO-39 Package

Hermetically Sealed

Dynamic dv/dt Rating

Avalanche Energy Rating

Simple Drive Requirements

Light Weight

Absolute Maximum Ratings

Parameter

Units

@ V

= -10V, T = 25°C Continuous Drain Current

-5.4

-3.4

-22

= -10V, T = 100°C Continuous Drain Current

Pulsed Drain Current ➀

Max. Power Dissipation

Linear Derating Factor

@ T = 25°C

W/°C

0.11

±20

120

Gate-to-Source Voltage

Single Pulse Avalanche Energy ➀

Avalanche Current ➀

Repetitive Avalanche Energy ➀

Peak Diode Recovery dv/dt ➀

Operating Junction

dv/dt

-4.5

-55 to 150

V/ns

Storage Temperature Range

^oC

STG

Pckg. Mounting Surface Temp.

Weight

300 (for 5 S)

0.42(typical)

For footnotes refer to the last page

www.irf.com

10/25/00

IRFE9024

Electrical Characteristics @ Tj = 25°C (Unless Otherwise Specified)

Parameter

Min Typ Max Units

Test Conditions

DSS

Drain-to-Source Breakdown Voltage

-60

—

= 0V, I = -1.0mA

Reference to 25°C, I = -1.0mA

∆BV

/∆T

Temperature Coefficient of Breakdown

Voltage

-0.068

V/°C

DSS

Static Drain-to-Source On-State

Resistance

—

0.28

0.29

- 4.0

—

= -10V, I = -3.4A➀

GS D

DS(on)

Ω

= -10V, I = -5.4A ➀

Gate Threshold Voltage

Forward Transconductance

Zero Gate Voltage Drain Current

-2.0

1.3

—

= V , I = -250µA

GS(th)

Ω

S ( )

> -15V, I

= -3.4A➀

-25

V = -48V, V = 0V

DS GS

DSS

µA

—

-250

=-48V

= 0V, T = 125°C

Gate-to-Source Leakage Forward

Gate-to-Source Leakage Reverse

Total Gate Charge

—

6.1

-100

100

=-20V

=20V

GSS

=-10V, ID -5.4A

GS =

Gate-to-Source Charge

Gate-to-Drain (‘Miller’) Charge

Turn-On Delay Time

Rise Time

5.4

=-30V

d(on)

=-30V, I = -5.4A,

100

R =7.5Ω

n s

Turn-Off Delay Time

Fall Time

d(off)

Total Inductance

—

S +

Measured from the center of

drain pad to center of source

pad

Input Capacitance

—

570

360

= 0V, V

= -25V

f = 1.0MHz

iss

GS DS

Output Capacitance

—

oss

rss

Reverse Transfer Capacitance

Source-Drain Diode Ratings and Characteristics

Parameter

Min Typ Max Units

Test Conditions

Continuous Source Current (Body Diode)

—

-5.4

-22

Pulse Source Current (Body Diode) ➀

Diode Forward Voltage

Reverse Recovery Time

Reverse Recovery Charge

—

-6.3

200

2.2

µc

T = 25°C, I = -5.4A, V

= 0V ➀

T = 25°C, I = -5.4A, di/dt ≤-100A/µs

≤ -50V ➀

Forward Turn-On Time

Intrinsic turn-on time is negligible. Turn-on speed is substantially controlled by L + L .

S D

Thermal Resistance

Parameter

Min Typ Max Units

Test Conditions

Junction to Case

—

9.1

26" " "

thJC

°C/W

Junction to PC Board

Soldered to a copper clad PC board

thJ-PCB

For footnotes refer to the last page

www.irf.com

IRFE9024

Fig 1. Typical Output Characteristics

Fig 2. Typical Output Characteristics

Fig 3. Typical Transfer Characteristics

Fig 4. Normalized On-Resistance

Vs. Temperature

www.irf.com

IRFE9024

13 a& b

Fig 6. Typical Gate Charge Vs.

Fig 5. Typical Capacitance Vs.

Gate-to-Source Voltage

Drain-to-Source Voltage

Fig 8. Maximum Safe Operating Area

Fig 7. Typical Source-Drain Diode

Forward Voltage

www.irf.com

IRFE9024

R_D

V_DS

V_GS

D.U.T.

R_G

V_DD

-10V

Pulse Width ≤ 1 µs

Duty Factor ≤ 0.1 %

Fig 10a. Switching Time Test Circuit

d(on)

d(off)

10%

90%

Fig 9. Maximum Drain Current Vs.

Case Temperature

Fig 10b. Switching Time Waveforms

Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case

www.irf.com

D.U.T

DRIVER

--1200VV

0.01

Ω

15V

Fig 12a. Unclamped Inductive Test Circuit

Fig 12c. Maximum Avalanche Energy

Vs. Drain Current

(BR)DSS

Fig 12b. Unclamped Inductive Waveforms

Current Regulator

Same Type as D.U.T.

50KΩ

.2µF

-12V

12V

.3µF

-10V

D.U.T.

-3mA

Charge

Current Sampling Resistors

Fig 13b. Gate Charge Test Circuit

Fig 13a. Basic Gate Charge Waveform

www.irf.com

Foot Notes:

➀➀ I ≤ -5.4A, di/dt ≤ -200A/µs,

➀➀ Repetitive Rating; Pulse width limited by

maximum junction temperature.

≤ -60V, T ≤ 150°C

Suggested RG =7.5 Ω

➀➀➀V

= -25V, starting T = 25°C,

➀➀➀➀➀Pulse width ≤ 300 µs; Duty Cycle ≤ 2%

Peak I = -5.4A,

Case Outline and Dimensions — LCC-18

IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105

IR EUROPEAN REGIONAL CENTRE: 439/445 Godstone Rd, Whyteleafe, Surrey CR3 OBL, UK Tel: ++ 44 (0)20 8645 8000

IR CANADA: 15 Lincoln Court, Brampton, Ontario L6T3Z2, Tel: (905) 453 2200

IR GERMANY: Saalburgstrasse 157, 61350 Bad Homburg Tel: ++ 49 (0) 6172 96590

IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: ++ 39 011 451 0111

IR JAPAN: K&H Bldg., 2F, 30-4 Nishi-Ikebukuro 3-Chome, Toshima-Ku, Tokyo 171 Tel: 81 (0)3 3983 0086

IR SOUTHEAST ASIA: 1 Kim Seng Promenade, Great World City West Tower, 13-11, Singapore 237994 Tel: ++ 65 (0)838 4630

IR TAIWAN:16 Fl. Suite D. 207, Sec. 2, Tun Haw South Road, Taipei, 10673 Tel: 886-(0)2 2377 9936

Data and specifications subject to change without notice. 10/00

IRFE9024 [INFINEON]

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