IRFIZ48NPBF [INFINEON]
POWER MOSFET; 功率MOSFET型号: | IRFIZ48NPBF |
厂家: | Infineon |
描述: | POWER MOSFET |
文件: | 总9页 (文件大小:271K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
PD -94835
IRFIZ48NPbF
HEXFET® Power MOSFET
l Advanced Process Technology
l IsolatedPackage
l High Voltage Isolation = 2.5KVRMS ꢀ
l Sink to Lead Creepage Dist. = 4.8mm
l Fully Avalanche Rated
D
VDSS = 55V
RDS(on) = 0.016Ω
G
l Lead-Free
ID = 40A
S
Description
Fifth Generation HEXFETs from International Rectifier
utilize advanced processing techniques to achieve
extremely low on-resistance per silicon area. This benefit,
combined with the fast switching speed and ruggedized
device design that HEXFET Power MOSFETs are well
knownfor, providesthedesignerwithanextremelyefficient
and reliable device for use in a wide variety of applications.
The TO-220 Fullpak eliminates the need for additional
insulating hardware in commercial-industrial applications.
The moulding compound used provides a high isolation
capability and a low thermal resistance between the tab
and external heatsink. This isolation is equivalent to using
a 100 micron mica barrier with standard TO-220 product.
The Fullpak is mounted to a heatsink using a single clip or
by a single screw fixing.
TO-220 FULLPAK
Absolute Maximum Ratings
Parameter
Max.
Units
ID @ TC = 25°C
ID @ TC = 100°C
IDM
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
40
29
A
210
PD @TC = 25°C
Power Dissipation
54
W
W/°C
V
Linear Derating Factor
0.36
± 20
270
VGS
EAS
IAR
Gate-to-Source Voltage
Single Pulse Avalanche Energy
Avalanche Current
mJ
A
32
EAR
dv/dt
TJ
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Operating Junction and
5.4
mJ
V/ns
5.0
-55 to + 175
TSTG
Storage Temperature Range
Soldering Temperature, for 10 seconds
Mounting torque, 6-32 or M3 srew
°C
300 (1.6mm from case )
10 lbfin (1.1Nm)
Thermal Resistance
Parameter
Junction-to-Case
Typ.
Max.
2.8
Units
RθJC
RθJA
°C/W
Junction-to-Ambient
65
11/13/03
IRFIZ48NPbF
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter
Min. Typ. Max. Units
55
Conditions
VGS = 0V, ID = 250µA
V(BR)DSS
Drain-to-Source Breakdown Voltage
V
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient 0.052 V/°C Reference to 25°C, ID = 1mA
RDS(on)
VGS(th)
gfs
Static Drain-to-Source On-Resistance 0.016
Ω
V
S
VGS = 10V, ID = 22A
VDS = VGS, ID = 250µA
VDS = 25V, ID = 32A
Gate Threshold Voltage
2.0
22
4.0
Forward Transconductance
25
250
100
-100
89
20
39
V
DS = 55V, VGS = 0V
VDS = 44V, VGS = 0V, TJ = 150°C
VGS = 20V
IDSS
Drain-to-Source Leakage Current
µA
nA
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
IGSS
VGS = -20V
ID = 32A
Qg
Qgs
Qgd
td(on)
tr
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
nC VDS = 44V
VGS = 10V, See Fig. 6 and 13
11
78
32
48
VDD = 28V
ID = 32A
ns
td(off)
tf
Turn-Off Delay Time
Fall Time
RG = 5.1Ω
RD = 0.85Ω, See Fig. 10
Between lead,
6mm (0.25in.)
D
S
4.5
LD
LS
Internal Drain Inductance
Internal Source Inductance
nH
pF
G
from package
7.5
and center of die contact
VGS = 0V
Ciss
Coss
Crss
C
Input Capacitance
1900
620
270
Output Capacitance
VDS = 25V
Reverse Transfer Capacitance
Drain to Sink Capacitance
= 1.0MHz, See Fig. 5
= 1.0MHz
12
Source-Drain Ratings and Characteristics
Parameter
Continuous Source Current
(Body Diode)
Min. Typ. Max. Units
Conditions
MOSFET symbol
showing the
D
IS
49
A
G
ISM
Pulsed Source Current
(Body Diode)
integral reverse
210
S
p-n junction diode.
VSD
trr
Diode Forward Voltage
Reverse Recovery Time
Reverse RecoveryCharge
1.3
94 140
360 540
V
TJ = 25°C, IS = 22A, VGS = 0V
TJ = 25°C, IF = 32A
ns
nC
Qrr
di/dt = 100A/µs
Notes:
Pulse width ≤ 300µs; duty cycle ≤ 2%.
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
VDD = 25V, starting TJ = 25°C, L = 530µH
RG = 25Ω, IAS = 32A. (See Figure 12)
ꢀ t=60s, =60Hz
Uses IRFZ48N data and test conditions
ISD ≤ 32A, di/dt ≤ 250A/µs, VDD ≤ V(BR)DSS
TJ ≤ 175°C
,
IRFIZ48NPbF
1000
100
10
1000
100
10
VGS
15V
VGS
15V
TOP
TOP
10V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
BOTTOM 4.5V
4.5V
1
1
4.5V
20µs PULSE WIDTH
20µs PULSE WIDTH
T
C
= 175°C
T
C
= 25°C
0.1
0.1
0.1
A
A
1
10
100
0.1
1
10
100
V
, Drain-to-Source Voltage (V)
V
, Drain-to-Source Voltage (V)
DS
DS
Fig 2. Typical Output Characteristics
Fig 1. Typical Output Characteristics
1000
2.5
I
= 53A
D
2.0
1.5
1.0
0.5
0.0
100
10
1
TJ = 175°C
TJ = 25°C
V DS= 25V
20µs PULSE WIDTH
V
= 10V
GS
0.1
A
10A
4
5
6
7
8
9
-60 -40 -20
0
20 40 60 80 100 120 140 160 180
VGS , Gate-to-Source Voltage (V)
T
, Junction Temperature (°C)
J
Fig 4. Normalized On-Resistance
Fig 3. Typical Transfer Characteristics
Vs. Temperature
IRFIZ48NPbF
20
16
12
8
4000
I
= 32A
V
C
C
C
= 0V,
f = 1MHz
D
GS
iss
rss
oss
= C + C
,
C
SHORTED
V
V
= 44V
gs
gd
gd
ds
DS
= C
= 28V
DS
= C + C
ds
gd
3000
2000
1000
0
C
C
iss
oss
C
rss
4
FOR TEST CIRCUIT
SEE FIGURE 13
0
A
A
0
20
40
60
80
100
1
10
100
V
, Drain-to-Source Voltage (V)
Q , Total Gate Charge (nC)
G
DS
Fig 6. Typical Gate Charge Vs.
Fig 5. Typical Capacitance Vs.
Gate-to-Source Voltage
Drain-to-Source Voltage
1000
1000
OPERATION IN THIS AREA LIMITED
BY R
DS(on)
100
10
1
10us
100
10
1
T = 175°C
J
100us
T = 25°C
J
1ms
10ms
°
T = 25 C
C
°
T = 175 C
Single Pulse
J
V
= 0V
GS
A
0.1
1
10
100
0.2
0.6
1.0
1.4
1.8
2.2
2.6
V
, Drain-to-Source Voltage (V)
DS
V
, Source-to-Drain Voltage (V)
SD
Fig 7. Typical Source-Drain Diode
Fig 8. Maximum Safe Operating Area
Forward Voltage
IRFIZ48NPbF
RD
VDS
50
40
30
20
10
0
VGS
D.U.T.
RG
+VDD
-
10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 10a. Switching Time Test Circuit
V
DS
90%
25
50
75
100
125
150
175
10%
°
T , Case Temperature ( C)
C
V
GS
t
t
r
t
t
f
d(on)
d(off)
Fig 9. Maximum Drain Current Vs.
Fig 10b. Switching Time Waveforms
Case Temperature
10
D = 0.50
0.20
1
0.10
0.05
P
2
DM
0.1
0.02
0.01
t
1
t
2
SINGLE PULSE
(THERMAL RESPONSE)
Notes:
1. Duty factor D =
t / t
1
2. Peak T =P
J
x Z
+ T
C
DM
thJC
0.01
0.00001
0.0001
0.001
0.01
0.1
1
10
t , Rectangular Pulse Duration (sec)
1
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
IRFIZ48NPbF
700
600
500
400
300
200
100
0
I
D
15V
TOP
13A
22A
BOTTOM 32A
DRIVER
+
L
V
DS
D.U.T
R
G
V
DD
-
I
A
AS
20V
0.01
Ω
t
p
Fig 12a. Unclamped Inductive Test Circuit
V
(BR)DSS
V
= 25V
50
DD
A
175
t
p
25
75
100
125
150
Starting T , Junction Temperature (°C)
J
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
I
AS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.T.
50KΩ
.2µF
12V
.3µF
Q
G
+
10 V
V
DS
D.U.T.
-
Q
Q
GD
GS
V
GS
V
G
3mA
I
I
D
G
Current Sampling Resistors
Charge
Fig 13b. Gate Charge Test Circuit
Fig 13a. Basic Gate Charge Waveform
IRFIZ48NPbF
Peak Diode Recovery dv/dt Test Circuit
+
-
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
D.U.T
+
-
-
+
RG
• dv/dt controlled by RG
+
-
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
VDD
Driver Gate Drive
P.W.
P.W.
Period
Period
D =
V
=10V
*
GS
D.U.T. I Waveform
SD
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. V Waveform
DS
Diode Recovery
dv/dt
V
DD
Re-Applied
Voltage
Body Diode
Forward Drop
Inductor Curent
I
SD
Ripple ≤ 5%
* VGS = 5V for Logic Level Devices
Fig 14. For N-Channel HEXFETS
IRFIZ48NPbF
TO-220 Full-Pak Package Outline
TO-220 Full-Pak Part Marking Information
E XAMPLE: T H IS IS AN IR F I840G
WIT H AS S EMB LY
PAR T NUMBE R
LOT CODE 3432
INT E R NAT IONAL
R ECT IF IER
LOGO
IRF I840G
AS S E MB LE D ON WW 24 1999
IN T HE AS S E MB LY LINE "K"
924K
32
34
DAT E CODE
YEAR 9 = 1999
WE EK 24
Note: "P" in assembly line
position indicates "Lead-Free"
AS S E MB LY
LOT CODE
LINE K
Data and specifications subject to change without notice.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.11/03
Note: For the most current drawings please refer to the IR website at:
http://www.irf.com/package/
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