IRFPC60LC-P [INFINEON]

HEXFET Power MOSFET; HEXFET功率MOSFET
IRFPC60LC-P
型号: IRFPC60LC-P
厂家: Infineon    Infineon
描述:

HEXFET Power MOSFET
HEXFET功率MOSFET

晶体 晶体管 功率场效应晶体管 开关 脉冲 局域网
文件: 总8页 (文件大小:110K)
中文:  中文翻译
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PD - 99438  
IRFPC60LC-P  
HEXFET® Power MOSFET  
D
l Ultra Low Gate Charge  
VDSS = 600V  
l Reduced Gate Drive Requirement  
l Enhanced 30V Vgs Rating  
l Reduced Ciss, Coss, Crss  
l Isolated Central Mounting Hole  
l Dynamic dv/dt Rated  
RDS(on) = 0.40Ω  
G
ID = 16A  
S
l Repetitive Avalanche Rated  
Description  
This new series of Surface Mountable Low Charge HEXFET Power MOSFETs  
achieve significantly lower gate charge over conventional MOSFETs. Utilizing  
advanced Hexfet technology the device improvements allow for reduced gate  
drive requirements, faster switching speeds and increased total system savings.  
Thesedeviceimprovementscombinedwiththeprovenruggednessandreliability  
of HEXFETs offer the designer a new standard in power transistors for switching  
applications.  
Surface Mountable  
TO-247  
Absolute Maximum Ratings  
Parameter  
Continuous Drain Current, VGS @ 10V  
Continuous Drain Current, VGS @ 10V  
Pulsed Drain Current   
Max.  
16  
Units  
ID @ TC = 25°C  
ID @ TC = 100°C  
IDM  
10  
A
64  
280  
PD @TC = 25°C  
Power Dissipation  
W
W/°C  
V
Linear Derating Factor  
2.2  
VGS  
EAS  
IAR  
Gate-to-Source Voltage  
±30  
Single Pulse Avalanche Energy ‚  
Avalanche Current  
1000  
16  
mJ  
A
EAR  
dv/dt  
TJ  
Repetitive Avalanche Energy   
Peak Diode Recovery dv/dt ƒ  
Operating Junction and  
28  
mJ  
V/ns  
3.0  
-55 to + 150  
TSTG  
Storage Temperature Range  
Max Reflow Temperature  
°C  
225  
Thermal Resistance  
Parameter  
Junction-to-Case  
Min.  
––––  
––––  
––––  
Typ.  
––––  
0.24  
Max.  
0.45  
––––  
40  
Units  
RθJC  
RθCS  
RθJA  
Case-to-Sink, Flat, Greased Surface  
Junction-to-Ambient  
°C/W  
––––  
www.irf.com  
1
04/25/02  
IRFPC60LC-P  
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)  
Parameter  
Min. Typ. Max. Units  
600 ––– –––  
––– 0.63 ––– V/°C Reference to 25°C, ID = 1mA  
Conditions  
V(BR)DSS  
Drain-to-Source Breakdown Voltage  
V
VGS = 0V, ID = 250µA  
V(BR)DSS/TJ Breakdown Voltage Temp. Coefficient  
RDS(ON)  
VGS(th)  
gfs  
Static Drain-to-Source On-Resistance  
Gate Threshold Voltage  
––– ––– 0.40  
2.0 ––– 4.0  
11 ––– –––  
––– ––– 25  
––– ––– 250  
––– ––– 100  
––– ––– -100  
––– ––– 120  
––– ––– 29  
––– ––– 48  
––– 17 –––  
––– 57 –––  
––– 43 –––  
––– 38 –––  
V
S
VGS = 10V, ID = 9.6A „  
VDS = VGS, ID = 250µA  
VDS = 50V, ID = 9.6A  
VDS = 600V, VGS = 0V  
Forward Transconductance  
IDSS  
IGSS  
Drain-to-Source Leakage Current  
µA  
nA  
V
DS = 480V, VGS = 0V, TJ = 125°C  
VGS = 20V  
GS = -20V  
Gate-to-Source Forward Leakage  
Gate-to-Source Reverse Leakage  
Total Gate Charge  
V
Qg  
ID = 16A  
Qgs  
Qgd  
td(on)  
tr  
Gate-to-Source Charge  
Gate-to-Drain ("Miller") Charge  
Turn-On Delay Time  
Rise Time  
nC  
ns  
VDS = 360V  
VGS = 10V, See Fig. 6 and 13 „  
VDD = 300V  
ID = 16A  
td(off)  
tf  
Turn-Off Delay Time  
Fall Time  
RG = 4.3Ω  
RD = 18Ω, See Fig. 10 „  
Between lead,  
6mm (0.25in.)  
D
LD  
LS  
Internal Drain Inductance  
Internal Source Inductance  
––– 5.0 –––  
––– 13 –––  
nH  
pF  
G
from package  
and center of die contact  
VGS = 0V  
S
Ciss  
Coss  
Crss  
Input Capacitance  
––– 3500 –––  
––– 400 –––  
––– 39 –––  
Output Capacitance  
VDS = 25V  
Reverse Transfer Capacitance  
ƒ = 1.0MHz, See Fig. 5  
Source-Drain Ratings and Characteristics  
Parameter  
Continuous Source Current  
(Body Diode)  
Min. Typ. Max. Units  
Conditions  
MOSFET symbol  
showing the  
D
IS  
––– ––– 16  
A
G
ISM  
Pulsed Source Current  
(Body Diode)   
integral reverse  
––– ––– 64  
p-n junction diode.  
S
VSD  
trr  
Diode Forward Voltage  
Reverse Recovery Time  
Reverse RecoveryCharge  
Forward Turn-On Time  
––– ––– 1.8  
––– 650 980  
––– 6.0 9.0  
V
TJ = 25°C, IS = 16A, VGS = 0V „  
TJ = 25°C, IF = 16A  
ns  
Qrr  
ton  
µC di/dt = 100A/µs „  
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)  
Notes:  
 Repetitive rating; pulse width limited by  
ƒ ISD 16A, di/dt 140A/µs, VDD V(BR)DSS  
TJ 150°C  
,
max. junction temperature. ( See fig. 11 )  
‚ VDD = 25V, starting TJ = 25°C, L = 7.2mH  
RG = 25, IAS = 16A. (See Figure 12)  
„ Pulse width 300µs; duty cycle 2%.  
2
www.irf.com  
IRFPC60LC-P  
1 00  
10  
1 00  
10  
VGS  
15V  
VGS  
15V  
TOP  
TOP  
10V  
10V  
8.0V  
7.0V  
6.0V  
5.5V  
5.0V  
8.0V  
7.0V  
6.0V  
5.5V  
5.0V  
BOTTOM 4.5V  
BOTTOM 4.5V  
4.5V  
1
1
0.1  
0.01  
0.1  
0.01  
4.5V  
20µs PULSE W IDTH  
20µs P ULS E W IDTH  
T
= 25°C  
C
T
= 150°C  
C
0.01  
0.1  
1
10  
100  
0.01  
0.1  
1
10  
100  
V
, Drain-to-Source Voltage (V)  
V
, Drain-to-Source Voltage (V)  
DS  
DS  
Fig 1. Typical Output Characteristics,  
Fig 2. Typical Output Characteristics,  
TC = 25oC  
TC = 150oC  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
0.0  
100  
10  
I
= 16A  
D
T
= 150°C  
J
1
T
= 25°C  
J
0.1  
0.01  
V
= 100V  
D S  
20µs PULS E W ID TH  
V
= 10V  
G S  
-60 -40 -20  
0
20  
40  
60  
80 100 120 140 160  
4
5
6
7
8
9
10  
T
J
, Junction Temperature (°C)  
V
, Gate-to-Source Voltage (V)  
G S  
Fig 3. Typical Transfer Characteristics  
Fig 4. Normalized On-Resistance  
Vs. Temperature  
www.irf.com  
3
IRFPC60LC-P  
20  
16  
12  
8
7000  
I
= 16A  
D
V
C
C
C
= 0V,  
f = 1MH z  
G S  
iss  
rss  
oss  
= C  
= C  
= C  
+ C  
+ C  
,
C
S HORTED  
gs  
gd  
ds  
gd  
ds  
6000  
5000  
4000  
3000  
2000  
1000  
0
V
V
V
= 360V  
= 240V  
= 120V  
gd  
D S  
D S  
D S  
C
iss  
4
C
C
oss  
rss  
FOR TE ST CIRC UIT  
S EE FIG URE 13  
0
0
30  
G
60  
90  
120  
1
10  
100  
Q
, Total Gate Charge (nC)  
V
, Drain-to-Source Voltage (V)  
DS  
Fig 5. Typical Capacitance Vs.  
Fig 6. Typical Gate Charge Vs.  
Drain-to-Source Voltage  
Gate-to-Source Voltage  
100  
1000  
100  
10  
O PER ATIO N IN TH IS AREA LIM ITE D  
B Y R  
D S(on)  
10µs  
10  
T
= 150°C  
J
T
= 25°C  
100µs  
1m s  
J
T
T
= 25°C  
= 150°C  
C
J
10m s  
1000  
V
= 0V  
G S  
Single Pulse  
1
1
0
0.4  
0.8  
1.2  
1.6  
2
1
10  
100  
100 00  
V
, Drain-to-Source Voltage (V)  
V
, Source-to-Drain Voltage (V)  
D S  
SD  
Fig 7. Typical Source-Drain Diode  
Fig 8. Maximum Safe Operating Area  
Forward Voltage  
4
www.irf.com  
IRFPC60LC-P  
RD  
VDS  
VGS  
16  
12  
8
D.U.T.  
RG  
+ VDD  
-
10 V  
Pulse Width ≤ 1 µs  
Duty Factor ≤ 0.1 %  
Fig 10a. Switching Time Test Circuit  
V
DS  
90%  
4
0
10%  
25  
50  
75  
100  
125  
150  
V
GS  
T
, Case Temperature (°C)  
C
t
t
r
t
t
f
d(on)  
d(off)  
Fig 9. Maximum Drain Current Vs.  
Fig 10b. Switching Time Waveforms  
Case Temperature  
1
D
= 0.5 0  
0.20  
0.1  
0.1 0  
0.0 5  
P
DM  
0.02  
0.01  
0.01  
t
1
S IN G LE P UL SE  
t
(T H E R M AL R E S P O N S E )  
2
N o tes :  
1 . Du ty fa ctor D  
=
t
/ t  
2
1
2 . Pe ak  
0 .1  
T
=
P
x
Z
+ T  
C
D M  
J
th JC  
1
0.001  
0.00001  
0.0001  
0.001  
0.01  
10  
t1 , Rectangular Pulse Duration (sec)  
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case  
www.irf.com  
5
IRFPC60LC-P  
L
V
DS  
D.U.T.  
2400  
2000  
1600  
1200  
800  
I
D
R
+
-
G
TOP  
7.2A  
10A  
V
DD  
B OTTO M 16A  
I
10 V  
AS  
t
p
0.01Ω  
Fig 12a. Unclamped Inductive Test Circuit  
V
(BR)DSS  
t
p
V
DD  
400  
V
= 50V  
50  
DD  
V
0
DS  
25  
75  
100  
125  
150  
Starting T , Juntion Temperature (°C)  
J
I
AS  
Fig 12c. Maximum Avalanche Energy  
Vs. Drain Current  
Fig 12b. Unclamped Inductive Waveforms  
Current Regulator  
Same Type as D.U.T.  
50KΩ  
.2µF  
12V  
.3µF  
Q
G
+
10 V  
V
DS  
D.U.T.  
-
Q
Q
GD  
GS  
V
GS  
V
G
3mA  
I
I
D
G
Current Sampling Resistors  
Charge  
Fig 13a. Basic Gate Charge Waveform  
Fig 13b. Gate Charge Test Circuit  
6
www.irf.com  
IRFPC60LC-P  
Peak Diode Recovery dv/dt Test Circuit  
+
Circuit Layout Considerations  
Low Stray Inductance  
Ground Plane  
Low Leakage Inductance  
Current Transformer  
D.U.T  
ƒ
-
+
‚
-
„
-
+

RG  
dv/dt controlled by RG  
+
-
Driver same type as D.U.T.  
ISD controlled by Duty Factor "D"  
D.U.T. - Device Under Test  
VDD  
Driver Gate Drive  
P.W.  
P.W.  
Period  
Period  
D =  
V
=10V  
*
GS  
D.U.T. I Waveform  
SD  
Reverse  
Recovery  
Current  
Body Diode Forward  
Current  
di/dt  
D.U.T. V Waveform  
DS  
Diode Recovery  
dv/dt  
V
DD  
Re-Applied  
Voltage  
Body Diode  
Forward Drop  
Inductor Curent  
I
SD  
Ripple 5%  
* VGS = 5V for Logic Level Devices  
Fig 14. For N-Channel HEXFETS  
www.irf.com  
7
IRFPC60LC-P  
TO-247AC Package Outline  
Dimensions are shown in millimeters (inches)  
- D  
-
3.65 (.143)  
3.55 (.140)  
5.30 (.209)  
4.70 (.185)  
15.90 (.626)  
15.30 (.602)  
0.25 (.010)  
D
M
B
M
2.50 (.089)  
1.50 (.059)  
- B  
-
- A  
-
5.50 (.217)  
4
20.30 (.800)  
19.70 (.775)  
NOTES:  
5.50 (.217)  
4.50 (.177)  
2X  
1
DIMENSIONING & TOLERANCING  
PER ANSI Y14.5M, 1982.  
CONTROLLING DIMENSION : INCH.  
CONFORMS TO JEDEC OUTLINE  
TO-247-AC.  
1
2
3
2
3
- C  
-
14.80 (.583)  
14.20 (.559)  
4.30 (.170)  
3.70 (.145)  
LEAD ASSIGNMENTS  
2.40 (.094)  
2.00 (.079)  
2X  
0.80 (.031)  
0.40 (.016)  
1.40 (.056)  
1.00 (.039)  
3X  
1 - GATE  
3X  
2 - DRAIN  
3 - SOURCE  
4 - DRAIN  
2.60 (.102)  
2.20 (.087)  
0.25 (.010)  
C
A
S
M
5.45 (.215)  
2X  
3.40 (.133)  
3.00 (.118)  
TO-247AC Part Marking Information  
E X A M P L E  
:
TH IS IS AN IR F P E 30  
W ITH A S S E M B L Y  
L O T C O D E 3 A 1 Q  
A
P AR T N U M B E R  
IN TE R N A TIO N A L  
R E C T IF IE R  
L O G O  
IR F P E 3 0  
3 A 1 Q 9 3 0 2  
D A TE C O D E  
(Y YW W )  
A S S E M B L Y  
L O T  
C O D E  
YY  
= YE A R  
W W W E E K  
Data and specifications subject to change without notice.  
This product has been designed and qualified for the Industrial market.  
Qualification Standards can be found on IRs Web site.  
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105  
TAC Fax: (310) 252-7903  
Visit us at www.irf.com for sales contact information.04/02  
8
www.irf.com  

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