IRFR540Z [INFINEON]
HEXFET㈢ Power MOSFET; HEXFET㈢功率MOSFET
| 型号： | IRFR540Z |
| 厂家： | 
Infineon |
| 描述： | HEXFET㈢ Power MOSFET |
| 文件： | 总11页 (文件大小：371K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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AUTOMOTIVE MOSFET
IRFR540Z
IRFU540Z
Features
HEXFET® Power MOSFET
lAdvanced Process Technology
lUltra Low On-Resistance
l175°C Operating Temperature
lFast Switching
D
VDSS = 100V
lRepetitive Avalanche Allowed up to Tjmax
RDS(on) = 28.5mΩ
G
Description
ID = 35A
Specifically designed for Automotive applications,
this HEXFET® Power MOSFET utilizes the latest
processing techniques to achieve extremely low
on-resistance per silicon area. Additional features
of this design are a 175°C junction operating
temperature, fast switching speed and improved
repetitive avalanche rating . These features com-
bine to make this design an extremely efficient and
reliable device for use in Automotive applications
and a wide variety of other applications.
S
D-Pak
I-Pak
IRFU540Z
IRFR540Z
Absolute Maximum Ratings
Parameter
Max.
Units
Continuous Drain Current, VGS @ 10V (Silicon Limited)
Continuous Drain Current, VGS @ 10V (Silicon Limited)
Pulsed Drain Current
I
I
I
@ T = 25°C
35
D
D
C
@ T = 100°C
25
140
91
A
C
DM
P
@T = 25°C Power Dissipation
W
D
C
Linear Derating Factor
0.61
± 20
W/°C
V
V
Gate-to-Source Voltage
Single Pulse Avalanche Energy
GS
EAS (Thermally limited)
39
mJ
Single Pulse Avalanche Energy Tested Value
Avalanche Current
EAS (Tested )
75
IAR
See Fig.12a, 12b, 15, 16
A
Repetitive Avalanche Energy
Operating Junction and
EAR
mJ
T
T
-55 to + 175
J
Storage Temperature Range
°C
STG
Reflow Soldering Temperature, for 10 seconds
Mounting Torque, 6-32 or M3 screw
300
10 lbf in (1.1N m)
Thermal Resistance
Parameter
Typ.
–––
–––
–––
Max.
1.64
40
Units
Junction-to-Case
RθJC
RθJA
RθJA
Junction-to-Ambient (PCB mount)
Junction-to-Ambient
°C/W
110
HEXFET® isaregisteredtrademarkofInternationalRectifier.
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1
2/3/05
IRFR/U540Z
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter
Drain-to-Source Breakdown Voltage
Min. Typ. Max. Units
100 ––– –––
Conditions
VGS = 0V, ID = 250µA
V(BR)DSS
V
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient ––– 0.092 ––– V/°C Reference to 25°C, ID = 1mA
mΩ
V
RDS(on)
VGS(th)
gfs
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
–––
2.0
22.5 28.5
VGS = 10V, ID = 21A
–––
–––
–––
–––
–––
4.0
–––
20
VDS = VGS, ID = 50µA
VDS = 25V, ID = 21A
Forward Transconductance
28
S
IDSS
Drain-to-Source Leakage Current
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
µA
V
V
DS = 100V, VGS = 0V
250
200
DS = 100V, VGS = 0V, TJ = 125°C
IGSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
nA VGS = 20V
GS = -20V
ID = 21A
DS = 50V
––– -200
V
Qg
Qgs
Qgd
td(on)
tr
39
11
12
14
42
43
34
4.5
59
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
–––
–––
–––
–––
–––
–––
–––
nC
V
VGS = 10V
VDD = 50V
ID = 21A
Rise Time
td(off)
tf
Turn-Off Delay Time
ns
RG = 13 Ω
Fall Time
VGS = 10V
LD
Internal Drain Inductance
Between lead,
D
S
nH 6mm (0.25in.)
from package
G
LS
Internal Source Inductance
–––
7.5
–––
and center of die contact
VGS = 0V
DS = 25V
pF ƒ = 1.0MHz
Ciss
Coss
Crss
Coss
Coss
Input Capacitance
––– 1690 –––
Output Capacitance
–––
–––
–––
–––
–––
180
100
720
110
190
–––
–––
–––
–––
–––
V
Reverse Transfer Capacitance
Output Capacitance
V
V
V
GS = 0V, VDS = 1.0V, ƒ = 1.0MHz
GS = 0V, VDS = 80V, ƒ = 1.0MHz
GS = 0V, VDS = 0V to 80V
Output Capacitance
Coss eff.
Effective Output Capacitance
Source-Drain Ratings and Characteristics
Parameter
Min. Typ. Max. Units
Conditions
I
Continuous Source Current
–––
–––
35
MOSFET symbol
S
(Body Diode)
A
showing the
I
Pulsed Source Current
–––
–––
140
integral reverse
SM
(Body Diode)
p-n junction diode.
V
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Forward Turn-On Time
–––
–––
–––
–––
32
1.3
48
60
V
T = 25°C, I = 21A, V = 0V
J S GS
SD
t
ns T = 25°C, I = 21A, VDD = 50V
J F
rr
di/dt = 100A/µs
Q
40
nC
rr
t
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
on
2
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IRFR/U540Z
1000
100
10
1000
100
10
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
≤60µs PULSE WIDTH
Tj = 25°C
TOP
TOP
BOTTOM
BOTTOM
4.5V
≤60µs PULSE WIDTH
Tj = 175°C
4.5V
10
1
1
0.1
1
100
0.1
1
10
100
V
, Drain-to-Source Voltage (V)
DS
V
, Drain-to-Source Voltage (V)
DS
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000
70
T
= 25°C
J
60
50
40
30
20
10
0
100
10
1
T
= 175°C
J
T
= 175°C
J
T
= 25°C
J
V
= 10V
V
= 25V
DS
380µs PULSE WIDTH
DS
≤60µs PULSE WIDTH
0.1
2
3
4
5
6
7
8
0
10
20
30
40
50
I
,Drain-to-Source Current (A)
D
V
, Gate-to-Source Voltage (V)
GS
Fig 3. Typical Transfer Characteristics
Fig 4. Typical Forward Transconductance
vs. Drain Current
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3
IRFR/U540Z
3000
20
16
12
8
V
C
= 0V,
f = 1 MHZ
GS
I = 21A
D
= C + C , C SHORTED
iss
gs
gd ds
V
= 80V
C
C
= C
DS
2500
2000
1500
1000
500
rss
oss
gd
VDS= 50V
VDS= 20V
= C + C
ds
gd
C
iss
4
C
C
oss
rss
0
0
0
10
20
30
40
50
60
1
10
100
Q
Total Gate Charge (nC)
G
V
, Drain-to-Source Voltage (V)
DS
Fig 6. Typical Gate Charge vs.
Fig 5. Typical Capacitance vs.
Gate-to-SourceVoltage
Drain-to-SourceVoltage
1000.0
100.0
10.0
1.0
1000
100
10
OPERATION IN THIS AREA
LIMITED BY R
(on)
DS
100µsec
1msec
T
= 175°C
J
T
= 25°C
J
10msec
DC
1
Tc = 25°C
Tj = 175°C
Single Pulse
V
= 0V
GS
1.2
0.1
0.1
0
1
10
100
1000
0.2
0.4
0.6
0.8
1.0
1.4
V
, Drain-toSource Voltage (V)
V
, Source-to-Drain Voltage (V)
DS
SD
Fig 8. Maximum Safe Operating Area
Fig 7. Typical Source-Drain Diode
Forward Voltage
4
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IRFR/U540Z
2.5
2.0
1.5
1.0
0.5
40
30
20
10
0
I
= 21A
D
V
= 10V
GS
-60 -40 -20
0
20 40 60 80 100 120 140 160 180
25
50
75
100
125
150
175
T
, Junction Temperature (°C)
T
, CaseTemperature (°C)
J
C
Fig 10. Normalized On-Resistance
Fig 9. Maximum Drain Current vs.
vs.Temperature
CaseTemperature
10
1
0.1
D = 0.50
0.20
0.10
R1
R2
R2
R3
R3
Ri (°C/W) τi (sec)
R1
τ
0.05
JτJ
τ
τ
Cτ
2.626
0.000052
τ
1τ1
τ
0.02
0.01
2 τ2
3τ3
0.6611 0.001297
0.7154 0.01832
Ci= τi/Ri
0.01
SINGLE PULSE
( THERMAL RESPONSE )
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.001
1E-006
1E-005
0.0001
0.001
0.01
0.1
t
, Rectangular Pulse Duration (sec)
1
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRFR/U540Z
160
120
80
40
0
15V
I
D
TOP
6.5A
9.4A
21A
DRIVER
+
L
V
BOTTOM
DS
D.U.T
AS
R
G
V
DD
-
I
A
V
20V
GS
0.01
Ω
t
p
Fig 12a. Unclamped Inductive Test Circuit
V
(BR)DSS
t
p
25
50
75
100
125
150
175
Starting T , Junction Temperature (°C)
J
I
AS
Fig 12c. Maximum Avalanche Energy
Fig 12b. Unclamped Inductive Waveforms
vs. Drain Current
Q
G
10 V
Q
Q
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
GS
GD
I
= 1.0mA
D
ID = 250µA
= 50µA
V
I
G
D
Charge
Fig 13a. Basic Gate Charge Waveform
L
VCC
DUT
0
-75 -50 -25
0
J
25 50 75 100 125 150 175
, Temperature ( °C )
1K
T
Fig 14. Threshold Voltage vs. Temperature
Fig 13b. Gate Charge Test Circuit
6
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IRFR/U540Z
100
10
1
Duty Cycle = Single Pulse
0.01
Allowed avalanche Current vs
avalanche pulsewidth, tav
assuming ∆Tj = 25°C due to
avalanche losses
0.05
0.10
0.1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 15. Typical Avalanche Current vs.Pulsewidth
40
Notes on Repetitive Avalanche Curves , Figures 15, 16:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a
temperature far in excess of Tjmax. This is validated for
every part type.
TOP
BOTTOM 1% Duty Cycle
= 21A
Single Pulse
I
D
30
20
10
0
2. Safe operation in Avalanche is allowed as long asTjmax is
not exceeded.
3. Equation below based on circuit and waveforms shown in
Figures 12a, 12b.
4. PD (ave) = Average power dissipation per single
avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for
voltage increase during avalanche).
6. Iav = Allowable avalanche current.
7. ∆T = Allowable rise in junction temperature, not to exceed
Tjmax (assumed as 25°C in Figure 15, 16).
tav = Average time in avalanche.
25
50
75
100
125
150
175
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see figure 11)
Starting T , Junction Temperature (°C)
J
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
Iav = 2DT/ [1.3·BV·Zth]
Fig 16. Maximum Avalanche Energy
EAS (AR) = PD (ave)·tav
vs.Temperature
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7
IRFR/U540Z
Driver Gate Drive
P.W.
P.W.
Period
D.U.T
Period
D =
+
*
=10V
V
GS
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
-
D.U.T. I Waveform
SD
+
-
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
-
+
D.U.T. V Waveform
DS
Diode Recovery
dv/dt
V
DD
VDD
Re-Applied
Voltage
• dv/dt controlled by RG
RG
+
-
Body Diode
Forward Drop
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
Inductor Curent
I
SD
Ripple ≤ 5%
* VGS = 5V for Logic Level Devices
Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
RD
VDS
VGS
D.U.T.
RG
+VDD
-
10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 18a. Switching Time Test Circuit
V
DS
90%
10%
V
GS
t
t
r
t
t
f
d(on)
d(off)
Fig 18b. Switching Time Waveforms
8
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IRFR/U540Z
D-Pak (TO-252AA) Package Outline
D-Pak (TO-252AA) Part Marking Information
EXAMPLE: THIS IS AN IRFR120
PART NUMBER
WIT H AS S E MBL Y
LOT CODE 1234
ASSEMBLED ON WW 16, 1999
IN THE ASSEMBLY LINE "A"
INTERNATIONAL
RECTIFIER
LOGO
DATE CODE
YEAR 9 = 1999
WEEK 16
IRFR120
916A
34
12
LINE A
Note: "P" in assembly line
position indicates "Lead-Free"
ASSEMBLY
LOT CODE
OR
PART NUMBER
DATE CODE
INTERNATIONAL
RECTIFIER
LOGO
IRFR120
P916A
34
P = DESIGNATES LEAD-FREE
PRODUCT (OPTIONAL)
YEAR 9 = 1999
12
AS S E MB L Y
LOT CODE
WEEK 16
A= ASSEMBLY SITE CODE
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9
IRFR/U540Z
I-Pak(TO-251AA)PackageOutline
I-Pak (TO-251AA) Part Marking Information
PART NUMBER
EXAMPLE: THIS IS AN IRFU120
INTERNATIONAL
RECTIFIER
LOGO
WIT H AS S E MBLY
LOT CODE 5678
ASSEMBLED ON WW 19, 1999
IN THE ASSEMBLY LINE "A"
DATE CODE
YEAR 9 = 1999
WE E K 19
IRFU120
919A
78
56
LINE A
ASSEMBLY
LOT CODE
Note: "P" in assembly line
pos ition indicates "Lead-Free"
OR
PART NUMBER
DATE CODE
P = DESIGNATES LEAD-FREE
PRODUCT (OPTIONAL)
INTERNATIONAL
RECTIFIER
LOGO
IRFU120
56 78
YEAR 9 = 1999
AS S E MB L Y
LOT CODE
WE E K 19
A = AS S E MB LY S IT E CODE
10
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IRFR/U540Z
D-Pak (TO-252AA) Tape & Reel Information
Dimensions are shown in millimeters (inches)
TR
TRL
TRR
16.3 ( .641 )
15.7 ( .619 )
16.3 ( .641 )
15.7 ( .619 )
12.1 ( .476 )
11.9 ( .469 )
8.1 ( .318 )
7.9 ( .312 )
FEED DIRECTION
FEED DIRECTION
NOTES :
1. CONTROLLING DIMENSION : MILLIMETER.
2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ).
3. OUTLINE CONFORMS TO EIA-481 & EIA-541.
13 INCH
16 mm
NOTES :
1. OUTLINE CONFORMS TO EIA-481.
Notes:
Coss eff. is a fixed capacitance that gives the same charging time
Repetitive rating; pulse width limited by
max. junction temperature. (See fig. 11).
Limited by TJmax, starting TJ = 25°C, L = 0.17mH
RG = 25Ω, IAS = 21A, VGS =10V. Part not
recommended for use above this value.
Pulse width ≤ 1.0ms; duty cycle ≤ 2%.
as Coss while VDS is rising from 0 to 80% VDSS
.
ꢀ
Limited by TJmax , see Fig.12a, 12b, 15, 16 for typical repetitive
avalanche performance.
This value determined from sample failure population. 100%
tested to this value in production.
When mounted on 1" square PCB (FR-4 or G-10 Material) .
Rθ is measured at TJ approximately 90°C
Data and specifications subject to change without notice.
This product has been designed for the Automotive [Q101] market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.2/05
www.irf.com
11
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