IRFS7440_技术文档

StrongIRFET

IRFS7440PbF

IRFSL7440PbF

Applications

l Brushed Motor drive applications

l BLDC Motor drive applications

l Battery powered circuits

l Half-bridge and full-bridge topologies

l Synchronous rectifier applications

l Resonant mode power supplies

l OR-ing and redundant power switches

l DC/DC and AC/DC converters

l DC/AC Inverters

HEXFET^®Power MOSFET

D

S

V_DSS

40V

R_DS(on)typ.

2.0mΩ

2.5mΩ

208A

max.

G

I_D

120A

(Package Limited)

D

Benefits

l Improved Gate, Avalanche and Dynamic dV/dt

Ruggedness

l Fully Characterized Capacitance and Avalanche

SOA

l Enhanced body diode dV/dt and dI/dt Capability

l Lead-Free

S

D

G

D²Pak

TO-262

IRFS7440PbF

IRFSL7440PbF

l RoHS Compliant containing no Lead, no Bromide,

and no Halogen

G

Gate

D

Drain

S

Source

Standard Pack

Form

Tube

Base Part Number

Package Type

Orderable Part Number

Quantity

50

800

IRFS7440PbF

IRFSL7440PbF

D2-Pak

TO-262

IRFS7440PbF

IRFS7440TRLPbF

IRFSL7440PbF

Tape and Reel Left

Tube

50

7.0

6.0

5.0

4.0

3.0

2.0

1.0

240

200

160

120

80

I

= 100A

D

Limited By Package

T

= 125°C

J

40

T

= 25°C

J

0

4

6

8

10 12 14

16 18 20

25

50

75

100

125

150

175

T

, Case Temperature (°C)

C

V

Gate -to -Source Voltage (V)

GS,

Fig 2. Maximum Drain Current vs. Case Temperature

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Fig 1. Typical On-Resistance vs. Gate Voltage

1

November 19, 2014

IRFS7440PbF/IRFSL7440PbF

Absolute Maximum Ratings

Symbol

Parameter

Continuous Drain Current, V_GS@ 10V

Continuous Drain Current, V_GS@ 10V (Wire Bond Limited)

Pulsed Drain Current

Max.

208

Units

I_D@ T_C= 25°C

147

120

I_D@ T_C= 100°C

A

I_D@ T_C= 25°C

772

I_DM

208

Maximum Power Dissipation

P_D@T_C= 25°C

W

1.4

Linear Derating Factor

W/°C

V

± 20

Gate-to-Source Voltage

V_GS

T_J

-55 to + 175

Operating Junction and

°C

Storage Temperature Range

T_STG

300

Soldering Temperature, for 10 seconds (1.6mm from case)

Mounting torque, 6-32 or M3 screw

10lbf in (1.1N m)

Avalanche Characteristics

Single Pulse Avalanche Energy

Avalanche Current

E_{AS (Thermally limited)}

238

560

mJ

E_{AS (Thermally limited)}

I_AR

See Fig. 14, 15, 22a, 22b

A

Repetitive Avalanche Energy

E_AR

mJ

Thermal Resistance

Symbol

Parameter

Junction-to-Case

Typ.

Max.

0.72

Units

R_θ

–––

0.50

–––

JC

°C/W

Case-to-Sink, Flat Greased Surface

Junction-to-Ambient

R_θ

–––

62

CS

R_θ

JA

Static @ T_J= 25°C (unless otherwise specified)

Symbol Parameter

Min.

40

Typ.

–––

0.035

2.0

Max. Units

Conditions

V_(BR)DSS

Drain-to-Source Breakdown Voltage

Breakdown Voltage Temp. Coefficient

Static Drain-to-Source On-Resistance

–––

2.5

V

V_GS= 0V, I_D= 250μA

ΔV_(BR)DSS/ΔT_J

R_DS(on)

–––

2.2

V/°C Reference to 25°C, I_D= 5.0mA

mΩ

V

V_GS= 10V, I_D= 100A

V_GS= 6.0V, I_D= 50A

V_DS= V_GS, I_D= 100μA

3.0

–––

3.9

V_GS(th)

I_DSS

Gate Threshold Voltage

3.0

Drain-to-Source Leakage Current

–––

2.6

1.0

μA

V

_DS= 40V, V_GS= 0V

V_DS= 40V, V_GS= 0V, T_J= 125°C

_GS= 20V

V_GS= -20V

150

100

-100

–––

I_GSS

Gate-to-Source Forward Leakage

Gate-to-Source Reverse Leakage

Internal Gate Resistance

nA

V

R_G

Ω

Notes:

Calculated continuous current based on maximum allowable junction

temperature. Bond wire current limit is 120A. Note that current

limitations arising from heating of the device leads may occur with

ꢀ Pulse width ≤ 400μs; duty cycle ≤ 2%.

C_osseff. (TR) is a fixed capacitance that gives the same charging time

as C_osswhile V_DSis rising from 0 to 80% V_DSS

C_osseff. (ER) is a fixed capacitance that gives the same energy as

.

some lead mounting arrangements. (Refer to AN-1140)

Repetitive rating; pulse width limited by max. junction

temperature.

Limited by T_Jmax, starting T_J= 25°C, L = 0.048mH

R_G= 50Ω, I_AS= 100A, V_GS=10V.

C_osswhile V_DSis rising from 0 to 80% V_DSS

.

R_θis measured at T_Japproximately 90°C.

Limited by T_Jmaxstarting T_J= 25°C, L= 1mH, R_G= 50Ω, I_AS= 34A, V_GS=10V.

I_SD≤ 100A, di/dt ≤ 1330A/μs, V_DD≤ V_(BR)DSS, T_J≤ 175°C.

2

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IRFS7440PbF/IRFSL7440PbF

Dynamic @ T_J= 25°C (unless otherwise specified)

Symbol Parameter

Min.

88

Typ.

–––

90

Max. Units

Conditions

V_DS= 10V, I_D= 100A

_D= 100A

V_DS=20V

V_GS= 10V

gfs

Forward Transconductance

Total Gate Charge

–––

135

–––

S

Q_g

–––

nC

I

Q_gs

Gate-to-Source Charge

Gate-to-Drain ("Miller") Charge

Total Gate Charge Sync. (Q_g- Q_gd

Turn-On Delay Time

Rise Time

23

Q_gd

32

Q_sync

)

58

I_D= 100A, V_DS=0V, V_GS= 10V

V_DD= 20V

t_d(on)

24

ns

t_r

68

I_D= 30A

t_d(off)

Turn-Off Delay Time

Fall Time

115

68

R_G= 2.7Ω

t_f

V_GS= 10V

C_iss

Input Capacitance

4730

680

460

845

980

pF

V_GS= 0V

C_oss

Output Capacitance

V_DS= 25V

C_rss

Reverse Transfer Capacitance

ƒ = 1.0 MHz

Effective Output Capacitance (Energy Related)

Effective Output Capacitance (Time Related)

C_osseff. (ER)

C_osseff. (TR)

V_GS= 0V, V_DS= 0V to 32V

Diode Characteristics

Symbol

Parameter

Min.

Typ.

Max. Units

Conditions

MOSFET symbol

D

S

208

I_S

Continuous Source Current

–––

A

V

(Body Diode)

showing the

G

I_SM

Pulsed Source Current

–––

772

integral reverse

(Body Diode)

p-n junction diode.

V_SD

dv/dt

t_rr

Diode Forward Voltage

Peak Diode Recovery

–––

0.9

6.8

24

1.3

–––

T_J= 25°C, I_S= 100A, V_GS= 0V

V/ns T_J= 175°C, I_S= 100A, V_DS= 40V

Reverse Recovery Time

Reverse Recovery Charge

Reverse Recovery Current

ns

nC

A

T_J= 25°C

T_J= 125°C

T_J= 25°C

T_J= 125°C

T_J= 25°C

V_R= 34V,

28

I_F= 100A

di/dt = 100A/μs

Q_rr

17

20

I_RRM

1.3

3

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IRFS7440PbF/IRFSL7440PbF

1000

100

10

1000

VGS

15V

10V

8.0V

7.0V

6.0V

5.5V

5.0V

4.5V

VGS

15V

10V

8.0V

7.0V

6.0V

5.5V

5.0V

4.5V

TOP

100

10

1

BOTTOM

4.5V

1

60μs PULSE WIDTH

≤

Tj = 25°C

Tj = 175°C

0.1

1

10

100

0.1

1

10

100

V

, Drain-to-Source Voltage (V)

V

, Drain-to-Source Voltage (V)

DS

Fig 3. Typical Output Characteristics

Fig 4. Typical Output Characteristics

1000

100

10

2.0

1.8

1.6

1.4

1.2

1.0

0.8

0.6

I

= 100A

= 10V

D

V

GS

T

= 175°C

J

T

= 25°C

J

V

= 10V

DS

≤

60μs PULSE WIDTH

1.0

3

4

5

6

7

8

9

-60 -40 -20 0 20 40 60 80 100120140160180

, Junction Temperature (°C)

T

J

V

, Gate-to-Source Voltage (V)

GS

Fig 6. Normalized On-Resistance vs. Temperature

Fig 5. Typical Transfer Characteristics

100000

10000

1000

14.0

V

= 0V,

= C

f = 1 MHZ

GS

I = 100A

D

C

+ C , C

SHORTED

iss

gs

gd

ds

12.0

= C

rss

oss

gd

= C + C

V

= 32V

= 20V

DS

ds

gd

V

10.0

8.0

6.0

4.0

2.0

0.0

DS

C

iss

oss

rss

C

100

1

10

, Drain-to-Source Voltage (V)

100

0

20

40

60

80

100

120

V

Q , Total Gate Charge (nC)

DS

G

Fig 7. Typical Capacitance vs. Drain-to-Source Voltage

Fig 8. Typical Gate Charge vs. Gate-to-Source Voltage

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November 19, 2014

IRFS7440PbF/IRFSL7440PbF

1000

100

10

10000

OPERATION IN THIS AREA

LIMITED BY R

(on)

DS

T

= 175°C

1000

100

10

J

100μsec

1msec

Limited by

package

T

= 25°C

J

10msec

DC

1

Tc = 25°C

Tj = 175°C

Single Pulse

V

= 0V

GS

0.1

0.0

0.5

1.0

1.5

2.0

2.5

0.1

1

10

100

V

, Source-to-Drain Voltage (V)

V

, Drain-to-Source Voltage (V)

SD

DS

Fig 10. Maximum Safe Operating Area

Fig 9. Typical Source-Drain Diode

Forward Voltage

0.8

50

49

48

47

46

45

44

43

42

41

40

Id = 5.0mA

V

= 0V to 32V

DS

0.6

0.4

0.2

0.0

0

5

10 15 20 25 30 35 40 45

Drain-to-Source Voltage (V)

-60 -40 -20 0 20 40 60 80 100120140160180

, Temperature ( °C )

T

J

V

DS,

Fig 11. Drain-to-Source Breakdown Voltage

Fig 12. Typical C_OSSStored Energy

40

V

= 5.5V

GS

= 6.0V

= 7.0V

= 8.0V

=10V

GS

30

20

10

0

100 200 300 400 500 600 700 800

I , Drain Current (A)

D

Fig 13. Typical On-Resistance vs. Drain Current

5

November 19, 2014

IRFS7440PbF/IRFSL7440PbF

1

D = 0.50

0.20

0.10

0.1

0.05

0.02

0.01

Notes:

SINGLE PULSE

( THERMAL RESPONSE )

1. Duty Factor D = t1/t2

2. Peak Tj = P dm x Zthjc + Tc

0.001

1E-006

1E-005

0.0001

0.001

0.01

0.1

t

, Rectangular Pulse Duration (sec)

1

Fig 14. Maximum Effective Transient Thermal Impedance, Junction-to-Case

1000

100

10

Allowed avalanche Current vs avalanche

pulsewidth, tav, assuming ΔTj = 150°C and

Tstart =25°C (Single Pulse)

Allowed avalanche Current vs avalanche

pulsewidth, tav, assuming ΔΤ j = 25°C and

Tstart = 150°C.

1

1.0E-06

1.0E-05

1.0E-04

1.0E-03

1.0E-02

1.0E-01

tav (sec)

Fig 15. Typical Avalanche Current vs.Pulsewidth

Notes on Repetitive Avalanche Curves , Figures 14, 15:

(For further info, see AN-1005 at www.irf.com)

1. Avalanche failures assumption:

Purely a thermal phenomenon and failure occurs at a temperature far in

excess of T_jmax. This is validated for every part type.

2. Safe operation in Avalanche is allowed as long asT_jmaxis not exceeded.

3. Equation below based on circuit and waveforms shown in Figures 16a, 16b.

4. P_{D (ave)}= Average power dissipation per single avalanche pulse.

5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase

during avalanche).

6. I_av= Allowable avalanche current.

7. ΔT = Allowable rise in junction temperature, not to exceed T_jmax(assumed as

25°C in Figure 14, 15).

t_{av =}Average time in avalanche.

D = Duty cycle in avalanche = t_av·f

250

200

150

100

50

TOP

BOTTOM 1.0% Duty Cycle

= 100A

Single Pulse

I

D

Z_thJC(D, t_av) = Transient thermal resistance, see Figures 13)

P_{D (ave)}= 1/2 ( 1.3·BV·I_av) = DT/ Z_thJC

I_av= 2DT/ [1.3·BV·Z_th]

0

25

50

75

100

125

150

175

E_{AS (AR)}= P_{D (ave)}·t_av

Starting T , Junction Temperature (°C)

J

Fig 16. Maximum Avalanche Energy vs. Temperature

6

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IRFS7440PbF/IRFSL7440PbF

5.0

4.0

3.0

2.0

1.0

8

I = 60A

F

7

6

5

4

3

2

1

V

= 34V

R

T = 25°C

J

T = 125°C

J

I

= 100μA

= 1.0mA

= 1.0A

D

0

200

400

600

800

1000

-75 -50 -25

0

25 50 75 100 125 150 175

T , Temperature ( °C )

di /dt (A/μs)

F

J

Fig. 18 - Typical Recovery Current vs. di_f/dt

Fig 17. Threshold Voltage vs. Temperature

8

110

I = 100A

F

I = 60A

F

7

100

V

= 34V

V

= 34V

R

T = 25°C

J

6

5

4

3

2

1

90

80

70

60

50

40

T = 125°C

J

T = 125°C

J

0

200

400

600

800

1000

0

200

400

600

800

1000

di /dt (A/μs)

F

Fig. 19 - Typical Recovery Current vs. di_f/dt

Fig. 20 - Typical Stored Charge vs. di_f/dt

100

I = 100A

F

V

= 34V

R

80

60

40

20

0

T = 25°C

J

T = 125°C

J

0

200

400

600

800

1000

di /dt (A/μs)

F

Fig. 21 - Typical Stored Charge vs. di_f/dt

7

November 19, 2014

IRFS7440PbF/IRFSL7440PbF

Driver Gate Drive

P.W.

D.U.T

Period

D =

Period

P.W.

+

-

*

=10V

V

GS

Circuit Layout Considerations

• Low Stray Inductance

• Ground Plane

• Low Leakage Inductance

Current Transformer

D.U.T. I Waveform

SD

+

-

Reverse

Recovery

Current

Body Diode Forward

Current

di/dt

-

+

D.U.T. V Waveform

DS

Diode Recovery

dv/dt

V

DD

V_DD

Re-Applied

Voltage

• dv/dt controlled by R_G

R_G

+

-

Body Diode

Forward Drop

• Driver same type as D.U.T.

• I_SDcontrolled by Duty Factor "D"

• D.U.T. - Device Under Test

Inductor Current

Inductor Curent

I

SD

Ripple

≤ 5%

* V_GS= 5V for Logic Level Devices

Fig 22. Peak Diode Recovery dv/dt Test Circuit for N-Channel

HEXFET^®Power MOSFETs

V

(BR)DSS

15V

t

p

DRIVER

+

L

V

DS

D.U.T

AS

R

G

V

DD

-

I

A

2V0_GV_S

Ω

0.01

t

p

I

AS

Fig 22b. Unclamped Inductive Waveforms

Fig 22a. Unclamped Inductive Test Circuit

R_D

V_DS

V

DS

90%

V_GS

D.U.T.

R_G

+

V_DD

-

10V

V_GS

10%

Pulse Width ≤ 1 µs

Duty Factor ≤ 0.1 %

V

GS

t

r

t

f

d(on)

d(off)

Fig 23a. Switching Time Test Circuit

Fig 23b. Switching Time Waveforms

Id

Current Regulator

Same Type as D.U.T.

Vds

Vgs

50KΩ

.2μF

12V

.3μF

+

V

DS

D.U.T.

-

Vgs(th)

V

GS

3mA

I

D

G

Qgs1

Qgs2

Qgd

Qgodr

Current Sampling Resistors

Fig 24a. Gate Charge Test Circuit

Fig 24b. Gate Charge Waveform

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November 19, 2014

IRFS7440PbF/IRFSL7440PbF

D²Pak(TO-263AB)PackageOutline

Dimensions are shown in millimeters (inches)

D²Pak (TO-263AB) Part Marking Information

INTERNATIONAL

RECTIFIER LOGO

INTERNATIONAL

RECTIFIER LOGO

PART NUMBER

IRFS7440

OR

PYWW?

YWWP

ASSEMBLY

LOT CODE

ASSEMBLY

LOT CODE

DATE CODE

P = LEAD-FREE

LC

Y = LAST DIGIT OF YEAR

WW = WORK WEEK

P = LEAD-FREE

Y = LAST DIGIT OF YEAR

WW = WORK WEEK

? = ASSEMBLY SITE CODE

Note: For the most current drawing please refer to IR website at: http://www.irf.com/package/

9

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IRFS7440PbF/IRFSL7440PbF

TO-262 Package Outline

Dimensions are shown in millimeters (inches)

TO-262 Part Marking Information

PART NUMBER

INTERNATIONAL

RECTIFIER LOGO

INTERNATIONAL

RECTIFIER LOGO

IRFSL7440

OR

PYWW?

YWWP

ASSEMBLY

LOT CODE

ASSEMBLY

LOT CODE

DATE CODE

P = LEAD-FREE

Y = LAST DIGIT OF YEAR

WW = WORK WEEK

Y = LAST DIGIT OF YEAR

WW = WORK WEEK

P = LEAD-FREE

LC LC

? = ASSEMBLY SITE CODE

Note: For the most current drawing please refer to IR website at: http://www.irf.com/package/

10

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November 19, 2014

IRFS7440PbF/IRFSL7440PbF

D²Pak (TO-263AB) Tape & Reel Information Dimensions are shown in millimeters (inches)

TRR

1.60 (.063)

1.50 (.059)

1.60 (.063)

1.50 (.059)

4.10 (.161)

3.90 (.153)

0.368 (.0145)

0.342 (.0135)

FEED DIRECTION

TRL

11.60 (.457)

11.40 (.449)

1.85 (.073)

1.65 (.065)

24.30 (.957)

23.90 (.941)

15.42 (.609)

15.22 (.601)

1.75 (.069)

1.25 (.049)

10.90 (.429)

10.70 (.421)

4.72 (.136)

4.52 (.178)

16.10 (.634)

15.90 (.626)

FEED DIRECTION

13.50 (.532)

12.80 (.504)

27.40 (1.079)

23.90 (.941)

4

330.00

(14.173)

MAX.

60.00 (2.362)

MIN.

30.40 (1.197)

MAX.

NOTES :

1. COMFORMS TO EIA-418.

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSION MEASURED @ HUB.

4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.

26.40 (1.039)

24.40 (.961)

4

3

Note: For the most current drawing please refer to IR website at: http://www.irf.com/package/

11

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IRFS7440PbF/IRFSL7440PbF

Qualification information^†

Industrial^††

(per JEDEC JESD47F^†††guidelines)

Qualification level

D2Pak

MSL1

(per JEDEC J-S TD-020D^†††

Moisture Sensitivity Level

RoHS compliant

)

TO-262

Yes

Qualification standards can be found at International Rectifiers web site: http://www.irf.com/product-info/reliability/

Higher qualification ratings may be available should the user have such requirements. Please contact your

International Rectifier sales representative for further information: http:www.irf.com/whoto-call/salesrep/

Applicable version of JEDEC standard at the time of product release.

Revision History

Date

Comment

•

Updated data sheet based on corporate template.

Updated package outline and part marking on page 9 & 10.

Updated E_{AS (L =1mH)}= 560mJ on page 2

4/30/2014

11/19/2014

•

Ω

Updated note 9 “Limited by T_Jmax, starting T_J= 25°C, L = 1mH, R_G= 50 , I_AS= 34A, V_GS=10V”. on page 2

IR WORLD HEADQUARTERS: 101 N. Sepulveda Blvd., El Segundo, California 90245, USA

To contact International Rectifier, please visithttp://www.irf.com/whoto-call/

12

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November 19, 2014

IMPORTANT NOTICE

The information given in this document shall in no For further information on the product, technology,

event be regarded as a guarantee of conditions or delivery terms and conditions and prices please

characteristics (“Beschaffenheitsgarantie”) .

contact your nearest Infineon Technologies office

(www.infineon.com).

With respect to any examples, hints or any typical

values stated herein and/or any information

regarding the application of the product, Infineon

Technologies hereby disclaims any and all

warranties and liabilities of any kind, including

without limitation warranties of non-infringement

of intellectual property rights of any third party.

WARNINGS

Due to technical requirements products may

contain dangerous substances. For information on

the types in question please contact your nearest

Infineon Technologies office.

In addition, any information given in this document

is subject to customer’s compliance with its

obligations stated in this document and any

applicable legal requirements, norms and

standards concerning customer’s products and any

use of the product of Infineon Technologies in

customer’s applications.

Except as otherwise explicitly approved by Infineon

Technologies in a written document signed by

authorized

representatives

of

Infineon

Technologies, Infineon Technologies’ products may

not be used in any applications where a failure of

the product or any consequences of the use thereof

can reasonably be expected to result in personal

injury.

The data contained in this document is exclusively

intended for technically trained staff. It is the

responsibility of customer’s technical departments

to evaluate the suitability of the product for the

intended application and the completeness of the

product information given in this document with

respect to such application.


型号：	IRFS7440
厂家：	Infineon
描述：	The StrongIRFET™ power MOSFET family is optimized for low RDS(on) and high current capability. The devices are ideal for low frequency applications requiring performance and ruggedness. The comprehensive portfolio addresses a broad range of applications including DC motors, battery management systems, inverters, and DC-DC converters.
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中文：	中文翻译
下载：	下载PDF数据表文档文件

IRFS7440 [INFINEON]

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