IRFS7730 [INFINEON]

75V 单个 N 通道 HEXFET Power MOSFET, 采用 D2-Pak 封装;
IRFS7730
型号: IRFS7730
厂家: Infineon    Infineon
描述:

75V 单个 N 通道 HEXFET Power MOSFET, 采用 D2-Pak 封装

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StrongIRFET™  
IRFB7730PbF  
IRFS7730PbF  
IRFSL7730PbF  
HEXFET® Power MOSFET  
Application  
Brushed motor drive applications  
BLDC motor drive applications  
Battery powered circuits  
Half-bridge and full-bridge topologies  
Synchronous rectifier applications  
Resonant mode power supplies  
OR-ing and redundant power switches  
DC/DC and AC/DC converters  
DC/AC inverters  
VDSS  
75V  
RDS(on) typ.  
max  
2.2m  
2.6m  
246A  
ID (Silicon Limited)  
ID (Package Limited)  
195A  
D
D
S
Benefits  
S
S
D
G
Improved gate, avalanche and dynamic dV/dt ruggedness  
Fully characterized capacitance and avalanche SOA  
Enhanced body diode dV/dt and dI/dt capability  
Lead-free, RoHS compliant  
D
G
G
G
D
S
Gate  
Drain  
Source  
Base part number  
Package Type  
Standard Pack  
Form  
Orderable Part Number  
Quantity  
50  
IRFB7730PbF  
IRFSL7730PbF  
IRFS7730PbF  
TO-220  
TO-262  
D2-Pak  
Tube  
IRFB7730PbF  
IRFSL7730PbF  
IRFS7730PbF  
Tube  
50  
Tube  
50  
Tape and Reel Left  
800  
IRFS7730TRLPbF  
8
6
4
2
0
250  
200  
150  
100  
50  
I
= 100A  
D
Limited by package  
T
= 125°C  
J
T
= 25°C  
J
0
4
6
8
10 12 14 16 18 20  
25  
50  
75  
100  
125  
150  
175  
T
, Case Temperature (°C)  
C
V
Gate -to -Source Voltage (V)  
GS,  
Fig 2. Maximum Drain Current vs. Case Temperature  
Fig 1. Typical On-Resistance vs. Gate Voltage  
1
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November 7, 2014  
IRFB/S/SL7730PbF  
Absolute Maximum Rating  
Symbol  
Parameter  
Max.  
246  
174  
Units  
ID @ TC = 25°C  
Continuous Drain Current, VGS @ 10V (Silicon Limited)  
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V (Silicon Limited)  
A
ID @ TC = 25°C  
IDM  
Continuous Drain Current, VGS @ 10V (Package Limited)  
Pulsed Drain Current   
195  
984*  
375  
PD @TC = 25°C  
Maximum Power Dissipation  
W
W/°C  
V
Linear Derating Factor  
2.5  
VGS  
Gate-to-Source Voltage  
± 20  
TJ  
TSTG  
Operating Junction and  
Storage Temperature Range  
-55 to + 175  
°C  
Soldering Temperature, for 10 seconds (1.6mm from case)  
300  
Mounting Torque, 6-32 or M3 Screw  
10 lbf·in (1.1 N·m)  
Avalanche Characteristics  
Symbol  
EAS (Thermally limited)  
EAS (Thermally limited)  
IAR  
Max.  
465  
898  
Units  
Parameter  
Single Pulse Avalanche Energy   
Single Pulse Avalanche Energy   
Avalanche Current   
mJ  
A
mJ  
See Fig 15, 16, 23a, 23b  
EAR  
Repetitive Avalanche Energy   
Thermal Resistance  
Symbol  
Parameter  
Typ.  
–––  
0.50  
–––  
–––  
Max.  
0.40  
–––  
62  
Units  
Junction-to-Case   
RJC  
RCS  
RJA  
RJA  
Case-to-Sink, Flat Greased Surface  
Junction-to-Ambient (TO-220)  
°C/W  
Junction-to-Ambient (PCB Mount) (D2Pak)   
40  
Static @ TJ = 25°C (unless otherwise specified)  
Symbol  
Parameter  
Min. Typ. Max. Units  
Conditions  
V(BR)DSS  
Drain-to-Source Breakdown Voltage  
Breakdown Voltage Temp. Coefficient  
Static Drain-to-Source On-Resistance  
75  
––– –––  
V
VGS = 0V, ID = 250µA  
–––  
–––  
–––  
2.1 –––  
––– –––  
––– ––– 150  
––– ––– 100  
––– ––– -100  
40  
2.2  
2.6  
––– mV/°C Reference to 25°C, ID = 1mA   
V(BR)DSS/TJ  
RDS(on)  
2.6  
–––  
3.7  
VGS = 10V, ID = 100A   
m  
V
VGS = 6.0V, ID = 50A   
VDS = VGS, ID = 250µA  
VGS(th)  
IDSS  
Gate Threshold Voltage  
1.0  
VDS = 75 V, VGS = 0V  
Drain-to-Source Leakage Current  
µA  
VDS = 75V,VGS = 0V,TJ = 125°C  
Gate-to-Source Forward Leakage  
Gate-to-Source Reverse Leakage  
Gate Resistance  
V
V
GS = 20V  
GS = -20V  
IGSS  
nA  
RG  
–––  
2.1  
–––  
  
Notes:  
Calculated continuous current based on maximum allowable junction temperature. Bond wire current limit is 195A by  
source bonding technology. Note that current limitations arising from heating of the device leads may occur with  
some lead mounting arrangements. (Refer to AN-1140)  
Repetitive rating; pulse width limited by max. junction temperature.  
Limited by TJmax, starting TJ = 25°C, L = 93µH, RG = 50, IAS = 100A, VGS =10V.  
ISD 100A, di/dt 1626A/µs, VDD V(BR)DSS, TJ 175°C.  
Pulse width 400µs; duty cycle 2%.  
Coss eff. (TR) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS  
.
Coss eff. (ER) is a fixed capacitance that gives the same energy as Coss while VDS is rising from 0 to 80% VDSS  
.
Ris measured at TJ approximately 90°C.  
Limited by TJmax, starting TJ = 25°C, L = 1mH, RG = 50, IAS = 42A, VGS =10V.  
When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques  
refer to application note #AN-994: http://www.irf.com/technical-info/appnotes/an-994.pdf  
* Pulse drain current is limited at 780A by source bonding technology.  
2
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November 7, 2014  
IRFB/S/SL7730PbF  
Dynamic Electrical Characteristics @ TJ = 25°C (unless otherwise specified)  
Symbol  
gfs  
Parameter  
Forward Transconductance  
Total Gate Charge  
Min.  
249  
–––  
–––  
–––  
–––  
–––  
–––  
Typ. Max. Units  
Conditions  
VDS = 10V, ID =100A  
ID = 100A  
–––  
271  
55  
–––  
407  
–––  
–––  
–––  
–––  
–––  
S
Qg  
Qgs  
Gate-to-Source Charge  
Gate-to-Drain Charge  
Total Gate Charge Sync. (Qg– Qgd)  
Turn-On Delay Time  
VDS = 38V  
nC  
Qgd  
79  
VGS = 10V  
Qsync  
td(on)  
tr  
192  
21  
VDD = 38V  
ID = 100A  
Rise Time  
120  
ns  
td(off)  
tf  
Turn-Off Delay Time  
Fall Time  
–––  
–––  
180  
115  
–––  
–––  
RG= 2.7  
VGS = 10V  
Ciss  
Coss  
Crss  
Input Capacitance  
Output Capacitance  
Reverse Transfer Capacitance  
––– 13660 –––  
VGS = 0V  
–––  
–––  
1120  
690  
–––  
–––  
VDS = 25V  
ƒ = 1.0MHz, See Fig.7  
pF  
Effective Output Capacitance  
(Energy Related)  
Coss eff.(ER)  
Coss eff.(TR)  
–––  
–––  
1060  
1275  
–––  
–––  
VGS = 0V, VDS = 0V to 60V  
VGS = 0V, VDS = 0V to 60V  
Output Capacitance (Time Related)  
Diode Characteristics  
Symbol  
Parameter  
Min.  
Typ. Max. Units  
Conditions  
MOSFET symbol  
D
Continuous Source Current  
(Body Diode)  
IS  
–––  
––– 246  
showing the  
A
G
Pulsed Source Current  
(Body Diode)  
integral reverse  
p-n junction diode.  
ISM  
–––  
–––  
–––  
–––  
984*  
S
VSD  
Diode Forward Voltage  
1.2  
V
TJ = 25°C,IS = 100A,VGS = 0V   
dv/dt  
Peak Diode Recovery dv/dt  
–––  
–––  
–––  
–––  
–––  
–––  
16  
44  
51  
70  
97  
2.6  
––– V/ns TJ = 175°C,IS =100A,VDS = 75V  
–––  
–––  
–––  
–––  
–––  
TJ = 25°C  
VDD = 64V  
IF = 100A,  
trr  
Reverse Recovery Time  
ns  
TJ = 125°C  
TJ = 25°C di/dt = 100A/µs   
Qrr  
Reverse Recovery Charge  
Reverse Recovery Current  
nC  
A
TJ = 125°C  
TJ = 25°C  
IRRM  
3
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November 7, 2014  
IRFB/S/SL7730PbF  
10000  
1000  
100  
10000  
1000  
100  
10  
VGS  
15V  
10V  
8.0V  
7.0V  
6.0V  
5.5V  
5.0V  
4.5V  
VGS  
15V  
10V  
8.0V  
7.0V  
6.0V  
5.5V  
5.0V  
4.5V  
TOP  
TOP  
BOTTOM  
BOTTOM  
4.5V  
4.5V  
60µs PULSE WIDTH  
Tj = 175°C  
60µs PULSE WIDTH  
Tj = 25°C  
10  
1
0.1  
1
10  
100  
0.1  
1
10  
100  
V
, Drain-to-Source Voltage (V)  
V
, Drain-to-Source Voltage (V)  
DS  
DS  
Fig 4. Typical Output Characteristics  
Fig 3. Typical Output Characteristics  
2.4  
2.0  
1.6  
1.2  
0.8  
0.4  
1000  
100  
10  
I
= 100A  
D
V
= 10V  
GS  
T = 175°C  
J
T = 25°C  
J
1
V
= 25V  
DS  
60µs PULSE WIDTH  
0.1  
-60 -40 -20  
0 20 40 60 80 100120140160180  
2.0  
3.0  
4.0  
5.0  
6.0  
7.0  
T , Junction Temperature (°C)  
V
, Gate-to-Source Voltage (V)  
J
GS  
Fig 6. Normalized On-Resistance vs. Temperature  
Fig 5. Typical Transfer Characteristics  
14.0  
1000000  
100000  
10000  
1000  
V
= 0V,  
f = 1 MHZ  
GS  
I = 100A  
D
C
C
C
= C + C , C  
SHORTED  
iss  
gs  
gd  
ds  
12.0  
= C  
V
V
V
= 60V  
DS  
= 38V  
DS  
= 15V  
DS  
rss  
oss  
gd  
= C + C  
ds  
gd  
10.0  
8.0  
6.0  
4.0  
2.0  
0.0  
C
iss  
C
oss  
C
rss  
100  
0
50  
100 150 200 250 300 350  
1
10  
100  
Q , Total Gate Charge (nC)  
G
V
, Drain-to-Source Voltage (V)  
DS  
Fig 8. Typical Gate Charge vs.  
Fig 7. Typical Capacitance vs. Drain-to-Source Voltage  
Gate-to-Source Voltage  
4
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IRFB/S/SL7730PbF  
1000  
100  
10  
1000  
100  
10  
100µsec  
1msec  
T = 175°C  
J
Limited by  
package  
OPERATION  
IN THIS  
AREA  
T = 25°C  
J
LIMITED BY  
R
(on)  
DS  
10msec  
1
Tc = 25°C  
Tj = 175°C  
Single Pulse  
DC  
V
= 0V  
GS  
0.1  
1.0  
0.1  
1
10  
0.2  
0.6  
1.0  
1.4  
1.8  
2.2  
V
, Drain-toSource Voltage (V)  
V
, Source-to-Drain Voltage (V)  
SD  
DS  
Fig 10. Maximum Safe Operating Area  
Fig 9. Typical Source-Drain Diode Forward Voltage  
95  
6.0  
Id = 1.0mA  
5.0  
4.0  
3.0  
2.0  
1.0  
0.0  
90  
85  
80  
75  
-10  
0
10 20 30 40 50 60 70 80  
-60 -40 -20  
0
20 40 60 80 100120140160180  
, Temperature ( °C )  
T
J
V
Drain-to-Source Voltage (V)  
DS,  
Fig 11. Drain-to-Source Breakdown Voltage  
Fig 12. Typical Coss Stored Energy  
3.0  
2.8  
2.6  
2.4  
2.2  
Vgs = 5.5V  
Vgs = 6.0V  
Vgs = 7.0V  
Vgs = 8.0V  
Vgs = 10V  
2.0  
0
20 40 60 80 100 120 140 160 180 200  
, Drain Current (A)  
I
D
Fig 13. Typical On-Resistance vs. Drain Current  
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November 7, 2014  
IRFB/S/SL7730PbF  
1
0.1  
D = 0.50  
0.20  
0.10  
0.05  
0.01  
0.02  
0.01  
0.001  
SINGLE PULSE  
( THERMAL RESPONSE )  
Notes:  
1. Duty Factor D = t1/t2  
2. Peak Tj = P dm x Zthjc + Tc  
0.0001  
1E-006  
1E-005  
0.0001  
0.001  
0.01  
0.1  
1
t
, Rectangular Pulse Duration (sec)  
1
Fig 14. Maximum Effective Transient Thermal Impedance, Junction-to-Case  
1000  
100  
10  
Allowed avalanche Current vs avalanche  
pulsewidth, tav, assuming Tj = 150°C and  
Tstart = 25°C (Single Pulse)  
Allowed avalanche Current vs avalanche  
  
pulsewidth, tav, assuming j = 25°C and  
Tstart = 150°C.  
1
1.0E-06  
1.0E-05  
1.0E-04  
tav (sec)  
1.0E-03  
1.0E-02  
Fig 15. Avalanche Current vs. Pulse Width  
500  
400  
300  
200  
100  
0
TOP  
BOTTOM 1.0% Duty Cycle  
= 100A  
Single Pulse  
Notes on Repetitive Avalanche Curves , Figures 15, 16:  
(For further info, see AN-1005 at www.irf.com)  
1.Avalanche failures assumption:  
I
D
Purely a thermal phenomenon and failure occurs at a  
temperature far in excess of Tjmax. This is validated for every  
part type.  
2. Safe operation in Avalanche is allowed as long asTjmax is not  
exceeded.  
3. Equation below based on circuit and waveforms shown in Figures  
23a, 23b.  
4. PD (ave) = Average power dissipation per single avalanche pulse.  
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage  
increase during avalanche).  
6. Iav = Allowable avalanche current.  
7. T = Allowable rise in junction temperature, not to exceed Tjmax  
(assumed as 25°C in Figure 15, 16).  
tav = Average time in avalanche.  
D = Duty cycle in avalanche = tav ·f  
25  
50  
75  
100  
125  
150  
175  
ZthJC(D, tav) = Transient thermal resistance, see Figures 13)  
Starting T , Junction Temperature (°C)  
J
PD (ave) = 1/2 ( 1.3·BV·Iav) = T/ ZthJC  
I
av = 2T/ [1.3·BV·Zth]  
EAS (AR) = PD (ave)· av  
t
Fig 16. Maximum Avalanche Energy vs. Temperature  
6
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November 7, 2014  
IRFB/S/SL7730PbF  
4.0  
3.5  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
20  
15  
10  
5
I = 60A  
F
V
= 64V  
R
T = 25°C  
J
T = 125°C  
J
I
= 250µA  
= 1.0mA  
= 1.0A  
D
I
D
I
D
0
-75 -50 -25  
0
25 50 75 100 125 150 175  
0
200  
400  
600  
800  
1000  
T , Temperature ( °C )  
di /dt (A/µs)  
J
F
Fig 17. Threshold Voltage vs. Temperature  
Fig 18. Typical Recovery Current vs. dif/dt  
500  
20  
I = 100A  
F
I = 60A  
F
V
= 64V  
V
= 64V  
R
R
400  
300  
200  
100  
0
T = 25°C  
J
T = 125°C  
J
T = 25°C  
J
T = 125°C  
J
15  
10  
5
0
0
200  
400  
600  
800  
1000  
0
200  
400  
600  
800  
1000  
di /dt (A/µs)  
di /dt (A/µs)  
F
F
Fig 19. Typical Recovery Current vs. dif/dt  
Fig 20. Typical Stored Charge vs. dif/dt  
500  
I = 100A  
F
V
= 64V  
R
400  
300  
200  
100  
0
T = 25°C  
J
T = 125°C  
J
0
200  
400  
600  
800  
1000  
di /dt (A/µs)  
F
Fig 21. Typical Stored Charge vs. dif/dt  
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November 7, 2014  
IRFB/S/SL7730PbF  
Fig 22. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs  
V
(BR)DSS  
15V  
t
p
DRIVER  
+
L
V
DS  
D.U.T  
AS  
R
G
V
DD  
-
I
A
20V  
0.01  
t
p
I
AS  
Fig 23a. Unclamped Inductive Test Circuit  
Fig 23b. Unclamped Inductive Waveforms  
Fig 24a. Switching Time Test Circuit  
Fig 24b. Switching Time Waveforms  
Id  
Vds  
Vgs  
VDD  
Vgs(th)  
Qgs1  
Qgs2  
Qgd  
Qgodr  
Fig 25b. Gate Charge Waveform  
Fig 25a. Gate Charge Test Circuit  
8
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IRFB/S/SL7730PbF  
TO-220AB Package Outline (Dimensions are shown in millimeters (inches))  
TO-220AB Part Marking Information  
E X A M P L E :  
T H IS IS A N IR F 1 0 1 0  
L O C O D E 1 7 8 9  
A S S E M B L E D  
IN T H A S S E M B L Y L IN  
P A R T N U M B E R  
D A T E C O D E  
T
IN T E R N A T IO  
R E C T IF IE R  
L O  
N A L  
O
N
W
W
1 9 , 2 0 0 0  
"C "  
G
O
E
E
Y E A R  
E E K 1 9  
L IN  
0
=
2 0 0 0  
N
o t e : "P " in a s s e m b ly lin e p o s it io n  
in d ic a t e s "L e a d F r e e "  
A S S E M B L Y  
L O C O D E  
W
-
T
E
C
TO-220AB packages are not recommended for Surface Mount Application.  
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/  
9
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IRFB/S/SL7730PbF  
TO-262 Package Outline (Dimensions are shown in millimeters (inches)  
TO-262 Part Marking Information  
EXAMPLE: THISIS AN IRL3103L  
LOTCODE1789  
PART NUMBER  
INTERNATIONAL  
ASSEMBLED ON WW19, 1997  
RECTIFIER  
INTHEASSEMBLYLINE"C"  
LOGO  
DATE CODE  
YEAR7 = 1997  
WEEK 19  
ASSEMBLY  
LOT CODE  
LINEC  
OR  
PART NUMBER  
INTERNATIONAL  
RECTIFIER  
LOGO  
DATE CODE  
P = DESIGNATES LEAD-FREE  
PRODUCT (OPTIONAL)  
YEAR7 = 1997  
ASSEMBLY  
LOT CODE  
WEEK 19  
A = ASSEMBLYSITE CODE  
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/  
10  
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November 7, 2014  
IRFB/S/SL7730PbF  
D2Pak (TO-263AB) Package Outline (Dimensions are shown in millimeters (inches))  
D2Pak (TO-263AB) Part Marking Information  
THIS IS AN IRF530S WITH  
LOT CODE 8024  
PART NUMBER  
INTERNATIONAL  
RECTIFIER  
LOGO  
ASSEMBLED ON WW 02, 2000  
IN THE ASSEMBLY LINE "L"  
F530S  
DATE CODE  
YEAR 0 = 2000  
WEEK 02  
ASSEMBLY  
LOT CODE  
LINE L  
OR  
PART NUMBER  
INTERNATIONAL  
RECTIFIER  
LOGO  
F530S  
DATE CODE  
P = DESIGNATES LEAD - FREE  
PRODUCT (OPTIONAL)  
ASSEMBLY  
LOT CODE  
YEAR 0 = 2000  
WEEK 02  
A = ASSEMBLY SITE CODE  
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/  
11  
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November 7, 2014  
IRFB/S/SL7730PbF  
D2Pak (TO-263AB) Tape & Reel Information (Dimensions are shown in millimeters (inches))  
TRR  
1.60 (.063)  
1.50 (.059)  
1.60 (.063)  
1.50 (.059)  
4.10 (.161)  
3.90 (.153)  
0.368 (.0145)  
0.342 (.0135)  
FEED DIRECTION  
TRL  
11.60 (.457)  
11.40 (.449)  
1.85 (.073)  
1.65 (.065)  
24.30 (.957)  
23.90 (.941)  
15.42 (.609)  
15.22 (.601)  
1.75 (.069)  
1.25 (.049)  
10.90 (.429)  
10.70 (.421)  
4.72 (.136)  
4.52 (.178)  
16.10 (.634)  
15.90 (.626)  
FEED DIRECTION  
13.50 (.532)  
12.80 (.504)  
27.40 (1.079)  
23.90 (.941)  
4
330.00  
(14.173)  
MAX.  
60.00 (2.362)  
MIN.  
30.40 (1.197)  
MAX.  
NOTES :  
1. COMFORMS TO EIA-418.  
2. CONTROLLING DIMENSION: MILLIMETER.  
3. DIMENSION MEASURED @ HUB.  
4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.  
26.40 (1.039)  
24.40 (.961)  
4
3
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/  
Qualification Information†  
Industrial  
(per JEDEC JESD47F) ††  
Qualification Level  
TO-220  
D2Pak  
TO-262  
N/A  
MSL1  
N/A  
Moisture Sensitivity Level  
Yes  
RoHS Compliant  
Qualification standards can be found at International Rectifier’s web site: http://www.irf.com/product-info/reliability/  
†† Applicable version of JEDEC standard at the time of product release.  
Revision History  
Date  
Comments  
 Updated EAS (L =1mH) = 898mJ on page 2  
 Updated note 9 “Limited by TJmax, starting TJ = 25°C, L = 1mH, RG = 50, IAS = 42A, VGS =10V” on page 2  
 Updated package outline on page 9,10,11.  
11/7/2014  
IR WORLD HEADQUARTERS: 101 N. Sepulveda Blvd., El Segundo, California 90245, USA  
To contact International Rectifier, please visit http://www.irf.com/whoto-call/  
12  
www.irf.com  
© 2014 International Rectifier  
Submit Datasheet Feedback  
November 7, 2014  
IMPORTANT NOTICE  
The information given in this document shall in no For further information on the product, technology,  
event be regarded as a guarantee of conditions or delivery terms and conditions and prices please  
characteristics (“Beschaffenheitsgarantie”) .  
contact your nearest Infineon Technologies office  
(www.infineon.com).  
With respect to any examples, hints or any typical  
values stated herein and/or any information  
regarding the application of the product, Infineon  
Technologies hereby disclaims any and all  
warranties and liabilities of any kind, including  
without limitation warranties of non-infringement  
of intellectual property rights of any third party.  
WARNINGS  
Due to technical requirements products may  
contain dangerous substances. For information on  
the types in question please contact your nearest  
Infineon Technologies office.  
In addition, any information given in this document  
is subject to customers compliance with its  
obligations stated in this document and any  
applicable legal requirements, norms and  
standards concerning customers products and any  
use of the product of Infineon Technologies in  
customers applications.  
Except as otherwise explicitly approved by Infineon  
Technologies in a written document signed by  
authorized  
representatives  
of  
Infineon  
Technologies, Infineon Technologies’ products may  
not be used in any applications where a failure of  
the product or any consequences of the use thereof  
can reasonably be expected to result in personal  
injury.  
The data contained in this document is exclusively  
intended for technically trained staff. It is the  
responsibility of customers technical departments  
to evaluate the suitability of the product for the  
intended application and the completeness of the  
product information given in this document with  
respect to such application.  

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