IRFU1N60A [INFINEON]
SMPS MOSFET; 开关电源MOSFET
| 型号： | IRFU1N60A |
| 厂家： | 
Infineon |
| 描述： | SMPS MOSFET |
| 文件： | 总10页 (文件大小：181K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PD - 91846B
SMPS MOSFET
IRFR1N60A
IRFU1N60A
HEXFET® Power MOSFET
Applications
l Switch Mode Power Supply (SMPS)
l Uninterruptable Power Supply
l Power Factor Correction
VDSS
600V
Rds(on) max
ID
1.4A
7.0Ω
Benefits
l Low Gate Charge Qg results in Simple
Drive Requirement
l Improved Gate, Avalanche and dynamic
dv/dt Ruggedness
l Fully Characterized Capacitance and
Avalanche Voltage and Current
D-Pak
I-Pak
IRFR1N60A
IRFU1N60A
Absolute Maximum Ratings
Parameter
Max.
1.4
Units
ID @ TC = 25°C
ID @ TC = 100°C
IDM
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
0.89
A
5.6
PD @TC = 25°C
Power Dissipation
36
W
W/°C
V
Linear Derating Factor
0.28
VGS
dv/dt
TJ
Gate-to-Source Voltage
± 30
Peak Diode Recovery dv/dt
Operating Junction and
3.8
V/ns
-55 to + 150
TSTG
Storage Temperature Range
Soldering Temperature, for 10 seconds
°C
300 (1.6mm from case )
Applicable Off Line SMPS Topologies:
l Low Power Single Transistor Flyback
Notes through ꢀ are on page 9
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1
3/7/03
IRFR/U1N60A
Static @ TJ = 25°C (unless otherwise specified)
Parameter
Min. Typ. Max. Units
Conditions
VGS = 0V, ID = 250µA
V(BR)DSS
RDS(on)
VGS(th)
Drain-to-Source Breakdown Voltage
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
600 ––– –––
––– ––– 7.0
V
Ω
V
VGS = 10V, ID = 0.84A
2.0
––– 4.0
VDS = VGS, ID = 250µA
––– ––– 25
––– ––– 250
––– ––– 100
––– ––– -100
VDS = 600V, VGS = 0V
IDSS
Drain-to-Source Leakage Current
µA
nA
VDS = 480V, VGS = 0V, TJ = 150°C
VGS = 30V
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
IGSS
VGS = -30V
Dynamic @ TJ = 25°C (unless otherwise specified)
Parameter
Forward Transconductance
Total Gate Charge
Min. Typ. Max. Units
Conditions
VDS = 50V, ID = 0.84A
ID = 1.4A
gfs
0.88 ––– –––
––– ––– 14
––– ––– 2.7
––– ––– 8.1
S
Qg
Qgs
Qgd
td(on)
tr
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
nC VDS = 400V
VGS = 10V, See Fig. 6 and 13
–––
–––
–––
–––
9.8 –––
14 –––
18 –––
20 –––
VDD = 250V
ID = 1.4A
ns
td(off)
tf
Turn-Off Delay Time
Fall Time
RG = 2.15Ω
RD = 178Ω,See Fig. 10
VGS = 0V
Ciss
Coss
Crss
Coss
Coss
Coss eff.
Input Capacitance
––– 229 –––
––– 32.6 –––
Output Capacitance
Reverse Transfer Capacitance
Output Capacitance
Output Capacitance
Effective Output Capacitance
VDS = 25V
–––
2.4 –––
pF
ƒ = 1.0MHz, See Fig. 5
VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
VGS = 0V, VDS = 480V, ƒ = 1.0MHz
VGS = 0V, VDS = 0V to 480V ꢀ
––– 320 –––
––– 11.5 –––
––– 130 –––
Avalanche Characteristics
Parameter
Single Pulse Avalanche Energy
Avalanche Current
Typ.
Max.
93
Units
mJ
EAS
IAR
–––
–––
–––
1.4
A
EAR
Repetitive Avalanche Energy
3.6
mJ
Thermal Resistance
Parameter
Junction-to-Case
Typ.
–––
–––
–––
Max.
3.5
Units
RθJC
RθJA
RθJA
Junction-to-Ambient (PCB mount)
50
°C/W
Junction-to-Ambient
110
Diode Characteristics
Parameter
Min. Typ. Max. Units
Conditions
D
IS
Continuous Source Current
(Body Diode)
MOSFET symbol
1.4
5.6
––– –––
––– –––
showing the
A
G
ISM
Pulsed Source Current
(Body Diode)
integral reverse
p-n junction diode.
S
VSD
trr
Diode Forward Voltage
Reverse Recovery Time
Reverse RecoveryCharge
Forward Turn-On Time
––– ––– 1.6
––– 290 440
––– 510 760
V
TJ = 25°C, IS = 1.4A, VGS = 0V
ns
TJ = 25°C, IF = 1.4A
Qrr
ton
nC di/dt = 100A/µs
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
2
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IRFR/U1N60A
10
10
VGS
15V
10V
VGS
15V
10V
TOP
TOP
8.0V
7.0V
6.0V
5.5V
5.0V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM4.5V
BOTTOM 4.5V
1
1
0.1
4.5V
4.5V
20µs PULSE WIDTH
T = 150 C
J
20µs PULSE WIDTH
°
°
T = 25 C
J
0.1
0.01
1
10
100
0.1
1
10
100
V
, Drain-to-Source Voltage (V)
V
, Drain-to-Source Voltage (V)
DS
DS
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
10
3.0
1.4A
=
I
D
2.5
2.0
1.5
1.0
0.5
0.0
°
T = 150 C
J
1
°
T = 25 C
J
V
= 100V
DS
20µs PULSE WIDTH
V
=10V
GS
0.1
4.0
-60 -40 -20
0
20 40 60 80 100 120 140 160
°
5.0
6.0
7.0 8.0
9.0
T , Junction Temperature( C)
J
V
, Gate-to-Source Voltage (V)
GS
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance
Vs. Temperature
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3
IRFR/U1N60A
10000
20
16
12
8
V
C
C
C
= 0V,
f = 1MHz
I = 1.4A
D
GS
iss
rss
oss
= C + C
,
C
SHORTED
gs
gd
ds
V
V
V
= 480V
= 300V
= 120V
DS
DS
DS
= C
gd
= C + C
ds
gd
1000
100
10
C
iss
C
oss
4
FOR TEST CIRCUIT
SEE FIGURE 13
C
rss
1
A
0
1
10
100
1000
0
2
4
6
8
10
12
14
V
, Drain-to-Source Voltage (V)
Q
, Total Gate Charge (nC)
DS
G
Fig 6. Typical Gate Charge Vs.
Fig 5. Typical Capacitance Vs.
Gate-to-Source Voltage
Drain-to-Source Voltage
100
10
1
10
OPERATION IN THIS AREA LIMITED
BY R
DS(on)
°
T = 150 C
J
10us
100us
1ms
1
°
T = 25 C
J
°
T = 25 C
C
°
T = 150 C
Single Pulse
J
10ms
1000
V
= 0 V
GS
0.1
0.4
0.1
0.6
0.8
1.0
1.2
10
100
10000
V
,Source-to-Drain Voltage (V)
V
, Drain-to-Source Voltage (V)
SD
DS
Fig 8. Maximum Safe Operating Area
Fig 7. Typical Source-Drain Diode
Forward Voltage
4
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IRFR/U1N60A
RD
1.6
1.2
0.8
0.4
0.0
VDS
VGS
D.U.T.
RG
+VDD
-
10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 10a. Switching Time Test Circuit
V
DS
90%
25
50
75
100
125
150
°
T , Case Temperature ( C)
C
10%
V
GS
t
t
r
t
t
f
Fig 9. Maximum Drain Current Vs.
d(on)
d(off)
Case Temperature
Fig 10b. Switching Time Waveforms
10
D = 0.50
0.20
1
0.10
0.05
P
2
DM
0.02
0.01
SINGLE PULSE
(THERMAL RESPONSE)
0.1
t
1
t
2
Notes:
1. Duty factor D = t / t
1
2. Peak T =P
x Z
+ T
C
J
DM
thJC
0.01
0.00001
0.0001
0.001
0.01
0.1
1
t , Rectangular Pulse Duration (sec)
1
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRFR/U1N60A
200
160
120
80
15V
I
D
TOP
0.65A
0.9A
BOTTOM 1.4A
DRIVER
+
L
V
DS
D.U.T
R
G
V
DD
-
I
A
AS
20V
t
0.01Ω
p
Fig 12a. Unclamped Inductive Test Circuit
V
(BR)DSS
40
t
p
0
25
50
75
100
125
150
°
Starting T , Junction Temperature( C)
J
I
AS
Fig 12c. Maximum Avalanche Energy
Fig 12b. Unclamped Inductive Waveforms
Vs. Drain Current
Q
G
10 V
770
Q
Q
GD
GS
V
750
730
710
690
670
G
Charge
Fig 13a. Basic Gate Charge Waveform
Current Regulator
Same Type as D.U.T.
50KΩ
.2µF
12V
.3µF
+
V
DS
D.U.T.
-
A
0.0
0.4
0.8
1.2
1.6
V
GS
I
, Avalanche Current (A)
av
3mA
I
I
D
G
Current Sampling Resistors
Fig 12d. Typical Drain-to-Source Voltage
Vs. Avalanche Current
Fig 13b. Gate Charge Test Circuit
6
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IRFR/U1N60A
Peak Diode Recovery dv/dt Test Circuit
+
-
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
D.U.T
+
-
-
+
RG
• dv/dt controlled by RG
+
-
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
VDD
Driver Gate Drive
P.W.
P.W.
Period
Period
D =
V
=10V
*
GS
D.U.T. I Waveform
SD
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. V Waveform
DS
Diode Recovery
dv/dt
V
DD
Re-Applied
Voltage
Body Diode
Forward Drop
Inductor Curent
I
SD
Ripple ≤ 5%
* VGS = 5V for Logic Level Devices
Fig 14. For N-Channel HEXFETS
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7
IRFR/U1N60A
D-Pak (TO-252AA) Package Outline
Dimensions are shown in millimeters (inches)
2.38 (.094)
2.19 (.086)
6.73 (.265)
6.35 (.250)
1.14 (.045)
0.89 (.035)
- A -
1.27 (.050)
5.46 (.215)
0.58 (.023)
0.46 (.018)
0.88 (.035)
5.21 (.205)
4
6.45 (.245)
5.68 (.224)
6.22 (.245)
5.97 (.235)
10.42 (.410)
9.40 (.370)
1.02 (.040)
1.64 (.025)
LEAD ASSIGNMENTS
1 - GATE
1
2
3
2 - DRAIN
0.51 (.020)
MIN.
- B -
3 - SOURCE
4 - DRAIN
1.52 (.060)
1.15 (.045)
0.89 (.035)
0.64 (.025)
3X
0.58 (.023)
0.46 (.018)
1.14 (.045)
0.76 (.030)
2X
0.25 (.010)
M A M B
NOTES:
2.28 (.090)
1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982.
2 CONTROLLING DIMENSION : INCH.
4.57 (.180)
3 CONFORMS TO JEDEC OUTLINE TO-252AA.
4 DIMENSIONS SHOWN ARE BEFORE SOLDER DIP,
SOLDER DIP MAX. +0.16 (.006).
D-Pak (TO-252AA) Part Marking Information
Notes : T his part marking information applies to devices produced before 02/26/2001
EXAMPLE: THIS IS AN IRFR120
WIT H AS S E MBLY
LOT CODE 9U1P
INTERNATIONAL
RECTIFIER
LOGO
DATE CODE
YEAR = 0
IRFU120
016
1P
WEEK = 16
9U
ASSEMBLY
LOT CODE
Notes: This part marking information applies to devices produced after 02/26/2001
EXAMPLE: THIS IS AN IRFR120
PART NUMBER
WIT H AS S E MBLY
LOT CODE 1234
ASSEMBLED ON WW 16, 1999
IN THE ASSEMBLY LINE "A"
INTERNATIONAL
RECTIFIER
LOGO
DATE CODE
YEAR 9 = 1999
WE E K 16
IRFU120
916A
34
12
LINE A
AS S E MB L Y
LOT CODE
8
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IRFR/U1N60A
I-Pak (TO-251AA) Package Outline
Dimensions are shown in millimeters (inches)
6.73 (.265)
6.35 (.250)
2.38 (.094)
2.19 (.086)
- A -
0.58 (.023)
0.46 (.018)
1.27 (.050)
5.46 (.215)
0.88 (.035)
5.21 (.205)
LEAD ASSIGNMENTS
1 - GATE
4
2 - DRAIN
6.45 (.245)
5.68 (.224)
3 - SOURCE
4 - DRAIN
6.22 (.245)
5.97 (.235)
1.52 (.060)
1.15 (.045)
1
2
3
- B -
NOTES:
1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982.
2 CONTROLLING DIMENSION : INCH.
2.28 (.090)
1.91 (.075)
9.65 (.380)
8.89 (.350)
3 CONFORMS TO JEDEC OUTLINE TO-252AA.
4 DIMENSIONS SHOWN ARE BEFORE SOLDER DIP,
SOLDER DIP MAX. +0.16 (.006).
1.14 (.045)
0.76 (.030)
1.14 (.045)
0.89 (.035)
3X
0.89 (.035)
0.64 (.025)
3X
0.25 (.010)
M A M B
0.58 (.023)
0.46 (.018)
2.28 (.090)
2X
I-Pak (TO-251AA) Part Marking Information
Notes : T his part marking information applies to devices produced before 02/26/2001
EXAMPLE: THIS IS AN IRFR120
INTERNATIONAL
DAT E CODE
YEAR = 0
WITH ASSEMBLY
LOT CODE 9U1P
RECTIFIER
LOGO
IRFU120
016
1P
WE E K = 16
9U
AS S E MB L Y
LOT CODE
Notes: This part marking information applies to devices producedafter 02/26/2001
PART NUMBER
EXAMPLE: THIS IS AN IRFR120
WITH ASSEMBLY
INTERNATIONAL
RECTIFIER
LOGO
DATE CODE
YEAR 9 = 1999
WEE K 19
IRFU120
919A
78
LOT CODE 5678
ASSEMBLED ON WW 19, 1999
IN THE ASSEMBLY LINE "A"
56
LINE A
AS S E MB L Y
LOT CODE
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9
IRFR/U1N60A
Tape & Reel Information
TO-252AA
TR
TRL
TRR
16.3 ( .641 )
15.7 ( .619 )
16.3 ( .641 )
15.7 ( .619 )
12.1 ( .476 )
11.9 ( .469 )
8.1 ( .318 )
7.9 ( .312 )
FEED DIRECTION
FEED DIRECTION
NOTES :
1. CONTROLLING DIMENSION : MILLIMETER.
2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ).
3. OUTLINE CONFORMS TO EIA-481 & EIA-541.
13 INCH
16 mm
NOTES :
1. OUTLINE CONFORMS TO EIA-481.
Notes:
Repetitive rating; pulse width limited by
Pulse width ≤ 300µs; duty cycle ≤ 2%.
max. junction temperature. ( See fig. 11 )
ꢀ Coss eff. is a fixed capacitance that gives the same charging time
Starting TJ = 25°C, L = 95mH
as Coss while VDS is rising from 0 to 80% VDSS
RG = 25Ω, IAS = 1.4A. (See Figure 12)
When mounted on 1" square PCB (FR-4 or G-10 Material).
For recommended footprint and soldering techniques refer to
application note #AN-994.
ISD ≤ 1.4A, di/dt ≤ 180A/µs, VDD ≤ V(BR)DSS
TJ ≤ 150°C
,
Data and specifications subject to change without notice.
This product has been designed and qualified for the Industrial market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.3/03
10
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