IRL3716L [INFINEON]
HEXFET Power MOSFET; HEXFET功率MOSFET
| 型号： | IRL3716L |
| 厂家： | 
Infineon |
| 描述： | HEXFET Power MOSFET |
| 文件： | 总11页 (文件大小：230K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PD - 94403A
IRL3716
IRL3716S
IRL3716L
SMPS MOSFET
HEXFET® Power MOSFET
Applications
l High Frequency Isolated DC-DC
VDSS
20V
RDS(on) max
ID
Converters with Synchronous Rectification
for Telecom and Industrial Use
l High Frequency Buck Converters for
Computer Processor Power
180A
4.0mΩ
l Active Oring
Benefits
l Ultra-Low Gate Impedance
l Very Low RDS(on) at 4.5V VGS
l Fully Characterized Avalanche Voltage
and Current
D2Pak
IRL3716S
TO-262
IRL3716L
TO-220AB
IRL3716
Absolute Maximum Ratings
Symbol
VDS
Parameter
Drain-Source Voltage
Max.
20
Units
V
VGS
Gate-to-Source Voltage
± 20
V
ID @ TC = 25°C
ID @ TC = 100°C
IDM
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
180
130
A
720
PD @TC = 25°C
PD @TC = 100°C
Maximum Power Dissipation
Maximum Power Dissipation
Linear Derating Factor
210
W
W
100
1.4
W/°C
°C
TJ , TSTG
Junction and Storage Temperature Range
-55 to + 175
Thermal Resistance
Parameter
Junction-to-Case
Typ.
Max.
0.72
–––
62
Units
RθJC
RθCS
RθJA
RθJA
–––
0.50
–––
–––
Case-to-Sink, Flat, Greased Surface
Junction-to-Ambient
Junction-to-Ambient (PCB mount)ꢀ
°C/W
40
Notes through are on page 11
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1
10/8/04
IRL3716/3716S/3716L
Static @ TJ = 25°C (unless otherwise specified)
Parameter
Min. Typ. Max.Units
Conditions
VGS = 0V, ID = 250µA
0.021 ––– V/°C Reference to 25°C, ID = 1mA
V(BR)DSS
Drain-to-Source Breakdown Voltage
20
–––
–––
V
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient
–––
–––
–––
1.0
3.0
4.0
4.0
4.8
3.0
20
VGS = 10V, ID = 90A
VGS = 4.5V, ID = 72A
VDS = VGS, ID = 250µA
VDS = 16V, VGS = 0V
RDS(on)
VGS(th)
IDSS
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
mΩ
V
–––
–––
–––
–––
–––
–––
–––
–––
Drain-to-Source Leakage Current
µA
250
200
VDS = 16V, VGS = 0V, TJ = 125°C
VGS = 16V
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
IGSS
nA
––– -200
VGS = -16V
Dynamic @ TJ = 25°C (unless otherwise specified)
Symbol
gfs
Parameter
Forward Transconductance
Total Gate Charge
Min. Typ. Max. Units
100 ––– –––
Conditions
VDS = 10V, ID = 72A
ID = 72A
S
Qg
–––
–––
–––
–––
53
17
24
50
79
26
35
75
Qgs
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Output Gate Charge
nC VDS = 16V
VGS = 4.5V
Qgd
Qoss
VGS = 0V, VDS = 10V
Rg
Gate Resistance
Turn-On Delay Time
Rise Time
1.5
Ω
td(on)
tr
td(off)
tf
–––
18 –––
VDD = 10V
ID = 72A
ns
––– 140 –––
Turn-Off Delay Time
Fall Time
–––
–––
38 –––
36 –––
RG = 3.9Ω
VGS = 4.5V
VGS = 0V
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
––– 5090 –––
––– 3440 –––
––– 560 –––
pF
VDS = 10V
ƒ = 1.0MHz
Avalanche Characteristics
Symbol
EAS
Parameter
Single Pulse Avalanche Energy
Typ.
–––
Max.
640
Units
mJ
IAR
Avalanche Current
–––
72
A
Diode Characteristics
Symbol
IS
Parameter
Min. Typ. Max. Units
Conditions
D
Continuous Source Current
(Body Diode)
MOSFET symbol
––– –––
180
showing the
A
G
ISM
Pulsed Source Current
(Body Diode)
integral reverse
p-n junction diode.
––– –––
720
S
––– 0.93 1.3
––– 0.80 –––
––– 180 280
––– 87 130
––– 190 280
––– 85 130
V
TJ = 25°C, IS = 72A, VGS = 0V
TJ = 125°C, IS = 72A, VGS = 0V
TJ = 25°C, IF = 72A, VR=20V
VSD
Diode Forward Voltage
trr
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Time
Reverse Recovery Charge
ns
Qrr
trr
nC di/dt = 100A/µs
ns TJ = 125°C, IF = 72A, VR=20V
nC di/dt = 100A/µs
Qrr
2
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IRL3716/3716S/3716L
10000
1000
100
10
10000
VGS
VGS
10V
TOP
TOP
10V
4.5V
3.7V
3.5V
3.3V
3.0V
2.7V
4.5V
3.7V
3.5V
3.3V
3.0V
2.7V
1000
100
10
BOTTOM 2.5V
BOTTOM 2.5V
2.5V
2.5V
20µs PULSE WIDTH
Tj = 175°C
20µs PULSE WIDTH
Tj = 25°C
1
1
0.1
1
10
100
0.1
1
10
100
V
, Drain-to-Source Voltage (V)
V
, Drain-to-Source Voltage (V)
DS
DS
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
2.0
1000.00
100.00
10.00
180A
=
I
D
T
= 25°C
J
T
= 175°C
J
1.5
1.0
0.5
0.0
V
= 15V
DS
20µs PULSE WIDTH
V
= 10V
GS
2.0
3.0
V
4.0
5.0
6.0
7.0
8.0
-60 -40 -20
0
20 40 60 80 100 120 140 160 180
°
T , Junction Temperature
( C)
, Gate-to-Source Voltage (V)
J
GS
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance
Vs. Temperature
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3
IRL3716/3716S/3716L
100000
16
12
8
I
V
= 0V,
f = 1 MHZ
=
72A
D
GS
C
= C + C
,
C
SHORTED
V
= 16V
iss
gs
gd
ds
DS
C
= C
rss
gd
C
= C + C
oss
ds gd
10000
1000
100
Ciss
Coss
Crss
4
0
0
30
Q
60
90
120
150
1
10
100
, Total Gate Charge (nC)
G
V
, Drain-to-Source Voltage (V)
DS
Fig 6. Typical Gate Charge Vs.
Fig 5. Typical Capacitance Vs.
Gate-to-Source Voltage
Drain-to-Source Voltage
1000
100
10
10000
1000
100
10
OPERATION IN THIS AREA
LIMITED BY R (on)
DS
°
T = 175
J
C
°
T = 25
C
100µsec
J
1msec
1
10msec
Tc = 25°C
Tj = 175°C
Single Pulse
V
= 0 V
GS
1
0.1
0.2
0.8
1.4
2.0
2.6
1
10
, Drain-toSource Voltage (V)
100
V
,Source-to-Drain Voltage (V)
SD
V
DS
Fig 8. Maximum Safe Operating Area
Fig 7. Typical Source-Drain Diode
Forward Voltage
4
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IRL3716/3716S/3716L
RD
180
150
120
90
VDS
LIMITED BY PACKAGE
VGS
D.U.T.
RG
+VDD
-
4.5V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
60
Fig 10a. Switching Time Test Circuit
V
DS
30
90%
0
25
50
75
100
125
150
C)
175
°
(
T
, Case Temperature
C
10%
V
GS
t
t
r
t
t
f
Fig 9. Maximum Drain Current Vs.
d(on)
d(off)
Case Temperature
Fig 10b. Switching Time Waveforms
10
1
D = 0.50
0.20
P
DM
0.1
0.10
0.05
t
1
t
2
0.02
0.01
SINGLE PULSE
(THERMAL RESPONSE)
Notes:
1. Duty factor D =
t / t
1
2
2. Peak T
= P
x Z
+ T
J
DM
thJC
C
0.01
0.00001
0.0001
0.001
0.01
0.1
1
t , Rectangular Pulse Duration (sec)
1
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRL3716/3716S/3716L
1650
1320
990
660
330
0
15V
I
D
TOP
29A
51A
72A
BOTTOM
DRIVER
+
L
V
DS
D.U.T
AS
R
G
V
DD
-
I
A
20V
0.01
Ω
t
p
Fig 12a. Unclamped Inductive Test Circuit
V
(BR)DSS
t
p
25
50
75
100
125
°
( C)
150
175
Starting Tj, Junction Temperature
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
I
AS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.T.
Q
G
50KΩ
.2µF
12V
4.5 V
.3µF
Q
Q
GD
GS
+
V
DS
D.U.T.
-
V
GS
V
G
3mA
I
I
D
G
Charge
Current Sampling Resistors
Fig 13a. Basic Gate Charge Waveform
Fig 13b. Gate Charge Test Circuit
6
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IRL3716/3716S/3716L
Peak Diode Recovery dv/dt Test Circuit
+
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
D.U.T
-
+
-
-
+
RG
• dv/dt controlled by RG
+
-
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
VDD
Driver Gate Drive
P.W.
P.W.
Period
Period
D =
V
=10V
*
GS
D.U.T. I Waveform
SD
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. V Waveform
DS
Diode Recovery
dv/dt
V
DD
Re-Applied
Voltage
Body Diode
Forward Drop
Inductor Curent
I
SD
Ripple ≤ 5%
* VGS = 5V for Logic Level Devices
Fig 14. For N-Channel HEXFET® Power MOSFETs
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7
IRL3716/3716S/3716L
TO-220AB Package Outline
Dimensions are shown in millimeters (inches)
10.54 (.415)
3.78 (.149)
- B -
10.29 (.405)
2.87 (.113)
2.62 (.103)
4.69 (.185)
4.20 (.165)
3.54 (.139)
1.32 (.052)
1.22 (.048)
- A -
6.47 (.255)
6.10 (.240)
4
15.24 (.600)
14.84 (.584)
LEAD ASSIGNMENTS
1.15 (.045)
MIN
HEXFET
IGBTs, CoPACK
1
2
3
1- GATE
1- GATE
2- DRAIN
2- COLLECTOR
3- EMITTER
4- COLLECTOR
3- SOURCE
4- DRAIN
14.09 (.555)
13.47 (.530)
4.06 (.160)
3.55 (.140)
0.93 (.037)
0.69 (.027)
0.55 (.022)
0.46 (.018)
3X
3X
1.40 (.055)
3X
1.15 (.045)
0.36 (.014)
M
B A M
2.92 (.115)
2.64 (.104)
2.54 (.100)
2X
NOTES:
1
2
DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982.
CONTROLLING DIMENSION : INCH
3
4
OUTLINE CONFORMS TO JEDEC OUTLINE TO-220AB.
HEATSINK & LEAD MEASUREMENTS DO NOT INCLUDE BURRS.
TO-220AB Part Marking Information
EXAMPLE: THIS IS AN IRF1010
LOT CODE 1789
PART NUMBER
ASS EMBLED ON WW 19, 1997
IN THE ASSEMBLY LINE "C"
INTERNATIONAL
RECTIFIER
LOGO
Note: "P" in assembly line
position indicates "Lead-Free"
DATE CODE
YEAR 7 = 1997
WEEK 19
AS S E MB L Y
LOT CODE
LINE C
8
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IRL3716/3716S/3716L
D2Pak Package Outline
Dimensions are shown in millimeters (inches)
D2Pak Part Marking Information
THIS IS AN IRF530S WITH
LOT CODE 8024
PART NUMBER
INTERNATIONAL
ASS EMBLED ON WW 02, 2000
IN THE ASSEMBLY LINE "L"
RECTIFIER
LOGO
F530S
DATE CODE
YEAR 0 = 2000
WEEK 02
Note: "P" in as s embly line
pos ition ind icates "L ead-F ree"
AS S E MB L Y
LOT CODE
LINE L
OR
PART NUMBER
INTERNATIONAL
RECTIFIER
LOGO
F530S
DATE CODE
P = DE S IGNAT E S L E AD- F R E E
PRODUCT (OPTIONAL)
YEAR 0 = 2000
ASSEMBLY
LOT CODE
WEE K 02
A = ASSEMBLY SITE CODE
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9
IRL3716/3716S/3716L
TO-262 Package Outline
Dimensions are shown in millimeters (inches)
TO-262 Part Marking Informa-
EXAMPLE: THIS IS AN IRL3103L
LOT CODE 1789
PART NUMBER
INTERNATIONAL
RECTIFIER
LOGO
ASSEMB LED ON WW 19, 1997
IN THE ASSEMBLYLINE "C"
DATE CODE
YEAR 7 = 1997
WEE K 19
Note: "P" in assembly line
pos ition indicates "L ead-F ree"
AS S E MB L Y
LOT CODE
LINE C
OR
PART NUMBER
INT ERNATIONAL
RECT IFIER
LOGO
DATE CODE
P = DE S IGNAT E S LE AD-F RE E
PRODUCT (OPTIONAL)
YEAR 7 = 1997
AS S E MB LY
LOT CODE
WE E K 19
A = ASSEMBLY SITE CODE
10
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IRL3716/3716S/3716L
D2Pak Tape & Reel Information
Dimensions are shown in millimeters (inches)
TRR
1.60 (.063)
1.50 (.059)
1.60 (.063)
1.50 (.059)
4.10 (.161)
3.90 (.153)
0.368 (.0145)
0.342 (.0135)
FEED DIRECTION
1.85 (.073)
11.60 (.457)
11.40 (.449)
1.65 (.065)
24.30 (.957)
23.90 (.941)
15.22 (.601)
15.42 (.609)
TRL
1.75 (.069)
10.90 (.429)
10.70 (.421)
1.25 (.049)
4.72 (.136)
4.52 (.178)
16.10 (.634)
15.90 (.626)
FEED DIRECTION
13.50 (.532)
12.80 (.504)
27.40 (1.079)
23.90 (.941)
4
330.00
(14.173)
MAX.
60.00 (2.362)
MIN.
30.40 (1.197)
MAX.
NOTES :
1. COMFORMS TO EIA-418.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION MEASURED @ HUB.
4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
Notes:
26.40 (1.039)
24.40 (.961)
4
3
Repetitive rating; pulse width limited by
Pulse width ≤ 400µs; duty cycle ≤ 2%.
max. junction temperature.
This is only applied to TO-220AB package
Starting TJ = 25°C, L = 0.25mH
R
G = 25Ω, IAS = 72A.
ꢀ This is applied to D2Pak, when mounted on 1" square PCB ( FR-4 or G-10 Material ).
For recommended footprint and soldering techniques refer to application note #AN-994.
Calculated continuous current based on maximum allowable
junction temperature. Package limitation current is 75A.
Rθ is measured at TJ approximately 90°C
Data and specifications subject to change without notice.
This product has been designed and qualified for the Industrial market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.10/04
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11
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