IRL540N [INFINEON]
HEXFET Power MOSFET; HEXFET功率MOSFET
| 型号： | IRL540N |
| 厂家： | 
Infineon |
| 描述： | HEXFET Power MOSFET |
| 文件： | 总8页 (文件大小：253K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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PD - 9.1495
IRL540N
HEXFET® Power MOSFET
PRELIMINARY
l Logic-Level Gate Drive
l Advanced Process Technology
l Isolated Package
D
VDSS = 100V
l High Voltage Isolation = 2.5KVRMS ꢀ
l Sink to Lead Creepage Dist. = 4.8mm
l Fully Avalanche Rated
RDS(on) = 0.044Ω
G
ID = 30A
S
Description
FifthGenerationHEXFETsfromInternationalRectifier
utilize advanced processing techniques to achieve
extremely low on-resistance per silicon area. This
benefit, combined with the fast switching speed and
ruggedized device design that HEXFET Power
MOSFETs are well known for, provides the designer
with an extremely efficient and reliable device for use
in a wide variety of applications.
The TO-220 package is universally preferred for all
commercial-industrialapplicationsatpowerdissipation
levels to approximately 50 watts. The low thermal
resistance and low package cost of the TO-220
contribute to its wide acceptance throughout the
industry.
Absolute Maximum Ratings
Parameter
Max.
Units
ID @ TC = 25°C
ID @ TC = 100°C
IDM
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
30
21
A
120
PD @TC = 25°C
Power Dissipation
94
W
W/°C
V
Linear Derating Factor
0.63
± 16
310
VGS
EAS
IAR
Gate-to-Source Voltage
Single Pulse Avalanche Energy
Avalanche Current
mJ
A
18
EAR
dv/dt
TJ
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Operating Junction and
9.4
mJ
V/ns
4.3
-55 to + 175
TSTG
Storage Temperature Range
Soldering Temperature, for 10 seconds
Mounting torque, 6-32 or M3 srew
°C
300 (1.6mm from case )
10 lbf•in (1.1N•m)
Thermal Resistance
Parameter
Junction-to-Case
Typ.
–––
Max.
Units
RθJC
RθCS
RθJA
1.6
–––
62
Case-to-Sink, Flat, Greased Surface
Junction-to-Ambient
0.50
–––
°C/W
To Order
8/14/96
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IRL540N
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter
Min. Typ. Max. Units
100 ––– –––
Conditions
VGS = 0V, ID = 250µA
V(BR)DSS
Drain-to-Source Breakdown Voltage
V
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient ––– 0.11 ––– V/°C Reference to 25°C, ID = 1mA
––– ––– 0.044
––– ––– 0.053
––– ––– 0.063
VGS = 10V, ID = 18A
VGS = 5.0V, ID = 18A
VGS = 4.0V, ID = 15A
VDS = VGS, ID = 250µA
VDS = 25V, ID = 18A
VDS = 100V, VGS = 0V
VDS = 80V, VGS = 0V, TJ = 150°C
VGS = 16V
RDS(on)
Static Drain-to-Source On-Resistance
Ω
VGS(th)
gfs
Gate Threshold Voltage
1.0
14
––– 2.0
––– –––
V
S
Forward Transconductance
––– ––– 25
––– ––– 250
––– ––– 100
––– ––– -100
––– ––– 74
––– ––– 9.4
––– ––– 38
IDSS
IGSS
Drain-to-Source Leakage Current
µA
nA
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
VGS = -16V
Qg
ID = 18A
Qgs
Qgd
td(on)
tr
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
nC VDS = 5.0V
VGS = 5.0V, See Fig. 6 and 13
–––
–––
–––
–––
11 –––
81 –––
39 –––
62 –––
VDD = 50V
ID = 18A
ns
td(off)
tf
Turn-Off Delay Time
Fall Time
RG = 5.0Ω, VGS = 5.0V
RD = 2.7Ω, See Fig. 10
Between lead,
D
LD
LS
Internal Drain Inductance
Internal Source Inductance
–––
4.5
–––
nH
6mm (0.25in.)
G
from package
––– 7.5 –––
and center of die contact
VGS = 0V
S
Ciss
Coss
Crss
Input Capacitance
––– 1800 –––
––– 350 –––
––– 170 –––
Output Capacitance
pF
VDS = 25V
Reverse Transfer Capacitance
ƒ = 1.0MHz, See Fig. 5
Source-Drain Ratings and Characteristics
Parameter
Continuous Source Current
(Body Diode)
Min. Typ. Max. Units
Conditions
MOSFET symbol
showing the
D
IS
30
––– –––
A
G
ISM
Pulsed Source Current
(Body Diode)
integral reverse
––– ––– 120
p-n junction diode.
S
VSD
trr
Diode Forward Voltage
Reverse Recovery Time
Reverse RecoveryCharge
Forward Turn-On Time
––– ––– 1.3
––– 190 290
––– 1.1 1.7
V
TJ = 25°C, IS = 18A, VGS = 0V
ns
TJ = 25°C, IF = 18A
Qrr
ton
µC di/dt = 100A/µs
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
Starting TJ = 25°C, L = 1.9mH
RG = 25Ω, IAS = 18A. (See Figure 12)
.
ISD ≤ 18A, di/dt ≤ 180A/µs, VDD ≤ V(BR)DSS
TJ ≤ 175°C
Pulse width ≤ 300µs; duty cycle ≤ 2%
,
To Order
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IRL540N
1000
100
10
1000
100
10
VGS
VGS
15V
12V
TOP
15V
12V
TOP
10V
10V
8.0V
6.0V
4.0V
3.0V
8.0V
6.0V
4.0V
3.0V
BOTTOM 2.5V
BOTTOM 2.5V
2.5V
2.5V
20µs PULSE WIDTH
20µs PULSE WIDTH
TJ = 25°C
T
= 175°C
J
1
1
A
A
0.1
1
10
100
0.1
1
10
100
V
, Drain-to-Source Voltage (V)
V
, Drain-to-Source Voltage (V)
DS
DS
Fig 1. Typical Output Characteristics,
Fig 2. Typical Output Characteristics,
TJ = 25oC
TJ = 175oC
1 0 0 0
3. 0
2. 5
2. 0
1. 5
I
= 30A
D
1 0 0
1 0
1
TJ = 25°C
TJ = 175°C
1. 0
0. 5
0. 0
V D S = 50V
20µs PULSE WIDTH
V
= 10V
GS
A
A
- 6 0 - 4 0 - 2 0
0
2 0
4 0
6 0
8 0 1 0 0 1 2 0 1 4 0 1 6 0 1 8 0
2
4
6
8 10
VGS , Gate-to-Source Voltage (V)
T
J
, Junction Temperature (°C)
Fig 4. Normalized On-Resistance
Fig 3. Typical Transfer Characteristics
Vs. Temperature
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IRL540N
3000
2000
1000
0
15
12
9
V
C
C
C
= 0V,
GS
f = 1MHz
I
= 18A
D
= C
= C
+ C
,
C
SHORTED
ds
iss
rss
gs
gd
gd
V
V
V
= 80V
= 50V
= 20V
DS
DS
DS
= C + C
oss ds
gd
C
iss
6
C
C
oss
rss
3
FOR TEST CIRCUIT
SEE FIGURE 13
A
0
A
1
10
100
0
20
Q
40
60
80
100
V
, Drain-to-Source Voltage (V)
, Total Gate Charge (nC)
DS
G
Fig 5. Typical Capacitance Vs.
Fig 6. Typical Gate Charge Vs.
Drain-to-Source Voltage
Gate-to-Source Voltage
1 0 0 0
1000
100
10
OPERATION IN THIS AREA LIMITED
BY R DS(on)
1 0 0
1 0
1
10µs
T
= 175°C
J
100µs
1ms
T
= 25°C
J
T
T
= 25°C
= 175°C
C
J
10ms
Single Pulse
V
= 0V
GS
A
1
A
1000
0. 4
0. 6
0. 8
1. 0
1. 2
1. 4
1. 6
1. 8
1
10
100
V
, Drain-to-Source Voltage (V)
V
, Source-to-Drain Voltage (V)
DS
SD
Fig 7. Typical Source-Drain Diode
Fig 8. Maximum Safe Operating Area
Forward Voltage
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IRL540N
3 0
2 5
RD
VDS
VGS
D.U.T.
RG
+VDD
-
2 0
1 5
1 0
5.0V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 10a. Switching Time Test Circuit
V
DS
5
0
90%
A
1 7 5
2 5
5 0
7 5
1 0 0
1 2 5
1 5 0
T
, Case Temperature (°C)
C
10%
V
GS
Fig 9. Maximum Drain Current Vs.
t
t
r
t
t
f
d(on)
d(off)
Case Temperature
Fig 10b. Switching Time Waveforms
1 0
1
D
=
0. 50
0 . 2 0
0 . 1 0
0 . 0 5
P
D M
0. 1
t
1
0 . 0 2
0 . 0 1
t
2
N ote s:
1. Duty factor D =
SINGLE PULSE
t
/ t
2
1
( T H E R M A L R E S P O N S E )
0 . 0 0 0 1
2. Pe ak T = P
x Z
+ T
C
DM
J
thJC
A
0 . 0 1
0 . 0 0 0 0 1
0 . 0 0 1
0 . 0 1
0. 1
1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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IRL540N
800
600
400
200
0
I
D
TOP
7.3A
13A
BOTTOM 18A
15 V
D R IV ER
L
V
D S
D .U .T
A S
R
+
G
V
D D
-
I
A
10V
0 .0 1
Ω
t
p
Fig 12a. Unclamped Inductive Test Circuit
A
175
25
50
75
100
125
150
V
Starting T J , Junction Temperature (°C)
(BR)DSS
t
p
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
I
AS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.T.
50KΩ
.2µF
12V
Q
.3µF
G
+
5.0 V
V
DS
D.U.T.
-
Q
Q
GD
GS
V
GS
V
G
3mA
I
I
D
G
Charge
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
Fig 13a. Basic Gate Charge Waveform
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IRL540N
Peak Diode Recovery dv/dt Test Circuit
+
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
D.U.T
-
+
-
-
+
RG
• dv/dt controlled by RG
+
-
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
VDD
Driver Gate Drive
P.W.
Period
Period
D =
P.W.
*
V
=10V
GS
D.U.T. I Waveform
SD
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. V Waveform
DS
Diode Recovery
dv/dt
V
DD
Re-Applied
Voltage
Body Diode
Forward Drop
Inductor Curent
I
SD
Ripple ≤ 5%
* VGS = 5V for Logic Level Devices
Fig 14. For N-Channel HEXFETS
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IRL540N
Package Outline
TO-220AB Outline
Dimensions are shown in millimeters (inches)
1 0.5 4 (.41 5)
1 0.2 9 (.40 5)
-
B
-
3.78 (.14 9)
3.54 (.13 9)
2 .87 ( .1 13 )
2 .62 ( .1 03 )
4 .69 ( .1 85 )
4 .20 ( .1 65 )
1 .3 2 (.0 52 )
1 .2 2 (.0 48 )
-
A
-
6.4 7 (.25 5)
6.1 0 (.24 0)
4
1 5.24 ( .6 0 0)
1 4.84 ( .5 8 4)
1.15 ( .0 4 5)
L E A D
A
S
S
IG N M E N T S
M IN
1
2
3
4
-
-
-
-
G A T E
1
2
3
D R A IN
U R C E
D R A IN
S
O
1 4.09 (.5 5 5)
1 3.47 (.5 3 0)
4.0 6 (.16 0)
3.5 5 (.14 0)
0 .93 ( .0 37 )
0 .69 ( .0 27 )
0.5 5 (.02 2)
0.4 6 (.01 8)
3X
3X
1 .4 0 (.05 5 )
1 .1 5 (.04 5 )
3 X
0 .3 6 (.01 4)
M
B
A
M
2 .9 2 (.11 5 )
2 .6 4 (.10 4 )
2 .54 ( .1 00 )
2X
N O T E
S :
1
2
D IM E N S IO N IN G
C O N T R O L LIN G
&
T O L E R A N C IN G
P
E R
A
N S
I
Y
14 .5 M , 1 98 2.
3
O
U T L IN E C O N F O R M S T O J E D E
C
O U T LIN E T O -2 20 A B .
N O IN C L U D E B U R R S .
D
IM E N S IO IN C H
N
:
4
H E A T S IN L E A D E A U R E M E N T S
K
&
M
S
D
O
T
Part Marking Information
TO-220AB
EXAM PLE : THIS IS AN IRF1010
A
W ITH ASSEMBLY
INTERNATIONAL
PART NUM BER
LOT CODE 9B1M
RECTIFIER
IRF1010
LOGO
9246
1M
9B
DATE CODE
ASSEM BLY
(YYW W )
LOT CODE
YY = YEAR
=
W W W EEK
WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331
EUROPEAN HEADQUARTERS: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: ++ 44 1883 732020
IR CANADA: 7321 Victoria Park Ave., Suite 201, Markham, Ontario L3R 2Z8, Tel: (905) 475 1897
IR GERMANY: Saalburgstrasse 157, 61350 Bad Homburg Tel: ++ 49 6172 96590
IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: ++ 39 11 451 0111
IR FAR EAST: K&H Bldg., 2F, 3-30-4 Nishi-Ikeburo 3-Chome, Toshima-Ki, Tokyo Japan 171 Tel: 81 3 3983 0086
IR SOUTHEAST ASIA: 315 Outram Road, #10-02 Tan Boon Liat Building, Singapore 0316 Tel: 65 221 8371
http://www.irf.com/
Data and specifications subject to change without notice.
8/96
To Order
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