IRLR014NTRL [INFINEON]
Power Field-Effect Transistor, 10A I(D), 55V, 0.14ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-252AA, PLASTIC, DPAK-3;型号: | IRLR014NTRL |
厂家: | Infineon |
描述: | Power Field-Effect Transistor, 10A I(D), 55V, 0.14ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-252AA, PLASTIC, DPAK-3 局域网 开关 脉冲 晶体管 |
文件: | 总11页 (文件大小:113K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
PD- 94350
IRLR/U014N
HEXFET® Power MOSFET
ꢀ Logic-Level Gate Drive
ꢀ Surface Mount (IRLR024N)
ꢀ Straight Lead (IRLU024N)
ꢀ Advanced Process Technology
ꢀ Fast Switching
D
VDSS = 55V
R
DS(on) = 0.14Ω
G
ꢀ Fully Avalanche Rated
ID = 10A
S
Description
Fifth Generation HEXFETs from International Rectifier utilize advanced
processing techniques to achieve the lowest possible on-resistance per
silicon area. This benefit, combined with the fast switching speed and
ruggedized device design that HEXFET Power MOSFETs are well known for,
provides the designer with an extremely efficient device for use in a wide
variety of applications.
D-Pak
TO-252AA
I-Pak
TO-251AA
The D-PAK is designed for surface mounting using vapor phase, infrared, or
wave soldering techniques. The straight lead version (IRFU series) is for
through-hole mounting applications. Power dissipation levels up to 1.5 watts
are possible in typical surface mount applications.
Absolute Maximum Ratings
Parameter
Max.
10
Units
ID @ TC = 25°C
D @ TC = 100°C
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current ꢁ
I
7.1
40
A
IDM
PD @TC = 25°C
Power Dissipation
28
W
W/°C
V
Linear Derating Factor
0.2
± 16
35
VGS
EAS
IAR
Gate-to-Source Voltage
Single Pulse Avalanche Energyꢂ
Avalanche Currentꢁ
mJ
A
6.0
2.8
5.0
EAR
dv/dt
TJ
Repetitive Avalanche Energyꢁ
Peak Diode Recovery dv/dt ꢃ
Operating Junction and
mJ
V/ns
-55 to + 175
TSTG
Storage Temperature Range
Soldering Temperature, for 10 seconds
°C
300 (1.6mm from case )
Thermal Resistance
Parameter
Junction-to-Case
Typ.
–––
–––
–––
Max.
5.3
50
Units
RθJC
RθJA
RθJA
Case-to-Ambient (PCB mount)**
Junction-to-Ambient
°C/W
110
** When mounted on 1" square PCB (FR-4 or G-10 Material ) .
For recommended footprint and soldering techniques refer to application note #AN-994
www.irf.com
1
5/4/99
IRLR/U014N
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter
Min. Typ. Max. Units
55 ––– –––
Conditions
VGS = 0V, ID = 250µA
V(BR)DSS
Drain-to-Source Breakdown Voltage
V
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient ––– 0.056 ––– V/°C Reference to 25°C, ID = 1mA
––– ––– 0.14
––– ––– 0.21
VGS = 10V, ID = 6A ꢀ
Ω
RDS(on)
Static Drain-to-Source On-Resistance
VGS = 4.5V, ID = 5A ꢀ
VDS = VGS, ID = 250µA
VDS = 25V, ID = 6Aꢁ
VDS = 55V, VGS = 0V
VDS = 55V, VGS = 0V, TJ = 150°C
VGS = 16V
VGS(th)
gfs
Gate Threshold Voltage
1.0
3.1
––– –––
––– –––
V
S
Forward Transconductance
––– ––– 25
––– ––– 250
––– ––– 100
––– ––– -100
––– ––– 7.9
––– ––– 1.4
––– ––– 4.4
IDSS
IGSS
Drain-to-Source Leakage Current
µA
nA
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
VGS = -16V
Qg
ID = 6A
Qgs
Qgd
td(on)
tr
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
nC VDS = 44V
VGS = 5.0V, See Fig. 6 and 13 ꢀ
–––
–––
–––
–––
6.5 –––
47 –––
12 –––
23 –––
VDD = 28V
ID = 6A
ns
td(off)
tf
Turn-Off Delay Time
Fall Time
RG = 6.2Ω, VGS = 5.0V
RD = 4.5Ω, See Fig. 10 ꢀ
Between lead,
D
LD
LS
Internal Drain Inductance
Internal Source Inductance
–––
4.5
–––
nH
6mm (0.25in.)
G
from package
––– 7.5 –––
––– 265 –––
and center of die contactꢂ
VGS = 0V
S
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
–––
–––
80 –––
38 –––
pF
VDS = 25V
Reverse Transfer Capacitance
ƒ = 1.0MHz, See Fig. 5
Source-Drain Ratings and Characteristics
Parameter
Continuous Source Current
(Body Diode)
Min. Typ. Max. Units
Conditions
MOSFET symbol
showing the
D
IS
––– –––
––– –––
10
40
A
G
ISM
Pulsed Source Current
(Body Diode) ꢀ
integral reverse
S
p-n junction diode.
VSD
trr
Diode Forward Voltage
Reverse Recovery Time
Reverse RecoveryCharge
Forward Turn-On Time
––– ––– 1.3
V
TJ = 25°C, IS = 6A, VGS = 0V
TJ = 25°C, IF = 6A
ꢁ
––– 37
––– 48
56
71
nS
Qrr
ton
nC di/dt = 100A/µs
ꢁ
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
ꢁ Repetitive rating; pulse width limited by
ꢂ Pulse width ≤ 300µs; duty cycle ≤ 2%.
max. junction temperature. ( See fig. 11 )
ꢀ Starting TJ = 25°C, L = 1.96mH
RG = 25Ω, IAS = 6A. (See Figure 12)
ꢃ This is applied for I-PAK, LS of D-PAK is measured between
lead and center of die contact
ꢄ ISD ≤ 6.0A, di/dt ≤ 210A/µs, VDD
V(BR)DSS
≤
,
TJ ≤ 175°C
2
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IRLR/U014N
100
10
1
100
10
1
VGS
VGS
TOP
15V
TOP
T
15V
10V
10V
5.0V
5.0V
4.5V
4.5V
3.5V
3.5V
3.0V
3.0V
2.7V
2.7V
B
BOTTOM 2.5V
BOTTOM 2.5V
2.5V
2.5V
20µs PULSE WIDTH
20µs PULSE WIDTH
°
T = 175 C
J
°
T = 25 C
J
0.1
0.1
0.1
0.1
1
10
100
1
10
100
V
, Drain-to-Source Voltage (V)
V
, Drain-to-Source Voltage (V)
DS
DS
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
2.5
100
10A
=
I
D
°
T = 25 C
J
2.0
1.5
1.0
0.5
0.0
°
T = 175 C
J
10
1
V
= 50V
DS
V
=10V
20µs PULSE WIDTH
GS
0.1
2.0
4.0
6.0
8.0 10.0
-60 -40 -20
0
20 40 60 80 100 120 140 160 180
°
V
, Gate-to-Source Voltage (V)
T , Junction Temperature ( C)
J
GS
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance
Vs. Temperature
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3
IRLR/U014N
15
10
5
500
I
D
= 6 A
V
= 0V,
f = 1MHz
C SHORTED
ds
GS
C
= C + C
iss
gs
gd ,
C
= C
V
V
= 44V
= 27V
rss
gd
DS
DS
C
= C + C
gd
400
300
200
100
0
oss
ds
C
C
iss
oss
C
rss
FOR TEST CIRCUIT
SEE FIGURE 13
0
1
10
100
0
2
4
6
8
10
V
, Drain-to-Source Voltage (V)
Q , Total Gate Charge (nC)
DS
G
Fig 6. Typical Gate Charge Vs.
Fig 5. Typical Capacitance Vs.
Gate-to-Source Voltage
Drain-to-Source Voltage
1000
100
10
100
10
1
OPERATION IN THIS AREA LIMITED
BY R
DS(on)
10us
°
T = 175 C
J
100us
1ms
1
10ms
°
T = 25 C
C
°
T = 175 C
Single Pulse
J
°
T = 25 C
J
V
= 0 V
GS
0.1
0.1
0.2
1
10
100
0.6
1.0
1.4
1.8
V
, Drain-to-Source Voltage (V)
V
,Source-to-Drain Voltage (V)
DS
SD
Fig 8. Maximum Safe Operating Area
Fig 7. Typical Source-Drain Diode
Forward Voltage
4
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IRLR/U014N
RD
10.0
8.0
6.0
4.0
2.0
0.0
VDS
VGS
10V
D.U.T.
RG
+VDD
-
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 10a. Switching Time Test Circuit
V
DS
90%
25
50
75
100
125
150
175
°
T , Case Temperature ( C)
C
10%
V
GS
t
t
r
t
t
f
Fig 9. Maximum Drain Current Vs.
d(on)
d(off)
Case Temperature
Fig 10b. Switching Time Waveforms
10
D = 0.50
0.20
0.10
1
P
2
DM
0.05
t
1
SINGLE PULSE
(THERMAL RESPONSE)
t
2
0.02
0.01
Notes:
1. Duty factor D =
t / t
1
2. Peak T =P
x Z
+ T
C
J
DM
thJC
0.1
0.00001
0.0001
0.001
0.01
0.1
1
t , Rectangular Pulse Duration (sec)
1
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRLR/U014N
60
50
40
30
20
10
0
I
D
TOP
2.4A
5.0A
BOTTOM 6.0A
15V
DRIVER
+
L
V
DS
D.U.T
AS
R
G
V
DD
-
I
A
10V
2
0.01
Ω
t
p
Fig 12a. Unclamped Inductive Test Circuit
25
50
75
100
125
150
175
°
Starting T , Junction Temperature ( C)
V
J
(BR)DSS
t
p
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
I
AS
Current Regulator
Fig 12b. Unclamped Inductive Waveforms
Same Type as D.U.T.
50KΩ
.2µF
12V
Q
G
.3µF
+
10 V
V
DS
D.U.T.
-
Q
Q
GD
GS
V
GS
V
G
3mA
I
I
D
G
Charge
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
Fig 13a. Basic Gate Charge Waveform
6
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IRLR/U014N
Peak Diode Recovery dv/dt Test Circuit
+
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
D.U.T
ꢀ
-
+
ꢂ
-
ꢁ
-
+
ꢃ
RG
• dv/dt controlled by RG
+
-
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
VDD
Driver Gate Drive
P.W.
P.W.
Period
Period
D =
V
=10V
*
GS
D.U.T. I Waveform
SD
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. V Waveform
DS
Diode Recovery
dv/dt
V
DD
Re-Applied
Voltage
Body Diode
Forward Drop
Inductor Curent
I
SD
Ripple ≤ 5%
* VGS = 5V for Logic Level Devices
Fig 14. For N-Channel HEXFETS
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7
IRLR/U014N
Package Outline
TO-252AA Outline
Dimensions are shown in millimeters (inches)
2.38 (.094)
2.19 (.086)
6.73 (.265)
6.35 (.250)
1.14 (.045)
0.89 (.035)
- A -
1.27 (.050)
0.88 (.035)
5.46 (.215)
5.21 (.205)
0.58 (.023)
0.46 (.018)
4
2
6.45 (.245)
5.68 (.224)
6.22 (.245)
5.97 (.235)
10.42 (.410)
9.40 (.370)
1.02 (.040)
1.64 (.025)
LEAD ASSIGNMENTS
1 - GATE
1
3
2 - DRAIN
0.51 (.020)
MIN.
- B -
3 - SOURCE
4 - DRAIN
1.52 (.060)
1.15 (.045)
0.89 (.035)
0.64 (.025)
3X
0.58 (.023)
0.46 (.018)
1.14 (.045)
0.76 (.030)
2X
0.25 (.010)
M A M B
NOTES:
2.28 (.090)
1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982.
2 CONTROLLING DIMENSION : INCH.
4.57 (.180)
3 CONFORMS TO JEDEC OUTLINE TO-252AA.
4 DIMENSIONS SHOWN ARE BEFORE SOLDER DIP,
SOLDER DIP MAX. +0.16 (.006).
Part Marking Information
TO-252AA (D-PAK)
EXA
THIS
MPLE:
IS AN IRFR120
PART NUMBER
WIT
H ASSEMBLY
INTERNATIONAL
RECTIFIER
LOT CODE 1234
DATE CODE
YEA
IRFU120
916A
34
ASSEMBLED ON WW 16
, 1999
L
R 9 = 1999
OGO
IN THE ASSEMBLYLINE "A"
12
WEEK 16
LINE A
ASSEMBLY
LOT CODE
8
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IRLR/U014N
Package Outline
TO-251AA Outline
Dimensions are shown in millimeters (inches)
6.73 (.265)
6.35 (.250)
2.38 (.094)
2.19 (.086)
- A -
0.58 (.023)
0.46 (.018)
1.27 (.050)
5.46 (.215)
0.88 (.035)
5.21 (.205)
LEAD ASSIGNMENTS
1 - GATE
4
2 - DRAIN
6.45 (.245)
5.68 (.224)
3 - SOURCE
4 - DRAIN
6.22 (.245)
5.97 (.235)
1.52 (.060)
1.15 (.045)
1
2
3
- B -
NOTES:
1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982.
2 CONTROLLING DIMENSION : INCH.
2.28 (.090)
1.91 (.075)
9.65 (.380)
8.89 (.350)
3 CONFORMS TO JEDEC OUTLINE TO-252AA.
4 DIMENSIONS SHOWN ARE BEFORE SOLDER DIP,
SOLDER DIP MAX. +0.16 (.006).
1.14 (.045)
0.76 (.030)
1.14 (.045)
0.89 (.035)
3X
0.89 (.035)
0.64 (.025)
3X
0.25 (.010)
M
A M B
0.58 (.023)
0.46 (.018)
2.28 (.090)
2X
Part Marking Information
TO-251AA (I-PAK)
PART NUMBER
EXAMPLE: THIS IS AN IRFR120
WITH ASSEMBLY
INTERNATIONAL
RECTIFIER
DATE CODE
YEAR 9 = 1999
WEEK 19
IRFU120
919A
LOT
CODE 5678
L
OGO
ASSEMB
LED ON WW 19, 1999
56
78
IN THE ASSE
MBLYLINE "A"
LINE A
ASSEMBLY
LOT CODE
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9
IRLR/U014N
Tape & Reel Information
TO-252AA
Dimensions are shown in millimeters (inches)
TR
TRL
TRR
16.3 ( .641 )
15.7 ( .619 )
16.3 ( .641 )
15.7 ( .619 )
12.1 ( .476 )
11.9 ( .469 )
8.1 ( .318 )
7.9 ( .312 )
FEED DIRECTION
FEED DIRECTION
NOTES :
1. CONTROLLING DIMENSION : MILLIMETER.
2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ).
3. OUTLINE CONFORMS TO EIA-481 & EIA-541.
13 INCH
16 mm
NOTES :
1. OUTLINE CONFORMS TO EIA-481.
Data and specifications subject to change without notice.
This product has been designed and qualified for the Automotive[Q101] market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information 5/99
10
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Note: For the most current drawings please refer to the IR website at:
http://www.irf.com/package/
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