IRLR9343TRLPBF [INFINEON]
Power Field-Effect Transistor, 20A I(D), 55V, 0.105ohm, 1-Element, P-Channel, Silicon, Metal-oxide Semiconductor FET, TO-252AA, LEAD FREE, PLASTIC, DPAK-3;![IRLR9343TRLPBF](http://pdffile.icpdf.com/pdf2/p00288/img/icpdf/IRLR9343TRLP_1747492_icpdf.jpg)
型号: | IRLR9343TRLPBF |
厂家: | ![]() |
描述: | Power Field-Effect Transistor, 20A I(D), 55V, 0.105ohm, 1-Element, P-Channel, Silicon, Metal-oxide Semiconductor FET, TO-252AA, LEAD FREE, PLASTIC, DPAK-3 放大器 脉冲 光电二极管 晶体管 |
文件: | 总10页 (文件大小:240K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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PD - 95850
DIGITAL AUDIO MOSFET
IRLR9343
IRLU9343
IRLU9343-701
Features
l Advanced Process Technology
Key Parameters
l Key Parameters Optimized for Class-D Audio
Amplifier Applications
l Low RDSON for Improved Efficiency
l Low Qg and Qsw for Better THD and Improved
Efficiency
l Low Qrr for Better THD and Lower EMI
l 175°C Operating Junction Temperature for
Ruggedness
VDS
RDS(ON) typ. @ VGS = -10V
DS(ON) typ. @ VGS = -4.5V
-55
V
m:
m:
nC
°C
93
R
150
31
Qg typ.
TJ max
175
l Repetitive Avalanche Capability for Robustness and
Reliability
D
l Multiple Package Options
D-Pak
IRLR9343
I-Pak
IRLU9343
G
I-Pak Leadform 701
IRLU9343-701
S
Refer to page 10 for package outline
Description
This Digital Audio HEXFET® is specifically designed for Class-D audio amplifier applications. This MosFET utilizes the latest
processing techniques to achieve low on-resistance per silicon area. Furthermore, Gate charge, body-diode reverse recovery
and internal Gate resistance are optimized to improve key Class-D audio amplifier performance factors such as efficiency, THD
and EMI. Additional features of this MosFET are 175°C operating junction temperature and repetitive avalanche capability.
These features combine to make this MosFET a highly efficient, robust and reliable device for Class-D audio amplifier
applications.
Absolute Maximum Ratings
Parameter
Drain-to-Source Voltage
Max.
-55
±20
-20
-14
-60
79
Units
V
VDS
VGS
Gate-to-Source Voltage
ID @ TC = 25°C
ID @ TC = 100°C
IDM
Continuous Drain Current, VGS @ -10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current c
A
PD @TC = 25°C
PD @TC = 100°C
Power Dissipation
Power Dissipation
W
39
Linear Derating Factor
Operating Junction and
Storage Temperature Range
Clamping Pressure h
0.53
W/°C
°C
TJ
-40 to + 175
TSTG
–––
N
Thermal Resistance
Parameter
Typ.
–––
–––
–––
Max.
1.9
Units
Junction-to-Case g
RθJC
RθJA
RθJA
Junction-to-Ambient (PCB Mounted) gj
Junction-to-Ambient (free air) g
50
°C/W
110
Notes through are on page 10
www.irf.com
1
4/1/04
IRLR/U9343 & IRLU9343-701
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter
Min. Typ. Max. Units
Conditions
BVDSS
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
-55
–––
–––
–––
-1.0
–––
–––
–––
–––
–––
5.3
–––
-52
93
–––
V
VGS = 0V, ID = -250µA
∆ΒVDSS/∆TJ
RDS(on)
––– mV/°C Reference to 25°C, ID = -1mA
mΩ
105
170
–––
VGS = -10V, ID = -3.4A e
GS = -4.5V, ID = -2.7A e
VDS = VGS, ID = -250µA
150
–––
-3.7
–––
–––
–––
–––
–––
31
V
VGS(th)
Gate Threshold Voltage
V
∆VGS(th)/∆TJ
IDSS
Gate Threshold Voltage Coefficient
Drain-to-Source Leakage Current
––– mV/°C
-2.0
-25
µA
VDS = -55V, VGS = 0V
VDS = -55V, VGS = 0V, TJ = 125°C
IGSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Forward Transconductance
Total Gate Charge
-100
100
–––
47
nA VGS = -20V
VGS = 20V
gfs
S
V
DS = -25V, ID = -14A
VDS = -44V
VGS = -10V
Qg
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Qgs
Qgd
Qgodr
td(on)
tr
Gate-to-Source Charge
Gate-to-Drain Charge
Gate Charge Overdrive
Turn-On Delay Time
7.1
8.5
15
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
ID = -14A
See Fig. 6 and 19
VDD = -28V, VGS = -10Vꢀe
ID = -14A
9.5
24
Rise Time
td(off)
tf
Turn-Off Delay Time
21
ns RG = 2.5Ω
Fall Time
9.5
660
160
72
Ciss
Coss
Crss
Coss
LD
Input Capacitance
VGS = 0V
pF VDS = -50V
ƒ = 1.0MHz,
Output Capacitance
Reverse Transfer Capacitance
Effective Output Capacitance
Internal Drain Inductance
See Fig.5
280
4.5
VGS = 0V, VDS = 0V to -44V
Between lead,
nH 6mm (0.25in.)
LS
Internal Source Inductance
–––
7.5
–––
from package
and center of die contact f
Avalanche Characteristics
Parameter
Typ.
Max.
Units
Single Pulse Avalanche Energyd
Avalanche Currentꢀi
EAS
IAR
–––
120
mJ
A
See Fig. 14, 15, 17a, 17b
Repetitive Avalanche Energy i
EAR
mJ
Diode Characteristics
Parameter
Continuous Source Current
Min. Typ. Max. Units
Conditions
MOSFET symbol
D
IS @ TC = 25°C
–––
–––
-20
(Body Diode)
A
showing the
G
ISM
Pulsed Source Current
(Body Diode)ꢀc
–––
–––
-60
integral reverse
S
p-n junction diode.
VSD
trr
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
–––
–––
–––
–––
57
-1.2
86
V
TJ = 25°C, IS = -14A, VGS = 0V e
ns TJ = 25°C, IF = -14A
Qrr
di/dt = 100A/µs
e
120
180
nC
2
www.irf.com
IRLR/U9343 & IRLU9343-701
100
100
10
1
VGS
VGS
-15V
-12V
-10V
-8.0V
-5.5V
-4.5V
-3.0V
-2.5V
TOP
-15V
-12V
-10V
-8.0V
-5.5V
-4.5V
-3.0V
-2.5V
TOP
10
BOTTOM
BOTTOM
1
-2.5V
-2.5V
≤
≤
60µs PULSE WIDTH
60µs PULSE WIDTH
Tj = 175°C
Tj = 25°C
0.1
0.1
0.1
1
10
100
0.1
1
10
100
-V , Drain-to-Source Voltage (V)
DS
-V , Drain-to-Source Voltage (V)
DS
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
100.0
10.0
1.0
2.0
1.5
1.0
0.5
I
= -14A
D
T
= 25°C
J
V
= -10V
GS
T
= 175°C
J
V
= -25V
DS
≤
60µs PULSE WIDTH
0.1
0.0
5.0
10.0
15.0
-60 -40 -20
T
0
20 40 60 80 100 120 140 160 180
-V , Gate-to-Source Voltage (V)
GS
, Junction Temperature (°C)
J
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance vs. Temperature
10000
1000
100
20
V
= 0V,
= C
f = 1 MHZ
GS
I = -14A
D
C
C
C
+ C , C
SHORTED
iss
gs
gd
ds
V
= -44V
DS
= C
rss
oss
gd
= C + C
16
12
8
VDS= -28V
VDS= -11V
ds
gd
Ciss
Coss
Crss
4
FOR TEST CIRCUIT
SEE FIGURE 19
0
10
0
10
Q
20
30
40
50
1
10
-V , Drain-to-Source Voltage (V)
100
Total Gate Charge (nC)
G
DS
Fig 5. Typical Capacitance vs.Drain-to-Source Voltage
Fig 6. Typical Gate Charge vs.Gate-to-Source Voltage
www.irf.com
3
IRLR/U9343 & IRLU9343-701
100.0
1000
100
10
OPERATION IN THIS AREA
LIMITED BY R (on)
DS
T
= 175°C
J
10.0
1.0
100µsec
T
= 25°C
J
Tc = 25°C
Tj = 175°C
Single Pulse
1msec
V
= 0V
GS
10msec
1
0.1
1
10
100
1000
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
-V
, Drain-toSource Voltage (V)
-V , Source-to-Drain Voltage (V)
SD
DS
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
20
2.5
2.0
1.5
1.0
16
12
8
I
= -250µA
D
4
0
25
50
75
100
125
150
175
-75 -50 -25
0
25 50 75 100 125 150 175
T
, Junction Temperature (°C)
T , Temperature ( °C )
J
J
Fig 10. Threshold Voltage vs. Temperature
Fig 9. Maximum Drain Current vs. Case Temperature
10
1
0.1
D = 0.50
0.20
0.10
R1
R1
R2
R2
Ri (°C/W) τi (sec)
0.05
τ
J τJ
τ
1.162
0.000512
0.002157
τ
Cτ
0.02
0.01
1τ1
Ci= τi/Ri
τ
2τ2
0.7370
0.01
SINGLE PULSE
Notes:
( THERMAL RESPONSE )
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.001
1E-006
1E-005
0.0001
0.001
0.01
0.1
t
, Rectangular Pulse Duration (sec)
1
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
4
www.irf.com
IRLR/U9343 & IRLU9343-701
500
600
500
400
300
200
100
0
I
D
I
= -14A
D
TOP
-4.0A
-5.5A
-14A
400
300
200
100
0
BOTTOM
T
= 125°C
J
T
= 25°C
J
4.0
6.0
8.0
10.0
25
50
75
100
125
150
175
-V , Gate-to-Source Voltage (V)
Starting T , Junction Temperature (°C)
GS
J
Fig 12. On-Resistance Vs. Gate Voltage
Fig 13. Maximum Avalanche Energy Vs. Drain Current
1000
Allowed avalanche Current vs
avalanche pulsewidth, tav
Duty Cycle = Single Pulse
100
∆
assuming
Tj = 25°C due to
avalanche losses. Note: In no
case should Tj be allowed to
exceed Tjmax
0.01
10
0.05
0.10
1
0.1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
tav (sec)
Fig 14. Typical Avalanche Current Vs.Pulsewidth
Notes on Repetitive Avalanche Curves , Figures 14, 15:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a
temperature far in excess of Tjmax. This is validated for
every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is
not exceeded.
3. Equation below based on circuit and waveforms shown in
Figures 17a, 17b.
140
120
100
80
TOP
BOTTOM 1% Duty Cycle
= -14A
Single Pulse
I
D
4. PD (ave) = Average power dissipation per single
avalanche pulse.
60
5. BV = Rated breakdown voltage (1.3 factor accounts for
voltage increase during avalanche).
40
6. Iav = Allowable avalanche current.
20
7. ∆T = Allowable rise in junction temperature, not to exceed
Tjmax (assumed as 25°C in Figure 14, 15).
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see figure 11)
0
25
50
75
100
125
150
175
Starting T , Junction Temperature (°C)
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
Iav = 2DT/ [1.3·BV·Zth]
J
Fig 15. Maximum Avalanche Energy Vs. Temperature
EAS (AR) = PD (ave)·tav
www.irf.com
5
IRLR/U9343 & IRLU9343-701
Driver Gate Drive
P.W.
P.W.
Period
D.U.T
Period
D =
+
*
=10V
V
GS
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
-
D.U.T. I Waveform
SD
+
Reverse
Recovery
Body Diode Forward
Current
Current
-
+
di/dt
-
D.U.T. V Waveform
DS
Diode Recovery
dv/dt
V
DD
VDD
Re-Applied
Voltage
• dv/dt controlled by RG
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
RG
+
-
Body Diode
Forward Drop
Inductor
Current
I
SD
Ripple ≤ 5%
* Reverse Polarity of D.U.T for P-Channel
* VGS = 5V for Logic Level Devices
Fig 16. Peak Diode Recovery dv/dt Test Circuit for P-Channel
HEXFET® Power MOSFETs
L
V
DS
RD
VDS
D.U.T
R
G
V
DD
VGS
I
A
AS
D.U.T.
DRIVER
-V
-
GS
RG
-
0.01
t
Ω
p
VDD
+
-10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
15V
Fig 18a. Switching Time Test Circuit
Fig 17a. Unclamped Inductive Test Circuit
I
AS
t
t
r
t
t
f
d(on)
d(off)
V
GS
10%
90%
t
p
V
DS
V
(BR)DSS
Fig 18b. Switching Time Waveforms
Fig 17b. Unclamped Inductive Waveforms
Id
Vds
Vgs
L
VCC
DUT
0
Vgs(th)
1K
Qgs1
Qgs2
Qgd
Qgodr
Fig 19a. Gate Charge Test Circuit
Fig 19b Gate Charge Waveform
6
www.irf.com
IRLR/U9343 & IRLU9343-701
D-Pak (TO-252AA) Package Outline
Dimensions are shown in millimeters (inches)
2.38 (.094)
2.19 (.086)
6.73 (.265)
6.35 (.250)
1.14 (.045)
0.89 (.035)
- A -
1.27 (.050)
5.46 (.215)
0.58 (.023)
0.46 (.018)
0.88 (.035)
5.21 (.205)
4
6.45 (.245)
5.68 (.224)
6.22 (.245)
5.97 (.235)
10.42 (.410)
9.40 (.370)
1.02 (.040)
1.64 (.025)
LEAD ASSIGNMENTS
1
2
3
1 - GATE
2 - DRAIN
3 - SOURCE
4 - DRAIN
0.51 (.020)
MIN.
- B -
1.52 (.060)
1.15 (.045)
0.89 (.035)
0.64 (.025)
3X
0.58 (.023)
0.46 (.018)
1.14 (.045)
2X
0.25 (.010)
M A M B
0.76 (.030)
NOTES:
2.28 (.090)
1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982.
2 CONTROLLING DIMENSION : INCH.
4.57 (.180)
3 CONFORMS TO JEDEC OUTLINE TO-252AA.
4 DIMENSIONS SHOWN ARE BEFORE SOLDER DIP,
SOLDER DIP MAX. +0.16 (.006).
D-Pak (TO-252AA) Part Marking Information
Notes: This part marking information applies todevices producedbefore02/26/2001
EXAMPLE: THIS IS AN IRFR120
WIT H AS S E MBLY
LOT CODE 9U1P
INTERNATIONAL
RECTIFIER
LOGO
DATE CODE
YEAR = 0
IRFU120
016
1P
WE EK = 16
9U
AS S E MB L Y
LOT CODE
Notes: This part marking information applies todevices producedafter 02/26/2001
EXAMPLE: THIS IS AN IRFR120
PART NUMBER
WIT H AS S E MBLY
LOT CODE 1234
ASSEMBLED ON WW 16, 1999
IN THE ASSEMBLY LINE "A"
INTERNATIONAL
RECTIFIER
LOGO
DATE CODE
YEAR 9 = 1999
WEE K 16
IRFU120
916A
34
12
LINE A
AS S E MBL Y
LOT CODE
www.irf.com
7
IRLR/U9343 & IRLU9343-701
I-Pak (TO-251AA) Package Outline
Dimensions are shown in millimeters (inches)
6.73 (.265)
6.35 (.250)
2.38 (.094)
2.19 (.086)
- A -
0.58 (.023)
0.46 (.018)
1.27 (.050)
5.46 (.215)
0.88 (.035)
5.21 (.205)
LEAD ASSIGNMENTS
1 - GATE
4
2 - DRAIN
6.45 (.245)
5.68 (.224)
3 - SOURCE
4 - DRAIN
6.22 (.245)
5.97 (.235)
1.52 (.060)
1.15 (.045)
1
2
3
- B -
NOTES:
1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982.
2 CONTROLLING DIMENSION : INCH.
2.28 (.090)
1.91 (.075)
9.65 (.380)
8.89 (.350)
3 CONFORMS TO JEDEC OUTLINE TO-252AA.
4 DIMENSIONS SHOWN ARE BEFORE SOLDER DIP,
SOLDER DIP MAX. +0.16 (.006).
1.14 (.045)
0.76 (.030)
1.14 (.045)
0.89 (.035)
3X
0.89 (.035)
0.64 (.025)
3X
0.25 (.010)
M A M B
0.58 (.023)
0.46 (.018)
2.28 (.090)
2X
I-Pak (TO-251AA) Part Marking Information
Notes: This part marking information applies todevices produced before02/26/2001
EXAMPLE: THIS IS AN IRFR120
INTERNATIONAL
DATE CODE
YEAR = 0
WITH ASSEMBLY
LOT CODE 9U1P
RECTIFIER
LOGO
IRFU120
016
1P
WEEK = 16
9U
ASSEMBLY
LOT CODE
Notes: This part marking information applies todevices produced after 02/26/2001
PART NUMBER
EXAMPLE: THIS IS AN IRFR120
WITH ASSEMBLY
INTERNATIONAL
RECTIFIER
LOGO
DATE CODE
YEAR 9 = 1999
WEE K 19
IRFU120
919A
78
LOT CODE 5678
ASSEMBLED ON WW 19, 1999
IN THE ASSEMBLY LINE "A"
56
LINE A
ASSEMBLY
LOT CODE
8
www.irf.com
IRLR/U9343 & IRLU9343-701
D-Pak (TO-252AA) Tape & Reel Information
Dimensions are shown in millimeters (inches)
TR
TRL
TRR
16.3 ( .641 )
15.7 ( .619 )
16.3 ( .641 )
15.7 ( .619 )
12.1 ( .476 )
11.9 ( .469 )
8.1 ( .318 )
7.9 ( .312 )
FEED DIRECTION
FEED DIRECTION
NOTES :
1. CONTROLLING DIMENSION : MILLIMETER.
2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ).
3. OUTLINE CONFORMS TO EIA-481 & EIA-541.
13 INCH
16 mm
NOTES :
1. OUTLINE CONFORMS TO EIA-481.
www.irf.com
9
IRLR/U9343 & IRLU9343-701
I-Pak Leadform Option 701 Package Outline
Dimensions are shown in millimeters (inches)
Notes:
Contact factory for mounting information
Limited by Tjmax. See Figs. 14, 15, 17a, 17b for repetitive avalanche information
Repetitive rating; pulse width limited by
max. junction temperature.
Starting TJ = 25°C, L = 1.24mH,
RG = 25Ω, IAS = -14A.
Pulse width ≤ 400µs; duty cycle ≤ 2%.
This only applies for I-Pak, LS of D-Pak is
measured between lead and center of die contact
When D-Pak mounted on 1" square PCB (FR-4 or G-10 Material) .
For recommended footprint and soldering techniques refer to
application note #AN-994
Refer to D-Pak package for Part Marking, Tape and Reel information.
ꢁ R is measured at TJ of approximately 90°C.
θ
Data and specifications subject to change without notice.
This product has been designed for the Industrial market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.4/04
10
www.irf.com
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IRLR9343TRPBF
Power Field-Effect Transistor, 20A I(D), 55V, 0.105ohm, 1-Element, P-Channel, Silicon, Metal-oxide Semiconductor FET, TO-252AA, LEAD FREE, DPAK-3
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IRLR9343TRR
Power Field-Effect Transistor, 20A I(D), 55V, 0.105ohm, 1-Element, P-Channel, Silicon, Metal-oxide Semiconductor FET, TO-252AA, DPAK-3
INFINEON
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IRLR9343TRRPBF
Power Field-Effect Transistor, 20A I(D), 55V, 0.105ohm, 1-Element, P-Channel, Silicon, Metal-oxide Semiconductor FET, TO-252AA, LEAD FREE, DPAK-3
VISHAY
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